4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
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13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 * Inspired from FreeBSD src/sys/amd64/include/atomic.h
36 * Copyright (c) 1998 Doug Rabson
37 * All rights reserved.
40 #ifndef _RTE_ATOMIC_X86_H_
41 #error do not include this file directly, use <rte_atomic.h> instead
44 #ifndef _RTE_ATOMIC_X86_64_H_
45 #define _RTE_ATOMIC_X86_64_H_
48 #include <rte_common.h>
49 #include <rte_atomic.h>
51 /*------------------------- 64 bit atomic operations -------------------------*/
53 #ifndef RTE_FORCE_INTRINSICS
55 rte_atomic64_cmpset(volatile uint64_t *dst, uint64_t exp, uint64_t src)
62 "cmpxchgq %[src], %[dst];"
64 : [res] "=a" (res), /* output */
66 : [src] "r" (src), /* input */
69 : "memory"); /* no-clobber list */
75 rte_atomic64_init(rte_atomic64_t *v)
81 rte_atomic64_read(rte_atomic64_t *v)
87 rte_atomic64_set(rte_atomic64_t *v, int64_t new_value)
93 rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
98 : [cnt] "=m" (v->cnt) /* output */
99 : [inc] "ir" (inc), /* input */
105 rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
109 "subq %[dec], %[cnt]"
110 : [cnt] "=m" (v->cnt) /* output */
111 : [dec] "ir" (dec), /* input */
117 rte_atomic64_inc(rte_atomic64_t *v)
122 : [cnt] "=m" (v->cnt) /* output */
123 : "m" (v->cnt) /* input */
128 rte_atomic64_dec(rte_atomic64_t *v)
133 : [cnt] "=m" (v->cnt) /* output */
134 : "m" (v->cnt) /* input */
138 static inline int64_t
139 rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
145 "xaddq %[prev], %[cnt]"
146 : [prev] "+r" (prev), /* output */
148 : "m" (v->cnt) /* input */
153 static inline int64_t
154 rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
156 return rte_atomic64_add_return(v, -dec);
159 static inline int rte_atomic64_inc_and_test(rte_atomic64_t *v)
167 : [cnt] "+m" (v->cnt), /* output */
174 static inline int rte_atomic64_dec_and_test(rte_atomic64_t *v)
182 : [cnt] "+m" (v->cnt), /* output */
188 static inline int rte_atomic64_test_and_set(rte_atomic64_t *v)
190 return rte_atomic64_cmpset((volatile uint64_t *)&v->cnt, 0, 1);
193 static inline void rte_atomic64_clear(rte_atomic64_t *v)
199 #endif /* _RTE_ATOMIC_X86_64_H_ */