1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/tcp.h>
36 #include <net/checksum.h>
38 #include <linux/ipv6.h>
39 #include <net/ip6_checksum.h>
43 #include <linux/mii.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #ifdef CONFIG_PM_RUNTIME
50 #include <linux/pm_runtime.h>
51 #endif /* CONFIG_PM_RUNTIME */
53 #include <linux/if_bridge.h>
57 #include <linux/uio_driver.h>
59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
60 #define DRV_DEBUG "_debug"
65 #define VERSION_SUFFIX
70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
72 char igb_driver_name[] = "igb";
73 char igb_driver_version[] = DRV_VERSION;
74 static const char igb_driver_string[] =
75 "Intel(R) Gigabit Ethernet Network Driver";
76 static const char igb_copyright[] =
77 "Copyright (c) 2007-2013 Intel Corporation.";
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
115 /* required last entry */
119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
121 void igb_reset(struct igb_adapter *);
122 static int igb_setup_all_tx_resources(struct igb_adapter *);
123 static int igb_setup_all_rx_resources(struct igb_adapter *);
124 static void igb_free_all_tx_resources(struct igb_adapter *);
125 static void igb_free_all_rx_resources(struct igb_adapter *);
126 static void igb_setup_mrqc(struct igb_adapter *);
127 void igb_update_stats(struct igb_adapter *);
128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
129 static void __devexit igb_remove(struct pci_dev *pdev);
130 static int igb_sw_init(struct igb_adapter *);
131 static int igb_open(struct net_device *);
132 static int igb_close(struct net_device *);
133 static void igb_configure(struct igb_adapter *);
134 static void igb_configure_tx(struct igb_adapter *);
135 static void igb_configure_rx(struct igb_adapter *);
136 static void igb_clean_all_tx_rings(struct igb_adapter *);
137 static void igb_clean_all_rx_rings(struct igb_adapter *);
138 static void igb_clean_tx_ring(struct igb_ring *);
139 static void igb_set_rx_mode(struct net_device *);
140 static void igb_update_phy_info(unsigned long);
141 static void igb_watchdog(unsigned long);
142 static void igb_watchdog_task(struct work_struct *);
143 static void igb_dma_err_task(struct work_struct *);
144 static void igb_dma_err_timer(unsigned long data);
145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
146 static struct net_device_stats *igb_get_stats(struct net_device *);
147 static int igb_change_mtu(struct net_device *, int);
148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
149 static int igb_set_mac(struct net_device *, void *);
150 static void igb_set_uta(struct igb_adapter *adapter);
151 static irqreturn_t igb_intr(int irq, void *);
152 static irqreturn_t igb_intr_msi(int irq, void *);
153 static irqreturn_t igb_msix_other(int irq, void *);
154 static irqreturn_t igb_msix_ring(int irq, void *);
156 static void igb_update_dca(struct igb_q_vector *);
157 static void igb_setup_dca(struct igb_adapter *);
159 static int igb_poll(struct napi_struct *, int);
160 static bool igb_clean_tx_irq(struct igb_q_vector *);
161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
163 static void igb_tx_timeout(struct net_device *);
164 static void igb_reset_task(struct work_struct *);
165 #ifdef HAVE_VLAN_RX_REGISTER
166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
168 #ifdef HAVE_VLAN_PROTOCOL
169 static int igb_vlan_rx_add_vid(struct net_device *,
171 static int igb_vlan_rx_kill_vid(struct net_device *,
173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
175 static int igb_vlan_rx_add_vid(struct net_device *,
176 __always_unused __be16 proto, u16);
177 static int igb_vlan_rx_kill_vid(struct net_device *,
178 __always_unused __be16 proto, u16);
180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
187 static void igb_restore_vlan(struct igb_adapter *);
188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
189 static void igb_ping_all_vfs(struct igb_adapter *);
190 static void igb_msg_task(struct igb_adapter *);
191 static void igb_vmm_control(struct igb_adapter *);
192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
194 static void igb_process_mdd_event(struct igb_adapter *);
196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
198 int vf, u16 vlan, u8 qos);
199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
203 #ifdef HAVE_VF_MIN_MAX_TXRATE
204 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
205 #else /* HAVE_VF_MIN_MAX_TXRATE */
206 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
207 #endif /* HAVE_VF_MIN_MAX_TXRATE */
208 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
209 struct ifla_vf_info *ivi);
210 static void igb_check_vf_rate_limit(struct igb_adapter *);
212 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
214 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
215 static int igb_suspend(struct device *dev);
216 static int igb_resume(struct device *dev);
217 #ifdef CONFIG_PM_RUNTIME
218 static int igb_runtime_suspend(struct device *dev);
219 static int igb_runtime_resume(struct device *dev);
220 static int igb_runtime_idle(struct device *dev);
221 #endif /* CONFIG_PM_RUNTIME */
222 static const struct dev_pm_ops igb_pm_ops = {
223 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
224 .suspend = igb_suspend,
225 .resume = igb_resume,
226 .freeze = igb_suspend,
228 .poweroff = igb_suspend,
229 .restore = igb_resume,
230 #ifdef CONFIG_PM_RUNTIME
231 .runtime_suspend = igb_runtime_suspend,
232 .runtime_resume = igb_runtime_resume,
233 .runtime_idle = igb_runtime_idle,
235 #else /* Linux >= 2.6.34 */
236 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
237 #ifdef CONFIG_PM_RUNTIME
238 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
240 #endif /* CONFIG_PM_RUNTIME */
241 #endif /* Linux version */
244 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
245 static int igb_resume(struct pci_dev *pdev);
246 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
247 #endif /* CONFIG_PM */
248 #ifndef USE_REBOOT_NOTIFIER
249 static void igb_shutdown(struct pci_dev *);
251 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
252 static struct notifier_block igb_notifier_reboot = {
253 .notifier_call = igb_notify_reboot,
259 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
260 static struct notifier_block dca_notifier = {
261 .notifier_call = igb_notify_dca,
266 #ifdef CONFIG_NET_POLL_CONTROLLER
267 /* for netdump / net console */
268 static void igb_netpoll(struct net_device *);
272 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
273 pci_channel_state_t);
274 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
275 static void igb_io_resume(struct pci_dev *);
277 static struct pci_error_handlers igb_err_handler = {
278 .error_detected = igb_io_error_detected,
279 .slot_reset = igb_io_slot_reset,
280 .resume = igb_io_resume,
284 static void igb_init_fw(struct igb_adapter *adapter);
285 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
287 static struct pci_driver igb_driver = {
288 .name = igb_driver_name,
289 .id_table = igb_pci_tbl,
291 .remove = __devexit_p(igb_remove),
293 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
294 .driver.pm = &igb_pm_ops,
296 .suspend = igb_suspend,
297 .resume = igb_resume,
298 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
299 #endif /* CONFIG_PM */
300 #ifndef USE_REBOOT_NOTIFIER
301 .shutdown = igb_shutdown,
304 .err_handler = &igb_err_handler
308 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
309 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
310 //MODULE_LICENSE("GPL");
311 //MODULE_VERSION(DRV_VERSION);
313 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
315 struct e1000_hw *hw = &adapter->hw;
316 struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
317 u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
318 u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
322 * if this is the management vlan the only option is to add it in so
323 * that the management pass through will continue to work
325 if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
326 (vid == mng_cookie->vlan_id))
329 vfta = adapter->shadow_vfta[index];
336 e1000_write_vfta(hw, index, vfta);
337 adapter->shadow_vfta[index] = vfta;
340 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
341 //module_param(debug, int, 0);
342 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
345 * igb_init_module - Driver Registration Routine
347 * igb_init_module is the first routine called when the driver is
348 * loaded. All it does is register with the PCI subsystem.
350 static int __init igb_init_module(void)
354 printk(KERN_INFO "%s - version %s\n",
355 igb_driver_string, igb_driver_version);
357 printk(KERN_INFO "%s\n", igb_copyright);
359 /* only use IGB_PROCFS if IGB_HWMON is not defined */
362 if (igb_procfs_topdir_init())
363 printk(KERN_INFO "Procfs failed to initialize topdir\n");
364 #endif /* IGB_PROCFS */
365 #endif /* IGB_HWMON */
368 dca_register_notify(&dca_notifier);
370 ret = pci_register_driver(&igb_driver);
371 #ifdef USE_REBOOT_NOTIFIER
373 register_reboot_notifier(&igb_notifier_reboot);
380 #define module_init(x) static int x(void) __attribute__((__unused__));
381 module_init(igb_init_module);
384 * igb_exit_module - Driver Exit Cleanup Routine
386 * igb_exit_module is called just before the driver is removed
389 static void __exit igb_exit_module(void)
392 dca_unregister_notify(&dca_notifier);
394 #ifdef USE_REBOOT_NOTIFIER
395 unregister_reboot_notifier(&igb_notifier_reboot);
397 pci_unregister_driver(&igb_driver);
400 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
403 igb_procfs_topdir_exit();
404 #endif /* IGB_PROCFS */
405 #endif /* IGB_HWMON */
409 #define module_exit(x) static void x(void) __attribute__((__unused__));
410 module_exit(igb_exit_module);
412 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
414 * igb_cache_ring_register - Descriptor ring to register mapping
415 * @adapter: board private structure to initialize
417 * Once we know the feature-set enabled for the device, we'll cache
418 * the register offset the descriptor ring is assigned to.
420 static void igb_cache_ring_register(struct igb_adapter *adapter)
423 u32 rbase_offset = adapter->vfs_allocated_count;
425 switch (adapter->hw.mac.type) {
427 /* The queues are allocated for virtualization such that VF 0
428 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
429 * In order to avoid collision we start at the first free queue
430 * and continue consuming queues in the same sequence
432 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
433 for (; i < adapter->rss_queues; i++)
434 adapter->rx_ring[i]->reg_idx = rbase_offset +
444 for (; i < adapter->num_rx_queues; i++)
445 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
446 for (; j < adapter->num_tx_queues; j++)
447 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
452 static void igb_configure_lli(struct igb_adapter *adapter)
454 struct e1000_hw *hw = &adapter->hw;
457 /* LLI should only be enabled for MSI-X or MSI interrupts */
458 if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
461 if (adapter->lli_port) {
462 /* use filter 0 for port */
463 port = htons((u16)adapter->lli_port);
464 E1000_WRITE_REG(hw, E1000_IMIR(0),
465 (port | E1000_IMIR_PORT_IM_EN));
466 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
467 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
470 if (adapter->flags & IGB_FLAG_LLI_PUSH) {
471 /* use filter 1 for push flag */
472 E1000_WRITE_REG(hw, E1000_IMIR(1),
473 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
474 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
475 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
478 if (adapter->lli_size) {
479 /* use filter 2 for size */
480 E1000_WRITE_REG(hw, E1000_IMIR(2),
481 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
482 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
483 (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
489 * igb_write_ivar - configure ivar for given MSI-X vector
490 * @hw: pointer to the HW structure
491 * @msix_vector: vector number we are allocating to a given ring
492 * @index: row index of IVAR register to write within IVAR table
493 * @offset: column offset of in IVAR, should be multiple of 8
495 * This function is intended to handle the writing of the IVAR register
496 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
497 * each containing an cause allocation for an Rx and Tx ring, and a
498 * variable number of rows depending on the number of queues supported.
500 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
501 int index, int offset)
503 u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
505 /* clear any bits that are currently set */
506 ivar &= ~((u32)0xFF << offset);
508 /* write vector and valid bit */
509 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
511 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
514 #define IGB_N0_QUEUE -1
515 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
517 struct igb_adapter *adapter = q_vector->adapter;
518 struct e1000_hw *hw = &adapter->hw;
519 int rx_queue = IGB_N0_QUEUE;
520 int tx_queue = IGB_N0_QUEUE;
523 if (q_vector->rx.ring)
524 rx_queue = q_vector->rx.ring->reg_idx;
525 if (q_vector->tx.ring)
526 tx_queue = q_vector->tx.ring->reg_idx;
528 switch (hw->mac.type) {
530 /* The 82575 assigns vectors using a bitmask, which matches the
531 bitmask for the EICR/EIMS/EIMC registers. To assign one
532 or more queues to a vector, we write the appropriate bits
533 into the MSIXBM register for that vector. */
534 if (rx_queue > IGB_N0_QUEUE)
535 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
536 if (tx_queue > IGB_N0_QUEUE)
537 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
538 if (!adapter->msix_entries && msix_vector == 0)
539 msixbm |= E1000_EIMS_OTHER;
540 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
541 q_vector->eims_value = msixbm;
545 * 82576 uses a table that essentially consists of 2 columns
546 * with 8 rows. The ordering is column-major so we use the
547 * lower 3 bits as the row index, and the 4th bit as the
550 if (rx_queue > IGB_N0_QUEUE)
551 igb_write_ivar(hw, msix_vector,
553 (rx_queue & 0x8) << 1);
554 if (tx_queue > IGB_N0_QUEUE)
555 igb_write_ivar(hw, msix_vector,
557 ((tx_queue & 0x8) << 1) + 8);
558 q_vector->eims_value = 1 << msix_vector;
566 * On 82580 and newer adapters the scheme is similar to 82576
567 * however instead of ordering column-major we have things
568 * ordered row-major. So we traverse the table by using
569 * bit 0 as the column offset, and the remaining bits as the
572 if (rx_queue > IGB_N0_QUEUE)
573 igb_write_ivar(hw, msix_vector,
575 (rx_queue & 0x1) << 4);
576 if (tx_queue > IGB_N0_QUEUE)
577 igb_write_ivar(hw, msix_vector,
579 ((tx_queue & 0x1) << 4) + 8);
580 q_vector->eims_value = 1 << msix_vector;
587 /* add q_vector eims value to global eims_enable_mask */
588 adapter->eims_enable_mask |= q_vector->eims_value;
590 /* configure q_vector to set itr on first interrupt */
591 q_vector->set_itr = 1;
595 * igb_configure_msix - Configure MSI-X hardware
597 * igb_configure_msix sets up the hardware to properly
598 * generate MSI-X interrupts.
600 static void igb_configure_msix(struct igb_adapter *adapter)
604 struct e1000_hw *hw = &adapter->hw;
606 adapter->eims_enable_mask = 0;
608 /* set vector for other causes, i.e. link changes */
609 switch (hw->mac.type) {
611 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
612 /* enable MSI-X PBA support*/
613 tmp |= E1000_CTRL_EXT_PBA_CLR;
615 /* Auto-Mask interrupts upon ICR read. */
616 tmp |= E1000_CTRL_EXT_EIAME;
617 tmp |= E1000_CTRL_EXT_IRCA;
619 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
621 /* enable msix_other interrupt */
622 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
624 adapter->eims_other = E1000_EIMS_OTHER;
634 /* Turn on MSI-X capability first, or our settings
635 * won't stick. And it will take days to debug. */
636 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
637 E1000_GPIE_PBA | E1000_GPIE_EIAME |
640 /* enable msix_other interrupt */
641 adapter->eims_other = 1 << vector;
642 tmp = (vector++ | E1000_IVAR_VALID) << 8;
644 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
647 /* do nothing, since nothing else supports MSI-X */
649 } /* switch (hw->mac.type) */
651 adapter->eims_enable_mask |= adapter->eims_other;
653 for (i = 0; i < adapter->num_q_vectors; i++)
654 igb_assign_vector(adapter->q_vector[i], vector++);
656 E1000_WRITE_FLUSH(hw);
660 * igb_request_msix - Initialize MSI-X interrupts
662 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
665 static int igb_request_msix(struct igb_adapter *adapter)
667 struct net_device *netdev = adapter->netdev;
668 struct e1000_hw *hw = &adapter->hw;
669 int i, err = 0, vector = 0, free_vector = 0;
671 err = request_irq(adapter->msix_entries[vector].vector,
672 &igb_msix_other, 0, netdev->name, adapter);
676 for (i = 0; i < adapter->num_q_vectors; i++) {
677 struct igb_q_vector *q_vector = adapter->q_vector[i];
681 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
683 if (q_vector->rx.ring && q_vector->tx.ring)
684 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
685 q_vector->rx.ring->queue_index);
686 else if (q_vector->tx.ring)
687 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
688 q_vector->tx.ring->queue_index);
689 else if (q_vector->rx.ring)
690 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
691 q_vector->rx.ring->queue_index);
693 sprintf(q_vector->name, "%s-unused", netdev->name);
695 err = request_irq(adapter->msix_entries[vector].vector,
696 igb_msix_ring, 0, q_vector->name,
702 igb_configure_msix(adapter);
706 /* free already assigned IRQs */
707 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
710 for (i = 0; i < vector; i++) {
711 free_irq(adapter->msix_entries[free_vector++].vector,
712 adapter->q_vector[i]);
718 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
720 if (adapter->msix_entries) {
721 pci_disable_msix(adapter->pdev);
722 kfree(adapter->msix_entries);
723 adapter->msix_entries = NULL;
724 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
725 pci_disable_msi(adapter->pdev);
730 * igb_free_q_vector - Free memory allocated for specific interrupt vector
731 * @adapter: board private structure to initialize
732 * @v_idx: Index of vector to be freed
734 * This function frees the memory allocated to the q_vector. In addition if
735 * NAPI is enabled it will delete any references to the NAPI struct prior
736 * to freeing the q_vector.
738 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
740 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
742 if (q_vector->tx.ring)
743 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
745 if (q_vector->rx.ring)
746 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
748 adapter->q_vector[v_idx] = NULL;
749 netif_napi_del(&q_vector->napi);
751 __skb_queue_purge(&q_vector->lrolist.active);
757 * igb_free_q_vectors - Free memory allocated for interrupt vectors
758 * @adapter: board private structure to initialize
760 * This function frees the memory allocated to the q_vectors. In addition if
761 * NAPI is enabled it will delete any references to the NAPI struct prior
762 * to freeing the q_vector.
764 static void igb_free_q_vectors(struct igb_adapter *adapter)
766 int v_idx = adapter->num_q_vectors;
768 adapter->num_tx_queues = 0;
769 adapter->num_rx_queues = 0;
770 adapter->num_q_vectors = 0;
773 igb_free_q_vector(adapter, v_idx);
777 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
779 * This function resets the device so that it has 0 rx queues, tx queues, and
780 * MSI-X interrupts allocated.
782 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
784 igb_free_q_vectors(adapter);
785 igb_reset_interrupt_capability(adapter);
789 * igb_process_mdd_event
790 * @adapter - board private structure
792 * Identify a malicious VF, disable the VF TX/RX queues and log a message.
794 static void igb_process_mdd_event(struct igb_adapter *adapter)
796 struct e1000_hw *hw = &adapter->hw;
797 u32 lvmmc, vfte, vfre, mdfb;
800 lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
801 vf_queue = lvmmc >> 29;
803 /* VF index cannot be bigger or equal to VFs allocated */
804 if (vf_queue >= adapter->vfs_allocated_count)
807 netdev_info(adapter->netdev,
808 "VF %d misbehaved. VF queues are disabled. "
809 "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
811 /* Disable VFTE and VFRE related bits */
812 vfte = E1000_READ_REG(hw, E1000_VFTE);
813 vfte &= ~(1 << vf_queue);
814 E1000_WRITE_REG(hw, E1000_VFTE, vfte);
816 vfre = E1000_READ_REG(hw, E1000_VFRE);
817 vfre &= ~(1 << vf_queue);
818 E1000_WRITE_REG(hw, E1000_VFRE, vfre);
820 /* Disable MDFB related bit. Clear on write */
821 mdfb = E1000_READ_REG(hw, E1000_MDFB);
822 mdfb |= (1 << vf_queue);
823 E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
825 /* Reset the specific VF */
826 E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
831 * @adapter - board private structure
833 * Disable MDD behavior in the HW
835 static void igb_disable_mdd(struct igb_adapter *adapter)
837 struct e1000_hw *hw = &adapter->hw;
840 if ((hw->mac.type != e1000_i350) ||
841 (hw->mac.type != e1000_i354))
844 reg = E1000_READ_REG(hw, E1000_DTXCTL);
845 reg &= (~E1000_DTXCTL_MDP_EN);
846 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
851 * @adapter - board private structure
853 * Enable the HW to detect malicious driver and sends an interrupt to
856 static void igb_enable_mdd(struct igb_adapter *adapter)
858 struct e1000_hw *hw = &adapter->hw;
861 /* Only available on i350 device */
862 if (hw->mac.type != e1000_i350)
865 reg = E1000_READ_REG(hw, E1000_DTXCTL);
866 reg |= E1000_DTXCTL_MDP_EN;
867 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
871 * igb_reset_sriov_capability - disable SR-IOV if enabled
873 * Attempt to disable single root IO virtualization capabilites present in the
876 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
878 struct pci_dev *pdev = adapter->pdev;
879 struct e1000_hw *hw = &adapter->hw;
881 /* reclaim resources allocated to VFs */
882 if (adapter->vf_data) {
883 if (!pci_vfs_assigned(pdev)) {
885 * disable iov and allow time for transactions to
888 pci_disable_sriov(pdev);
891 dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
893 dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
894 "VF(s) are assigned to guests!\n");
896 /* Disable Malicious Driver Detection */
897 igb_disable_mdd(adapter);
899 /* free vf data storage */
900 kfree(adapter->vf_data);
901 adapter->vf_data = NULL;
903 /* switch rings back to PF ownership */
904 E1000_WRITE_REG(hw, E1000_IOVCTL,
905 E1000_IOVCTL_REUSE_VFQ);
906 E1000_WRITE_FLUSH(hw);
910 adapter->vfs_allocated_count = 0;
914 * igb_set_sriov_capability - setup SR-IOV if supported
916 * Attempt to enable single root IO virtualization capabilites present in the
919 static void igb_set_sriov_capability(struct igb_adapter *adapter)
921 struct pci_dev *pdev = adapter->pdev;
925 old_vfs = pci_num_vf(pdev);
927 dev_info(pci_dev_to_dev(pdev),
928 "%d pre-allocated VFs found - override "
929 "max_vfs setting of %d\n", old_vfs,
930 adapter->vfs_allocated_count);
931 adapter->vfs_allocated_count = old_vfs;
933 /* no VFs requested, do nothing */
934 if (!adapter->vfs_allocated_count)
937 /* allocate vf data storage */
938 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
939 sizeof(struct vf_data_storage),
942 if (adapter->vf_data) {
944 if (pci_enable_sriov(pdev,
945 adapter->vfs_allocated_count))
948 for (i = 0; i < adapter->vfs_allocated_count; i++)
949 igb_vf_configure(adapter, i);
951 switch (adapter->hw.mac.type) {
954 /* Enable VM to VM loopback by default */
955 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
958 /* Currently no other hardware supports loopback */
962 /* DMA Coalescing is not supported in IOV mode. */
963 if (adapter->hw.mac.type >= e1000_i350)
964 adapter->dmac = IGB_DMAC_DISABLE;
965 if (adapter->hw.mac.type < e1000_i350)
966 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
972 kfree(adapter->vf_data);
973 adapter->vf_data = NULL;
974 adapter->vfs_allocated_count = 0;
975 dev_warn(pci_dev_to_dev(pdev),
976 "Failed to initialize SR-IOV virtualization\n");
980 * igb_set_interrupt_capability - set MSI or MSI-X if supported
982 * Attempt to configure interrupts using the best available
983 * capabilities of the hardware and kernel.
985 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
987 struct pci_dev *pdev = adapter->pdev;
992 adapter->int_mode = IGB_INT_MODE_MSI;
994 /* Number of supported queues. */
995 adapter->num_rx_queues = adapter->rss_queues;
997 if (adapter->vmdq_pools > 1)
998 adapter->num_rx_queues += adapter->vmdq_pools - 1;
1001 if (adapter->vmdq_pools)
1002 adapter->num_tx_queues = adapter->vmdq_pools;
1004 adapter->num_tx_queues = adapter->num_rx_queues;
1006 adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1009 switch (adapter->int_mode) {
1010 case IGB_INT_MODE_MSIX:
1011 /* start with one vector for every rx queue */
1012 numvecs = adapter->num_rx_queues;
1014 /* if tx handler is separate add 1 for every tx queue */
1015 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1016 numvecs += adapter->num_tx_queues;
1018 /* store the number of vectors reserved for queues */
1019 adapter->num_q_vectors = numvecs;
1021 /* add 1 vector for link status interrupts */
1023 adapter->msix_entries = kcalloc(numvecs,
1024 sizeof(struct msix_entry),
1026 if (adapter->msix_entries) {
1027 for (i = 0; i < numvecs; i++)
1028 adapter->msix_entries[i].entry = i;
1030 err = pci_enable_msix(pdev,
1031 adapter->msix_entries, numvecs);
1035 /* MSI-X failed, so fall through and try MSI */
1036 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1037 "Falling back to MSI interrupts.\n");
1038 igb_reset_interrupt_capability(adapter);
1039 case IGB_INT_MODE_MSI:
1040 if (!pci_enable_msi(pdev))
1041 adapter->flags |= IGB_FLAG_HAS_MSI;
1043 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1044 "interrupts. Falling back to legacy "
1047 case IGB_INT_MODE_LEGACY:
1048 /* disable advanced features and set number of queues to 1 */
1049 igb_reset_sriov_capability(adapter);
1050 adapter->vmdq_pools = 0;
1051 adapter->rss_queues = 1;
1052 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1053 adapter->num_rx_queues = 1;
1054 adapter->num_tx_queues = 1;
1055 adapter->num_q_vectors = 1;
1056 /* Don't do anything; this is system default */
1061 static void igb_add_ring(struct igb_ring *ring,
1062 struct igb_ring_container *head)
1069 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1070 * @adapter: board private structure to initialize
1071 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1072 * @v_idx: index of vector in adapter struct
1073 * @txr_count: total number of Tx rings to allocate
1074 * @txr_idx: index of first Tx ring to allocate
1075 * @rxr_count: total number of Rx rings to allocate
1076 * @rxr_idx: index of first Rx ring to allocate
1078 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1080 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1081 unsigned int v_count, unsigned int v_idx,
1082 unsigned int txr_count, unsigned int txr_idx,
1083 unsigned int rxr_count, unsigned int rxr_idx)
1085 struct igb_q_vector *q_vector;
1086 struct igb_ring *ring;
1087 int ring_count, size;
1089 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1090 if (txr_count > 1 || rxr_count > 1)
1093 ring_count = txr_count + rxr_count;
1094 size = sizeof(struct igb_q_vector) +
1095 (sizeof(struct igb_ring) * ring_count);
1097 /* allocate q_vector and rings */
1098 q_vector = kzalloc(size, GFP_KERNEL);
1103 /* initialize LRO */
1104 __skb_queue_head_init(&q_vector->lrolist.active);
1107 /* initialize NAPI */
1108 netif_napi_add(adapter->netdev, &q_vector->napi,
1111 /* tie q_vector and adapter together */
1112 adapter->q_vector[v_idx] = q_vector;
1113 q_vector->adapter = adapter;
1115 /* initialize work limits */
1116 q_vector->tx.work_limit = adapter->tx_work_limit;
1118 /* initialize ITR configuration */
1119 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1120 q_vector->itr_val = IGB_START_ITR;
1122 /* initialize pointer to rings */
1123 ring = q_vector->ring;
1127 /* rx or rx/tx vector */
1128 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1129 q_vector->itr_val = adapter->rx_itr_setting;
1131 /* tx only vector */
1132 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1133 q_vector->itr_val = adapter->tx_itr_setting;
1137 /* assign generic ring traits */
1138 ring->dev = &adapter->pdev->dev;
1139 ring->netdev = adapter->netdev;
1141 /* configure backlink on ring */
1142 ring->q_vector = q_vector;
1144 /* update q_vector Tx values */
1145 igb_add_ring(ring, &q_vector->tx);
1147 /* For 82575, context index must be unique per ring. */
1148 if (adapter->hw.mac.type == e1000_82575)
1149 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1151 /* apply Tx specific ring traits */
1152 ring->count = adapter->tx_ring_count;
1153 ring->queue_index = txr_idx;
1155 /* assign ring to adapter */
1156 adapter->tx_ring[txr_idx] = ring;
1158 /* push pointer to next ring */
1163 /* assign generic ring traits */
1164 ring->dev = &adapter->pdev->dev;
1165 ring->netdev = adapter->netdev;
1167 /* configure backlink on ring */
1168 ring->q_vector = q_vector;
1170 /* update q_vector Rx values */
1171 igb_add_ring(ring, &q_vector->rx);
1173 #ifndef HAVE_NDO_SET_FEATURES
1174 /* enable rx checksum */
1175 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1178 /* set flag indicating ring supports SCTP checksum offload */
1179 if (adapter->hw.mac.type >= e1000_82576)
1180 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1182 if ((adapter->hw.mac.type == e1000_i350) ||
1183 (adapter->hw.mac.type == e1000_i354))
1184 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1186 /* apply Rx specific ring traits */
1187 ring->count = adapter->rx_ring_count;
1188 ring->queue_index = rxr_idx;
1190 /* assign ring to adapter */
1191 adapter->rx_ring[rxr_idx] = ring;
1198 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1199 * @adapter: board private structure to initialize
1201 * We allocate one q_vector per queue interrupt. If allocation fails we
1204 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1206 int q_vectors = adapter->num_q_vectors;
1207 int rxr_remaining = adapter->num_rx_queues;
1208 int txr_remaining = adapter->num_tx_queues;
1209 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1212 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1213 for (; rxr_remaining; v_idx++) {
1214 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1220 /* update counts and index */
1226 for (; v_idx < q_vectors; v_idx++) {
1227 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1228 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1229 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1230 tqpv, txr_idx, rqpv, rxr_idx);
1235 /* update counts and index */
1236 rxr_remaining -= rqpv;
1237 txr_remaining -= tqpv;
1245 adapter->num_tx_queues = 0;
1246 adapter->num_rx_queues = 0;
1247 adapter->num_q_vectors = 0;
1250 igb_free_q_vector(adapter, v_idx);
1256 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1258 * This function initializes the interrupts and allocates all of the queues.
1260 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1262 struct pci_dev *pdev = adapter->pdev;
1265 igb_set_interrupt_capability(adapter, msix);
1267 err = igb_alloc_q_vectors(adapter);
1269 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1270 goto err_alloc_q_vectors;
1273 igb_cache_ring_register(adapter);
1277 err_alloc_q_vectors:
1278 igb_reset_interrupt_capability(adapter);
1283 * igb_request_irq - initialize interrupts
1285 * Attempts to configure interrupts using the best available
1286 * capabilities of the hardware and kernel.
1288 static int igb_request_irq(struct igb_adapter *adapter)
1290 struct net_device *netdev = adapter->netdev;
1291 struct pci_dev *pdev = adapter->pdev;
1294 if (adapter->msix_entries) {
1295 err = igb_request_msix(adapter);
1298 /* fall back to MSI */
1299 igb_free_all_tx_resources(adapter);
1300 igb_free_all_rx_resources(adapter);
1302 igb_clear_interrupt_scheme(adapter);
1303 igb_reset_sriov_capability(adapter);
1304 err = igb_init_interrupt_scheme(adapter, false);
1307 igb_setup_all_tx_resources(adapter);
1308 igb_setup_all_rx_resources(adapter);
1309 igb_configure(adapter);
1312 igb_assign_vector(adapter->q_vector[0], 0);
1314 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1315 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1316 netdev->name, adapter);
1320 /* fall back to legacy interrupts */
1321 igb_reset_interrupt_capability(adapter);
1322 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1325 err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1326 netdev->name, adapter);
1329 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1336 static void igb_free_irq(struct igb_adapter *adapter)
1338 if (adapter->msix_entries) {
1341 free_irq(adapter->msix_entries[vector++].vector, adapter);
1343 for (i = 0; i < adapter->num_q_vectors; i++)
1344 free_irq(adapter->msix_entries[vector++].vector,
1345 adapter->q_vector[i]);
1347 free_irq(adapter->pdev->irq, adapter);
1352 * igb_irq_disable - Mask off interrupt generation on the NIC
1353 * @adapter: board private structure
1355 static void igb_irq_disable(struct igb_adapter *adapter)
1357 struct e1000_hw *hw = &adapter->hw;
1360 * we need to be careful when disabling interrupts. The VFs are also
1361 * mapped into these registers and so clearing the bits can cause
1362 * issues on the VF drivers so we only need to clear what we set
1364 if (adapter->msix_entries) {
1365 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1366 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1367 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1368 regval = E1000_READ_REG(hw, E1000_EIAC);
1369 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1372 E1000_WRITE_REG(hw, E1000_IAM, 0);
1373 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1374 E1000_WRITE_FLUSH(hw);
1376 if (adapter->msix_entries) {
1379 synchronize_irq(adapter->msix_entries[vector++].vector);
1381 for (i = 0; i < adapter->num_q_vectors; i++)
1382 synchronize_irq(adapter->msix_entries[vector++].vector);
1384 synchronize_irq(adapter->pdev->irq);
1389 * igb_irq_enable - Enable default interrupt generation settings
1390 * @adapter: board private structure
1392 static void igb_irq_enable(struct igb_adapter *adapter)
1394 struct e1000_hw *hw = &adapter->hw;
1396 if (adapter->msix_entries) {
1397 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1398 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1399 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1400 regval = E1000_READ_REG(hw, E1000_EIAM);
1401 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1402 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1403 if (adapter->vfs_allocated_count) {
1404 E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1405 ims |= E1000_IMS_VMMB;
1407 if ((adapter->hw.mac.type == e1000_i350) ||
1408 (adapter->hw.mac.type == e1000_i354))
1409 ims |= E1000_IMS_MDDET;
1411 E1000_WRITE_REG(hw, E1000_IMS, ims);
1413 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1415 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1420 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1422 struct e1000_hw *hw = &adapter->hw;
1423 u16 vid = adapter->hw.mng_cookie.vlan_id;
1424 u16 old_vid = adapter->mng_vlan_id;
1426 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1427 /* add VID to filter table */
1428 igb_vfta_set(adapter, vid, TRUE);
1429 adapter->mng_vlan_id = vid;
1431 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1434 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1436 #ifdef HAVE_VLAN_RX_REGISTER
1437 !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1439 !test_bit(old_vid, adapter->active_vlans)) {
1441 /* remove VID from filter table */
1442 igb_vfta_set(adapter, old_vid, FALSE);
1447 * igb_release_hw_control - release control of the h/w to f/w
1448 * @adapter: address of board private structure
1450 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1451 * For ASF and Pass Through versions of f/w this means that the
1452 * driver is no longer loaded.
1455 static void igb_release_hw_control(struct igb_adapter *adapter)
1457 struct e1000_hw *hw = &adapter->hw;
1460 /* Let firmware take over control of h/w */
1461 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1462 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1463 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1467 * igb_get_hw_control - get control of the h/w from f/w
1468 * @adapter: address of board private structure
1470 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1471 * For ASF and Pass Through versions of f/w this means that
1472 * the driver is loaded.
1475 static void igb_get_hw_control(struct igb_adapter *adapter)
1477 struct e1000_hw *hw = &adapter->hw;
1480 /* Let firmware know the driver has taken over */
1481 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1482 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1483 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1487 * igb_configure - configure the hardware for RX and TX
1488 * @adapter: private board structure
1490 static void igb_configure(struct igb_adapter *adapter)
1492 struct net_device *netdev = adapter->netdev;
1495 igb_get_hw_control(adapter);
1496 igb_set_rx_mode(netdev);
1498 igb_restore_vlan(adapter);
1500 igb_setup_tctl(adapter);
1501 igb_setup_mrqc(adapter);
1502 igb_setup_rctl(adapter);
1504 igb_configure_tx(adapter);
1505 igb_configure_rx(adapter);
1507 e1000_rx_fifo_flush_82575(&adapter->hw);
1508 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1509 if (adapter->num_tx_queues > 1)
1510 netdev->features |= NETIF_F_MULTI_QUEUE;
1512 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1515 /* call igb_desc_unused which always leaves
1516 * at least 1 descriptor unused to make sure
1517 * next_to_use != next_to_clean */
1518 for (i = 0; i < adapter->num_rx_queues; i++) {
1519 struct igb_ring *ring = adapter->rx_ring[i];
1520 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1525 * igb_power_up_link - Power up the phy/serdes link
1526 * @adapter: address of board private structure
1528 void igb_power_up_link(struct igb_adapter *adapter)
1530 e1000_phy_hw_reset(&adapter->hw);
1532 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1533 e1000_power_up_phy(&adapter->hw);
1535 e1000_power_up_fiber_serdes_link(&adapter->hw);
1539 * igb_power_down_link - Power down the phy/serdes link
1540 * @adapter: address of board private structure
1542 static void igb_power_down_link(struct igb_adapter *adapter)
1544 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1545 e1000_power_down_phy(&adapter->hw);
1547 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1550 /* Detect and switch function for Media Auto Sense */
1551 static void igb_check_swap_media(struct igb_adapter *adapter)
1553 struct e1000_hw *hw = &adapter->hw;
1554 u32 ctrl_ext, connsw;
1555 bool swap_now = false;
1558 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1559 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1560 link = igb_has_link(adapter);
1562 /* need to live swap if current media is copper and we have fiber/serdes
1566 if ((hw->phy.media_type == e1000_media_type_copper) &&
1567 (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1569 } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1570 /* copper signal takes time to appear */
1571 if (adapter->copper_tries < 2) {
1572 adapter->copper_tries++;
1573 connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1574 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1577 adapter->copper_tries = 0;
1578 if ((connsw & E1000_CONNSW_PHYSD) &&
1579 (!(connsw & E1000_CONNSW_PHY_PDN))) {
1581 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1582 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1588 switch (hw->phy.media_type) {
1589 case e1000_media_type_copper:
1590 dev_info(pci_dev_to_dev(adapter->pdev),
1591 "%s:MAS: changing media to fiber/serdes\n",
1592 adapter->netdev->name);
1594 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1595 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1596 adapter->copper_tries = 0;
1598 case e1000_media_type_internal_serdes:
1599 case e1000_media_type_fiber:
1600 dev_info(pci_dev_to_dev(adapter->pdev),
1601 "%s:MAS: changing media to copper\n",
1602 adapter->netdev->name);
1604 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1605 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1608 /* shouldn't get here during regular operation */
1609 dev_err(pci_dev_to_dev(adapter->pdev),
1610 "%s:AMS: Invalid media type found, returning\n",
1611 adapter->netdev->name);
1614 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1618 #ifdef HAVE_I2C_SUPPORT
1619 /* igb_get_i2c_data - Reads the I2C SDA data bit
1620 * @hw: pointer to hardware structure
1621 * @i2cctl: Current value of I2CCTL register
1623 * Returns the I2C data bit value
1625 static int igb_get_i2c_data(void *data)
1627 struct igb_adapter *adapter = (struct igb_adapter *)data;
1628 struct e1000_hw *hw = &adapter->hw;
1629 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1631 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
1634 /* igb_set_i2c_data - Sets the I2C data bit
1635 * @data: pointer to hardware structure
1636 * @state: I2C data value (0 or 1) to set
1638 * Sets the I2C data bit
1640 static void igb_set_i2c_data(void *data, int state)
1642 struct igb_adapter *adapter = (struct igb_adapter *)data;
1643 struct e1000_hw *hw = &adapter->hw;
1644 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1647 i2cctl |= E1000_I2C_DATA_OUT;
1649 i2cctl &= ~E1000_I2C_DATA_OUT;
1651 i2cctl &= ~E1000_I2C_DATA_OE_N;
1652 i2cctl |= E1000_I2C_CLK_OE_N;
1654 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1655 E1000_WRITE_FLUSH(hw);
1659 /* igb_set_i2c_clk - Sets the I2C SCL clock
1660 * @data: pointer to hardware structure
1661 * @state: state to set clock
1663 * Sets the I2C clock line to state
1665 static void igb_set_i2c_clk(void *data, int state)
1667 struct igb_adapter *adapter = (struct igb_adapter *)data;
1668 struct e1000_hw *hw = &adapter->hw;
1669 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1672 i2cctl |= E1000_I2C_CLK_OUT;
1673 i2cctl &= ~E1000_I2C_CLK_OE_N;
1675 i2cctl &= ~E1000_I2C_CLK_OUT;
1676 i2cctl &= ~E1000_I2C_CLK_OE_N;
1678 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1679 E1000_WRITE_FLUSH(hw);
1682 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1683 * @data: pointer to hardware structure
1685 * Gets the I2C clock state
1687 static int igb_get_i2c_clk(void *data)
1689 struct igb_adapter *adapter = (struct igb_adapter *)data;
1690 struct e1000_hw *hw = &adapter->hw;
1691 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1693 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
1696 static const struct i2c_algo_bit_data igb_i2c_algo = {
1697 .setsda = igb_set_i2c_data,
1698 .setscl = igb_set_i2c_clk,
1699 .getsda = igb_get_i2c_data,
1700 .getscl = igb_get_i2c_clk,
1705 /* igb_init_i2c - Init I2C interface
1706 * @adapter: pointer to adapter structure
1709 static s32 igb_init_i2c(struct igb_adapter *adapter)
1711 s32 status = E1000_SUCCESS;
1713 /* I2C interface supported on i350 devices */
1714 if (adapter->hw.mac.type != e1000_i350)
1715 return E1000_SUCCESS;
1717 /* Initialize the i2c bus which is controlled by the registers.
1718 * This bus will use the i2c_algo_bit structue that implements
1719 * the protocol through toggling of the 4 bits in the register.
1721 adapter->i2c_adap.owner = THIS_MODULE;
1722 adapter->i2c_algo = igb_i2c_algo;
1723 adapter->i2c_algo.data = adapter;
1724 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1725 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1726 strlcpy(adapter->i2c_adap.name, "igb BB",
1727 sizeof(adapter->i2c_adap.name));
1728 status = i2c_bit_add_bus(&adapter->i2c_adap);
1732 #endif /* HAVE_I2C_SUPPORT */
1734 * igb_up - Open the interface and prepare it to handle traffic
1735 * @adapter: board private structure
1737 int igb_up(struct igb_adapter *adapter)
1739 struct e1000_hw *hw = &adapter->hw;
1742 /* hardware has been reset, we need to reload some things */
1743 igb_configure(adapter);
1745 clear_bit(__IGB_DOWN, &adapter->state);
1747 for (i = 0; i < adapter->num_q_vectors; i++)
1748 napi_enable(&(adapter->q_vector[i]->napi));
1750 if (adapter->msix_entries)
1751 igb_configure_msix(adapter);
1753 igb_assign_vector(adapter->q_vector[0], 0);
1755 igb_configure_lli(adapter);
1757 /* Clear any pending interrupts. */
1758 E1000_READ_REG(hw, E1000_ICR);
1759 igb_irq_enable(adapter);
1761 /* notify VFs that reset has been completed */
1762 if (adapter->vfs_allocated_count) {
1763 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1764 reg_data |= E1000_CTRL_EXT_PFRSTD;
1765 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1768 netif_tx_start_all_queues(adapter->netdev);
1770 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1771 schedule_work(&adapter->dma_err_task);
1772 /* start the watchdog. */
1773 hw->mac.get_link_status = 1;
1774 schedule_work(&adapter->watchdog_task);
1776 if ((adapter->flags & IGB_FLAG_EEE) &&
1777 (!hw->dev_spec._82575.eee_disable))
1778 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1783 void igb_down(struct igb_adapter *adapter)
1785 struct net_device *netdev = adapter->netdev;
1786 struct e1000_hw *hw = &adapter->hw;
1790 /* signal that we're down so the interrupt handler does not
1791 * reschedule our watchdog timer */
1792 set_bit(__IGB_DOWN, &adapter->state);
1794 /* disable receives in the hardware */
1795 rctl = E1000_READ_REG(hw, E1000_RCTL);
1796 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1797 /* flush and sleep below */
1799 netif_tx_stop_all_queues(netdev);
1801 /* disable transmits in the hardware */
1802 tctl = E1000_READ_REG(hw, E1000_TCTL);
1803 tctl &= ~E1000_TCTL_EN;
1804 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1805 /* flush both disables and wait for them to finish */
1806 E1000_WRITE_FLUSH(hw);
1807 usleep_range(10000, 20000);
1809 for (i = 0; i < adapter->num_q_vectors; i++)
1810 napi_disable(&(adapter->q_vector[i]->napi));
1812 igb_irq_disable(adapter);
1814 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1816 del_timer_sync(&adapter->watchdog_timer);
1817 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1818 del_timer_sync(&adapter->dma_err_timer);
1819 del_timer_sync(&adapter->phy_info_timer);
1821 netif_carrier_off(netdev);
1823 /* record the stats before reset*/
1824 igb_update_stats(adapter);
1826 adapter->link_speed = 0;
1827 adapter->link_duplex = 0;
1830 if (!pci_channel_offline(adapter->pdev))
1835 igb_clean_all_tx_rings(adapter);
1836 igb_clean_all_rx_rings(adapter);
1838 /* since we reset the hardware DCA settings were cleared */
1839 igb_setup_dca(adapter);
1843 void igb_reinit_locked(struct igb_adapter *adapter)
1845 WARN_ON(in_interrupt());
1846 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1847 usleep_range(1000, 2000);
1850 clear_bit(__IGB_RESETTING, &adapter->state);
1854 * igb_enable_mas - Media Autosense re-enable after swap
1856 * @adapter: adapter struct
1858 static s32 igb_enable_mas(struct igb_adapter *adapter)
1860 struct e1000_hw *hw = &adapter->hw;
1862 s32 ret_val = E1000_SUCCESS;
1864 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1865 if (hw->phy.media_type == e1000_media_type_copper) {
1866 /* configure for SerDes media detect */
1867 if (!(connsw & E1000_CONNSW_SERDESD)) {
1868 connsw |= E1000_CONNSW_ENRGSRC;
1869 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1870 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1871 E1000_WRITE_FLUSH(hw);
1872 } else if (connsw & E1000_CONNSW_SERDESD) {
1873 /* already SerDes, no need to enable anything */
1876 dev_info(pci_dev_to_dev(adapter->pdev),
1877 "%s:MAS: Unable to configure feature, disabling..\n",
1878 adapter->netdev->name);
1879 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1885 void igb_reset(struct igb_adapter *adapter)
1887 struct pci_dev *pdev = adapter->pdev;
1888 struct e1000_hw *hw = &adapter->hw;
1889 struct e1000_mac_info *mac = &hw->mac;
1890 struct e1000_fc_info *fc = &hw->fc;
1891 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1893 /* Repartition Pba for greater than 9k mtu
1894 * To take effect CTRL.RST is required.
1896 switch (mac->type) {
1900 pba = E1000_READ_REG(hw, E1000_RXPBS);
1901 pba = e1000_rxpbs_adjust_82580(pba);
1904 pba = E1000_READ_REG(hw, E1000_RXPBS);
1905 pba &= E1000_RXPBS_SIZE_MASK_82576;
1911 pba = E1000_PBA_34K;
1915 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1916 (mac->type < e1000_82576)) {
1917 /* adjust PBA for jumbo frames */
1918 E1000_WRITE_REG(hw, E1000_PBA, pba);
1920 /* To maintain wire speed transmits, the Tx FIFO should be
1921 * large enough to accommodate two full transmit packets,
1922 * rounded up to the next 1KB and expressed in KB. Likewise,
1923 * the Rx FIFO should be large enough to accommodate at least
1924 * one full receive packet and is similarly rounded up and
1925 * expressed in KB. */
1926 pba = E1000_READ_REG(hw, E1000_PBA);
1927 /* upper 16 bits has Tx packet buffer allocation size in KB */
1928 tx_space = pba >> 16;
1929 /* lower 16 bits has Rx packet buffer allocation size in KB */
1931 /* the tx fifo also stores 16 bytes of information about the tx
1932 * but don't include ethernet FCS because hardware appends it */
1933 min_tx_space = (adapter->max_frame_size +
1934 sizeof(union e1000_adv_tx_desc) -
1936 min_tx_space = ALIGN(min_tx_space, 1024);
1937 min_tx_space >>= 10;
1938 /* software strips receive CRC, so leave room for it */
1939 min_rx_space = adapter->max_frame_size;
1940 min_rx_space = ALIGN(min_rx_space, 1024);
1941 min_rx_space >>= 10;
1943 /* If current Tx allocation is less than the min Tx FIFO size,
1944 * and the min Tx FIFO size is less than the current Rx FIFO
1945 * allocation, take space away from current Rx allocation */
1946 if (tx_space < min_tx_space &&
1947 ((min_tx_space - tx_space) < pba)) {
1948 pba = pba - (min_tx_space - tx_space);
1950 /* if short on rx space, rx wins and must trump tx
1952 if (pba < min_rx_space)
1955 E1000_WRITE_REG(hw, E1000_PBA, pba);
1958 /* flow control settings */
1959 /* The high water mark must be low enough to fit one full frame
1960 * (or the size used for early receive) above it in the Rx FIFO.
1961 * Set it to the lower of:
1962 * - 90% of the Rx FIFO size, or
1963 * - the full Rx FIFO size minus one full frame */
1964 hwm = min(((pba << 10) * 9 / 10),
1965 ((pba << 10) - 2 * adapter->max_frame_size));
1967 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1968 fc->low_water = fc->high_water - 16;
1969 fc->pause_time = 0xFFFF;
1971 fc->current_mode = fc->requested_mode;
1973 /* disable receive for all VFs and wait one second */
1974 if (adapter->vfs_allocated_count) {
1977 * Clear all flags except indication that the PF has set
1978 * the VF MAC addresses administratively
1980 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1981 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1983 /* ping all the active vfs to let them know we are going down */
1984 igb_ping_all_vfs(adapter);
1986 /* disable transmits and receives */
1987 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1988 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1991 /* Allow time for pending master requests to run */
1993 E1000_WRITE_REG(hw, E1000_WUC, 0);
1995 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1996 e1000_setup_init_funcs(hw, TRUE);
1997 igb_check_options(adapter);
1998 e1000_get_bus_info(hw);
1999 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2001 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2002 if (igb_enable_mas(adapter))
2003 dev_err(pci_dev_to_dev(pdev),
2004 "Error enabling Media Auto Sense\n");
2006 if (e1000_init_hw(hw))
2007 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2010 * Flow control settings reset on hardware reset, so guarantee flow
2011 * control is off when forcing speed.
2013 if (!hw->mac.autoneg)
2014 e1000_force_mac_fc(hw);
2016 igb_init_dmac(adapter, pba);
2017 /* Re-initialize the thermal sensor on i350 devices. */
2018 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2020 * If present, re-initialize the external thermal sensor
2024 e1000_set_i2c_bb(hw);
2025 e1000_init_thermal_sensor_thresh(hw);
2028 /*Re-establish EEE setting */
2029 if (hw->phy.media_type == e1000_media_type_copper) {
2030 switch (mac->type) {
2034 e1000_set_eee_i350(hw);
2037 e1000_set_eee_i354(hw);
2044 if (!netif_running(adapter->netdev))
2045 igb_power_down_link(adapter);
2047 igb_update_mng_vlan(adapter);
2049 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2050 E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2053 #ifdef HAVE_PTP_1588_CLOCK
2054 /* Re-enable PTP, where applicable. */
2055 igb_ptp_reset(adapter);
2056 #endif /* HAVE_PTP_1588_CLOCK */
2058 e1000_get_phy_info(hw);
2063 #ifdef HAVE_NDO_SET_FEATURES
2064 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2065 kni_netdev_features_t features)
2068 * Since there is no support for separate tx vlan accel
2069 * enabled make sure tx flag is cleared if rx is.
2071 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2072 if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2073 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2075 if (!(features & NETIF_F_HW_VLAN_RX))
2076 features &= ~NETIF_F_HW_VLAN_TX;
2079 /* If Rx checksum is disabled, then LRO should also be disabled */
2080 if (!(features & NETIF_F_RXCSUM))
2081 features &= ~NETIF_F_LRO;
2086 static int igb_set_features(struct net_device *netdev,
2087 kni_netdev_features_t features)
2089 u32 changed = netdev->features ^ features;
2091 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2092 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2094 if (changed & NETIF_F_HW_VLAN_RX)
2096 igb_vlan_mode(netdev, features);
2102 #ifdef USE_CONST_DEV_UC_CHAR
2103 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2104 struct net_device *dev,
2105 const unsigned char *addr,
2106 #ifdef HAVE_NDO_FDB_ADD_VID
2111 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2112 struct net_device *dev,
2113 unsigned char *addr,
2117 struct igb_adapter *adapter = netdev_priv(dev);
2118 struct e1000_hw *hw = &adapter->hw;
2121 if (!(adapter->vfs_allocated_count))
2124 /* Hardware does not support aging addresses so if a
2125 * ndm_state is given only allow permanent addresses
2127 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2128 pr_info("%s: FDB only supports static addresses\n",
2133 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2134 u32 rar_uc_entries = hw->mac.rar_entry_count -
2135 (adapter->vfs_allocated_count + 1);
2137 if (netdev_uc_count(dev) < rar_uc_entries)
2138 err = dev_uc_add_excl(dev, addr);
2141 } else if (is_multicast_ether_addr(addr)) {
2142 err = dev_mc_add_excl(dev, addr);
2147 /* Only return duplicate errors if NLM_F_EXCL is set */
2148 if (err == -EEXIST && !(flags & NLM_F_EXCL))
2154 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2155 #ifdef USE_CONST_DEV_UC_CHAR
2156 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2157 struct net_device *dev,
2158 const unsigned char *addr)
2160 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2161 struct net_device *dev,
2162 unsigned char *addr)
2165 struct igb_adapter *adapter = netdev_priv(dev);
2166 int err = -EOPNOTSUPP;
2168 if (ndm->ndm_state & NUD_PERMANENT) {
2169 pr_info("%s: FDB only supports static addresses\n",
2174 if (adapter->vfs_allocated_count) {
2175 if (is_unicast_ether_addr(addr))
2176 err = dev_uc_del(dev, addr);
2177 else if (is_multicast_ether_addr(addr))
2178 err = dev_mc_del(dev, addr);
2186 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2187 struct netlink_callback *cb,
2188 struct net_device *dev,
2191 struct igb_adapter *adapter = netdev_priv(dev);
2193 if (adapter->vfs_allocated_count)
2194 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2198 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2200 #ifdef HAVE_BRIDGE_ATTRIBS
2201 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2202 static int igb_ndo_bridge_setlink(struct net_device *dev,
2203 struct nlmsghdr *nlh,
2206 static int igb_ndo_bridge_setlink(struct net_device *dev,
2207 struct nlmsghdr *nlh)
2208 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2210 struct igb_adapter *adapter = netdev_priv(dev);
2211 struct e1000_hw *hw = &adapter->hw;
2212 struct nlattr *attr, *br_spec;
2215 if (!(adapter->vfs_allocated_count))
2218 switch (adapter->hw.mac.type) {
2227 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2229 nla_for_each_nested(attr, br_spec, rem) {
2232 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2235 mode = nla_get_u16(attr);
2236 if (mode == BRIDGE_MODE_VEPA) {
2237 e1000_vmdq_set_loopback_pf(hw, 0);
2238 adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2239 } else if (mode == BRIDGE_MODE_VEB) {
2240 e1000_vmdq_set_loopback_pf(hw, 1);
2241 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2245 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2246 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2252 #ifdef HAVE_BRIDGE_FILTER
2253 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2254 struct net_device *dev, u32 filter_mask)
2256 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2257 struct net_device *dev)
2260 struct igb_adapter *adapter = netdev_priv(dev);
2263 if (!(adapter->vfs_allocated_count))
2266 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2267 mode = BRIDGE_MODE_VEB;
2269 mode = BRIDGE_MODE_VEPA;
2271 #ifdef HAVE_NDO_FDB_ADD_VID
2272 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2274 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2275 #endif /* HAVE_NDO_FDB_ADD_VID */
2277 #endif /* HAVE_BRIDGE_ATTRIBS */
2278 #endif /* NTF_SELF */
2280 #endif /* HAVE_NDO_SET_FEATURES */
2281 #ifdef HAVE_NET_DEVICE_OPS
2282 static const struct net_device_ops igb_netdev_ops = {
2283 .ndo_open = igb_open,
2284 .ndo_stop = igb_close,
2285 .ndo_start_xmit = igb_xmit_frame,
2286 .ndo_get_stats = igb_get_stats,
2287 .ndo_set_rx_mode = igb_set_rx_mode,
2288 .ndo_set_mac_address = igb_set_mac,
2289 .ndo_change_mtu = igb_change_mtu,
2290 .ndo_do_ioctl = igb_ioctl,
2291 .ndo_tx_timeout = igb_tx_timeout,
2292 .ndo_validate_addr = eth_validate_addr,
2293 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
2294 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
2296 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
2297 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
2298 #ifdef HAVE_VF_MIN_MAX_TXRATE
2299 .ndo_set_vf_rate = igb_ndo_set_vf_bw,
2300 #else /* HAVE_VF_MIN_MAX_TXRATE */
2301 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
2302 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2303 .ndo_get_vf_config = igb_ndo_get_vf_config,
2304 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2305 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
2306 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2307 #endif /* IFLA_VF_MAX */
2308 #ifdef CONFIG_NET_POLL_CONTROLLER
2309 .ndo_poll_controller = igb_netpoll,
2311 #ifdef HAVE_NDO_SET_FEATURES
2312 .ndo_fix_features = igb_fix_features,
2313 .ndo_set_features = igb_set_features,
2315 #ifdef HAVE_VLAN_RX_REGISTER
2316 .ndo_vlan_rx_register = igb_vlan_mode,
2318 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2320 .ndo_fdb_add = igb_ndo_fdb_add,
2321 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2322 .ndo_fdb_del = igb_ndo_fdb_del,
2323 .ndo_fdb_dump = igb_ndo_fdb_dump,
2325 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2326 #ifdef HAVE_BRIDGE_ATTRIBS
2327 .ndo_bridge_setlink = igb_ndo_bridge_setlink,
2328 .ndo_bridge_getlink = igb_ndo_bridge_getlink,
2329 #endif /* HAVE_BRIDGE_ATTRIBS */
2333 #ifdef CONFIG_IGB_VMDQ_NETDEV
2334 static const struct net_device_ops igb_vmdq_ops = {
2335 .ndo_open = &igb_vmdq_open,
2336 .ndo_stop = &igb_vmdq_close,
2337 .ndo_start_xmit = &igb_vmdq_xmit_frame,
2338 .ndo_get_stats = &igb_vmdq_get_stats,
2339 .ndo_set_rx_mode = &igb_vmdq_set_rx_mode,
2340 .ndo_validate_addr = eth_validate_addr,
2341 .ndo_set_mac_address = &igb_vmdq_set_mac,
2342 .ndo_change_mtu = &igb_vmdq_change_mtu,
2343 .ndo_tx_timeout = &igb_vmdq_tx_timeout,
2344 .ndo_vlan_rx_register = &igb_vmdq_vlan_rx_register,
2345 .ndo_vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid,
2346 .ndo_vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid,
2349 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2350 #endif /* HAVE_NET_DEVICE_OPS */
2351 #ifdef CONFIG_IGB_VMDQ_NETDEV
2352 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2354 #ifdef HAVE_NET_DEVICE_OPS
2355 vnetdev->netdev_ops = &igb_vmdq_ops;
2357 dev->open = &igb_vmdq_open;
2358 dev->stop = &igb_vmdq_close;
2359 dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2360 dev->get_stats = &igb_vmdq_get_stats;
2361 #ifdef HAVE_SET_RX_MODE
2362 dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2364 dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2365 dev->set_mac_address = &igb_vmdq_set_mac;
2366 dev->change_mtu = &igb_vmdq_change_mtu;
2367 #ifdef HAVE_TX_TIMEOUT
2368 dev->tx_timeout = &igb_vmdq_tx_timeout;
2370 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2371 dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2372 dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2373 dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2376 igb_vmdq_set_ethtool_ops(vnetdev);
2377 vnetdev->watchdog_timeo = 5 * HZ;
2381 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2383 int pool, err = 0, base_queue;
2384 struct net_device *vnetdev;
2385 struct igb_vmdq_adapter *vmdq_adapter;
2387 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2388 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2389 base_queue = pool * qpp;
2390 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2395 vmdq_adapter = netdev_priv(vnetdev);
2396 vmdq_adapter->vnetdev = vnetdev;
2397 vmdq_adapter->real_adapter = adapter;
2398 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2399 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2400 igb_assign_vmdq_netdev_ops(vnetdev);
2401 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2402 adapter->netdev->name, pool);
2403 vnetdev->features = adapter->netdev->features;
2404 #ifdef HAVE_NETDEV_VLAN_FEATURES
2405 vnetdev->vlan_features = adapter->netdev->vlan_features;
2407 adapter->vmdq_netdev[pool-1] = vnetdev;
2408 err = register_netdev(vnetdev);
2415 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2419 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2420 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2421 free_netdev(adapter->vmdq_netdev[pool-1]);
2422 adapter->vmdq_netdev[pool-1] = NULL;
2426 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2429 * igb_set_fw_version - Configure version string for ethtool
2430 * @adapter: adapter struct
2433 static void igb_set_fw_version(struct igb_adapter *adapter)
2435 struct e1000_hw *hw = &adapter->hw;
2436 struct e1000_fw_version fw;
2438 e1000_get_fw_version(hw, &fw);
2440 switch (hw->mac.type) {
2443 if (!(e1000_get_flash_presence_i210(hw))) {
2444 snprintf(adapter->fw_version,
2445 sizeof(adapter->fw_version),
2447 fw.invm_major, fw.invm_minor, fw.invm_img_type);
2452 /* if option rom is valid, display its version too*/
2454 snprintf(adapter->fw_version,
2455 sizeof(adapter->fw_version),
2456 "%d.%d, 0x%08x, %d.%d.%d",
2457 fw.eep_major, fw.eep_minor, fw.etrack_id,
2458 fw.or_major, fw.or_build, fw.or_patch);
2461 if (fw.etrack_id != 0X0000) {
2462 snprintf(adapter->fw_version,
2463 sizeof(adapter->fw_version),
2465 fw.eep_major, fw.eep_minor, fw.etrack_id);
2467 snprintf(adapter->fw_version,
2468 sizeof(adapter->fw_version),
2470 fw.eep_major, fw.eep_minor, fw.eep_build);
2480 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2482 * @adapter: adapter struct
2484 static void igb_init_mas(struct igb_adapter *adapter)
2486 struct e1000_hw *hw = &adapter->hw;
2489 e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2490 switch (hw->bus.func) {
2492 if (eeprom_data & IGB_MAS_ENABLE_0)
2493 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2496 if (eeprom_data & IGB_MAS_ENABLE_1)
2497 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2500 if (eeprom_data & IGB_MAS_ENABLE_2)
2501 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2504 if (eeprom_data & IGB_MAS_ENABLE_3)
2505 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2508 /* Shouldn't get here */
2509 dev_err(pci_dev_to_dev(adapter->pdev),
2510 "%s:AMS: Invalid port configuration, returning\n",
2511 adapter->netdev->name);
2517 * igb_probe - Device Initialization Routine
2518 * @pdev: PCI device information struct
2519 * @ent: entry in igb_pci_tbl
2521 * Returns 0 on success, negative on failure
2523 * igb_probe initializes an adapter identified by a pci_dev structure.
2524 * The OS initialization, configuring of the adapter private structure,
2525 * and a hardware reset occur.
2527 static int __devinit igb_probe(struct pci_dev *pdev,
2528 const struct pci_device_id *ent)
2530 struct net_device *netdev;
2531 struct igb_adapter *adapter;
2532 struct e1000_hw *hw;
2533 u16 eeprom_data = 0;
2534 u8 pba_str[E1000_PBANUM_LENGTH];
2536 static int global_quad_port_a; /* global quad port a indication */
2537 int i, err, pci_using_dac;
2538 static int cards_found;
2540 err = pci_enable_device_mem(pdev);
2545 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2547 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2551 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2553 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2555 IGB_ERR("No usable DMA configuration, "
2562 #ifndef HAVE_ASPM_QUIRKS
2563 /* 82575 requires that the pci-e link partner disable the L0s state */
2564 switch (pdev->device) {
2565 case E1000_DEV_ID_82575EB_COPPER:
2566 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2567 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2568 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2573 #endif /* HAVE_ASPM_QUIRKS */
2574 err = pci_request_selected_regions(pdev,
2575 pci_select_bars(pdev,
2581 pci_enable_pcie_error_reporting(pdev);
2583 pci_set_master(pdev);
2587 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2590 netdev = alloc_etherdev(sizeof(struct igb_adapter));
2591 #endif /* HAVE_TX_MQ */
2593 goto err_alloc_etherdev;
2595 SET_MODULE_OWNER(netdev);
2596 SET_NETDEV_DEV(netdev, &pdev->dev);
2598 pci_set_drvdata(pdev, netdev);
2599 adapter = netdev_priv(netdev);
2600 adapter->netdev = netdev;
2601 adapter->pdev = pdev;
2604 adapter->port_num = hw->bus.func;
2605 adapter->msg_enable = (1 << debug) - 1;
2608 err = pci_save_state(pdev);
2613 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2614 pci_resource_len(pdev, 0));
2618 #ifdef HAVE_NET_DEVICE_OPS
2619 netdev->netdev_ops = &igb_netdev_ops;
2620 #else /* HAVE_NET_DEVICE_OPS */
2621 netdev->open = &igb_open;
2622 netdev->stop = &igb_close;
2623 netdev->get_stats = &igb_get_stats;
2624 #ifdef HAVE_SET_RX_MODE
2625 netdev->set_rx_mode = &igb_set_rx_mode;
2627 netdev->set_multicast_list = &igb_set_rx_mode;
2628 netdev->set_mac_address = &igb_set_mac;
2629 netdev->change_mtu = &igb_change_mtu;
2630 netdev->do_ioctl = &igb_ioctl;
2631 #ifdef HAVE_TX_TIMEOUT
2632 netdev->tx_timeout = &igb_tx_timeout;
2634 netdev->vlan_rx_register = igb_vlan_mode;
2635 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2636 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2637 #ifdef CONFIG_NET_POLL_CONTROLLER
2638 netdev->poll_controller = igb_netpoll;
2640 netdev->hard_start_xmit = &igb_xmit_frame;
2641 #endif /* HAVE_NET_DEVICE_OPS */
2642 igb_set_ethtool_ops(netdev);
2643 #ifdef HAVE_TX_TIMEOUT
2644 netdev->watchdog_timeo = 5 * HZ;
2647 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2649 adapter->bd_number = cards_found;
2651 /* setup the private structure */
2652 err = igb_sw_init(adapter);
2656 e1000_get_bus_info(hw);
2658 hw->phy.autoneg_wait_to_complete = FALSE;
2659 hw->mac.adaptive_ifs = FALSE;
2661 /* Copper options */
2662 if (hw->phy.media_type == e1000_media_type_copper) {
2663 hw->phy.mdix = AUTO_ALL_MODES;
2664 hw->phy.disable_polarity_correction = FALSE;
2665 hw->phy.ms_type = e1000_ms_hw_default;
2668 if (e1000_check_reset_block(hw))
2669 dev_info(pci_dev_to_dev(pdev),
2670 "PHY reset is blocked due to SOL/IDER session.\n");
2673 * features is initialized to 0 in allocation, it might have bits
2674 * set by igb_sw_init so we should use an or instead of an
2677 netdev->features |= NETIF_F_SG |
2679 #ifdef NETIF_F_IPV6_CSUM
2687 #endif /* NETIF_F_TSO */
2688 #ifdef NETIF_F_RXHASH
2692 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2693 NETIF_F_HW_VLAN_CTAG_RX |
2694 NETIF_F_HW_VLAN_CTAG_TX;
2696 NETIF_F_HW_VLAN_RX |
2700 if (hw->mac.type >= e1000_82576)
2701 netdev->features |= NETIF_F_SCTP_CSUM;
2703 #ifdef HAVE_NDO_SET_FEATURES
2704 /* copy netdev features into list of user selectable features */
2705 netdev->hw_features |= netdev->features;
2708 /* give us the option of enabling LRO later */
2709 netdev->hw_features |= NETIF_F_LRO;
2714 /* this is only needed on kernels prior to 2.6.39 */
2715 netdev->features |= NETIF_F_GRO;
2719 /* set this bit last since it cannot be part of hw_features */
2720 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2721 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2723 netdev->features |= NETIF_F_HW_VLAN_FILTER;
2726 #ifdef HAVE_NETDEV_VLAN_FEATURES
2727 netdev->vlan_features |= NETIF_F_TSO |
2735 netdev->features |= NETIF_F_HIGHDMA;
2737 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2739 if (adapter->dmac != IGB_DMAC_DISABLE)
2740 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2743 /* before reading the NVM, reset the controller to put the device in a
2744 * known good starting state */
2747 /* make sure the NVM is good */
2748 if (e1000_validate_nvm_checksum(hw) < 0) {
2749 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2755 /* copy the MAC address out of the NVM */
2756 if (e1000_read_mac_addr(hw))
2757 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2758 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2759 #ifdef ETHTOOL_GPERMADDR
2760 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2762 if (!is_valid_ether_addr(netdev->perm_addr)) {
2764 if (!is_valid_ether_addr(netdev->dev_addr)) {
2766 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2771 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2772 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2773 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2774 igb_rar_set(adapter, 0);
2776 /* get firmware version for ethtool -i */
2777 igb_set_fw_version(adapter);
2779 /* Check if Media Autosense is enabled */
2780 if (hw->mac.type == e1000_82580)
2781 igb_init_mas(adapter);
2782 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2783 (unsigned long) adapter);
2784 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2785 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2786 (unsigned long) adapter);
2787 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2788 (unsigned long) adapter);
2790 INIT_WORK(&adapter->reset_task, igb_reset_task);
2791 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2792 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2793 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2795 /* Initialize link properties that are user-changeable */
2796 adapter->fc_autoneg = true;
2797 hw->mac.autoneg = true;
2798 hw->phy.autoneg_advertised = 0x2f;
2800 hw->fc.requested_mode = e1000_fc_default;
2801 hw->fc.current_mode = e1000_fc_default;
2803 e1000_validate_mdi_setting(hw);
2805 /* By default, support wake on port A */
2806 if (hw->bus.func == 0)
2807 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2809 /* Check the NVM for wake support for non-port A ports */
2810 if (hw->mac.type >= e1000_82580)
2811 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2812 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2814 else if (hw->bus.func == 1)
2815 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2817 if (eeprom_data & IGB_EEPROM_APME)
2818 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2820 /* now that we have the eeprom settings, apply the special cases where
2821 * the eeprom may be wrong or the board simply won't support wake on
2822 * lan on a particular port */
2823 switch (pdev->device) {
2824 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2825 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2827 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2828 case E1000_DEV_ID_82576_FIBER:
2829 case E1000_DEV_ID_82576_SERDES:
2830 /* Wake events only supported on port A for dual fiber
2831 * regardless of eeprom setting */
2832 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2833 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2835 case E1000_DEV_ID_82576_QUAD_COPPER:
2836 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2837 /* if quad port adapter, disable WoL on all but port A */
2838 if (global_quad_port_a != 0)
2839 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2841 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2842 /* Reset for multiple quad port adapters */
2843 if (++global_quad_port_a == 4)
2844 global_quad_port_a = 0;
2847 /* If the device can't wake, don't set software support */
2848 if (!device_can_wakeup(&adapter->pdev->dev))
2849 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2853 /* initialize the wol settings based on the eeprom settings */
2854 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2855 adapter->wol |= E1000_WUFC_MAG;
2857 /* Some vendors want WoL disabled by default, but still supported */
2858 if ((hw->mac.type == e1000_i350) &&
2859 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2860 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2864 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2865 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2867 /* reset the hardware with the new settings */
2871 #ifdef HAVE_I2C_SUPPORT
2872 /* Init the I2C interface */
2873 err = igb_init_i2c(adapter);
2875 dev_err(&pdev->dev, "failed to init i2c interface\n");
2878 #endif /* HAVE_I2C_SUPPORT */
2880 /* let the f/w know that the h/w is now under the control of the
2882 igb_get_hw_control(adapter);
2884 strncpy(netdev->name, "eth%d", IFNAMSIZ);
2885 err = register_netdev(netdev);
2889 #ifdef CONFIG_IGB_VMDQ_NETDEV
2890 err = igb_init_vmdq_netdevs(adapter);
2894 /* carrier off reporting is important to ethtool even BEFORE open */
2895 netif_carrier_off(netdev);
2898 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2899 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2900 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2901 igb_setup_dca(adapter);
2905 #ifdef HAVE_PTP_1588_CLOCK
2906 /* do hw tstamp init after resetting */
2907 igb_ptp_init(adapter);
2908 #endif /* HAVE_PTP_1588_CLOCK */
2910 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2911 /* print bus type/speed/width info */
2912 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2914 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2915 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2916 (hw->mac.type == e1000_i354) ? "integrated" :
2918 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2919 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2920 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2921 (hw->mac.type == e1000_i354) ? "integrated" :
2923 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2924 for (i = 0; i < 6; i++)
2925 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2927 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2929 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2930 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2934 /* Initialize the thermal sensor on i350 devices. */
2935 if (hw->mac.type == e1000_i350) {
2936 if (hw->bus.func == 0) {
2940 * Read the NVM to determine if this i350 device
2941 * supports an external thermal sensor.
2943 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2944 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2945 adapter->ets = true;
2947 adapter->ets = false;
2951 igb_sysfs_init(adapter);
2955 igb_procfs_init(adapter);
2956 #endif /* IGB_PROCFS */
2957 #endif /* IGB_HWMON */
2959 adapter->ets = false;
2962 if (hw->phy.media_type == e1000_media_type_copper) {
2963 switch (hw->mac.type) {
2967 /* Enable EEE for internal copper PHY devices */
2968 err = e1000_set_eee_i350(hw);
2970 (adapter->flags & IGB_FLAG_EEE))
2971 adapter->eee_advert =
2972 MDIO_EEE_100TX | MDIO_EEE_1000T;
2975 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2976 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2977 err = e1000_set_eee_i354(hw);
2979 (adapter->flags & IGB_FLAG_EEE))
2980 adapter->eee_advert =
2981 MDIO_EEE_100TX | MDIO_EEE_1000T;
2989 /* send driver version info to firmware */
2990 if (hw->mac.type >= e1000_i350)
2991 igb_init_fw(adapter);
2994 if (netdev->features & NETIF_F_LRO)
2995 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
2997 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
2999 dev_info(pci_dev_to_dev(pdev),
3000 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3001 adapter->msix_entries ? "MSI-X" :
3002 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3003 adapter->num_rx_queues, adapter->num_tx_queues);
3007 pm_runtime_put_noidle(&pdev->dev);
3011 igb_release_hw_control(adapter);
3012 #ifdef HAVE_I2C_SUPPORT
3013 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3014 #endif /* HAVE_I2C_SUPPORT */
3016 if (!e1000_check_reset_block(hw))
3017 e1000_phy_hw_reset(hw);
3019 if (hw->flash_address)
3020 iounmap(hw->flash_address);
3022 igb_clear_interrupt_scheme(adapter);
3023 igb_reset_sriov_capability(adapter);
3024 iounmap(hw->hw_addr);
3026 free_netdev(netdev);
3028 pci_release_selected_regions(pdev,
3029 pci_select_bars(pdev, IORESOURCE_MEM));
3032 pci_disable_device(pdev);
3035 #ifdef HAVE_I2C_SUPPORT
3037 * igb_remove_i2c - Cleanup I2C interface
3038 * @adapter: pointer to adapter structure
3041 static void igb_remove_i2c(struct igb_adapter *adapter)
3044 /* free the adapter bus structure */
3045 i2c_del_adapter(&adapter->i2c_adap);
3047 #endif /* HAVE_I2C_SUPPORT */
3050 * igb_remove - Device Removal Routine
3051 * @pdev: PCI device information struct
3053 * igb_remove is called by the PCI subsystem to alert the driver
3054 * that it should release a PCI device. The could be caused by a
3055 * Hot-Plug event, or because the driver is going to be removed from
3058 static void __devexit igb_remove(struct pci_dev *pdev)
3060 struct net_device *netdev = pci_get_drvdata(pdev);
3061 struct igb_adapter *adapter = netdev_priv(netdev);
3062 struct e1000_hw *hw = &adapter->hw;
3064 pm_runtime_get_noresume(&pdev->dev);
3065 #ifdef HAVE_I2C_SUPPORT
3066 igb_remove_i2c(adapter);
3067 #endif /* HAVE_I2C_SUPPORT */
3068 #ifdef HAVE_PTP_1588_CLOCK
3069 igb_ptp_stop(adapter);
3070 #endif /* HAVE_PTP_1588_CLOCK */
3072 /* flush_scheduled work may reschedule our watchdog task, so
3073 * explicitly disable watchdog tasks from being rescheduled */
3074 set_bit(__IGB_DOWN, &adapter->state);
3075 del_timer_sync(&adapter->watchdog_timer);
3076 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3077 del_timer_sync(&adapter->dma_err_timer);
3078 del_timer_sync(&adapter->phy_info_timer);
3080 flush_scheduled_work();
3083 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3084 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3085 dca_remove_requester(&pdev->dev);
3086 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3087 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3091 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3092 * would have already happened in close and is redundant. */
3093 igb_release_hw_control(adapter);
3095 unregister_netdev(netdev);
3096 #ifdef CONFIG_IGB_VMDQ_NETDEV
3097 igb_remove_vmdq_netdevs(adapter);
3100 igb_clear_interrupt_scheme(adapter);
3101 igb_reset_sriov_capability(adapter);
3103 iounmap(hw->hw_addr);
3104 if (hw->flash_address)
3105 iounmap(hw->flash_address);
3106 pci_release_selected_regions(pdev,
3107 pci_select_bars(pdev, IORESOURCE_MEM));
3110 igb_sysfs_exit(adapter);
3113 igb_procfs_exit(adapter);
3114 #endif /* IGB_PROCFS */
3115 #endif /* IGB_HWMON */
3116 kfree(adapter->mac_table);
3117 kfree(adapter->shadow_vfta);
3118 free_netdev(netdev);
3120 pci_disable_pcie_error_reporting(pdev);
3122 pci_disable_device(pdev);
3126 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3127 * @adapter: board private structure to initialize
3129 * igb_sw_init initializes the Adapter private data structure.
3130 * Fields are initialized based on PCI device information and
3131 * OS network device settings (MTU size).
3133 static int igb_sw_init(struct igb_adapter *adapter)
3135 struct e1000_hw *hw = &adapter->hw;
3136 struct net_device *netdev = adapter->netdev;
3137 struct pci_dev *pdev = adapter->pdev;
3139 /* PCI config space info */
3141 hw->vendor_id = pdev->vendor;
3142 hw->device_id = pdev->device;
3143 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3144 hw->subsystem_device_id = pdev->subsystem_device;
3146 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3148 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3150 /* set default ring sizes */
3151 adapter->tx_ring_count = IGB_DEFAULT_TXD;
3152 adapter->rx_ring_count = IGB_DEFAULT_RXD;
3154 /* set default work limits */
3155 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3157 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3160 /* Initialize the hardware-specific values */
3161 if (e1000_setup_init_funcs(hw, TRUE)) {
3162 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3166 adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3167 hw->mac.rar_entry_count,
3170 /* Setup and initialize a copy of the hw vlan table array */
3171 adapter->shadow_vfta = (u32 *)kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3174 /* These calls may decrease the number of queues */
3175 if (hw->mac.type < e1000_i210) {
3176 igb_set_sriov_capability(adapter);
3179 if (igb_init_interrupt_scheme(adapter, true)) {
3180 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3184 /* Explicitly disable IRQ since the NIC can be in any state. */
3185 igb_irq_disable(adapter);
3187 set_bit(__IGB_DOWN, &adapter->state);
3193 * igb_open - Called when a network interface is made active
3194 * @netdev: network interface device structure
3196 * Returns 0 on success, negative value on failure
3198 * The open entry point is called when a network interface is made
3199 * active by the system (IFF_UP). At this point all resources needed
3200 * for transmit and receive operations are allocated, the interrupt
3201 * handler is registered with the OS, the watchdog timer is started,
3202 * and the stack is notified that the interface is ready.
3204 static int __igb_open(struct net_device *netdev, bool resuming)
3206 struct igb_adapter *adapter = netdev_priv(netdev);
3207 struct e1000_hw *hw = &adapter->hw;
3208 #ifdef CONFIG_PM_RUNTIME
3209 struct pci_dev *pdev = adapter->pdev;
3210 #endif /* CONFIG_PM_RUNTIME */
3214 /* disallow open during test */
3215 if (test_bit(__IGB_TESTING, &adapter->state)) {
3220 #ifdef CONFIG_PM_RUNTIME
3222 pm_runtime_get_sync(&pdev->dev);
3223 #endif /* CONFIG_PM_RUNTIME */
3225 netif_carrier_off(netdev);
3227 /* allocate transmit descriptors */
3228 err = igb_setup_all_tx_resources(adapter);
3232 /* allocate receive descriptors */
3233 err = igb_setup_all_rx_resources(adapter);
3237 igb_power_up_link(adapter);
3239 /* before we allocate an interrupt, we must be ready to handle it.
3240 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3241 * as soon as we call pci_request_irq, so we have to setup our
3242 * clean_rx handler before we do so. */
3243 igb_configure(adapter);
3245 err = igb_request_irq(adapter);
3249 /* Notify the stack of the actual queue counts. */
3250 netif_set_real_num_tx_queues(netdev,
3251 adapter->vmdq_pools ? 1 :
3252 adapter->num_tx_queues);
3254 err = netif_set_real_num_rx_queues(netdev,
3255 adapter->vmdq_pools ? 1 :
3256 adapter->num_rx_queues);
3258 goto err_set_queues;
3260 /* From here on the code is the same as igb_up() */
3261 clear_bit(__IGB_DOWN, &adapter->state);
3263 for (i = 0; i < adapter->num_q_vectors; i++)
3264 napi_enable(&(adapter->q_vector[i]->napi));
3265 igb_configure_lli(adapter);
3267 /* Clear any pending interrupts. */
3268 E1000_READ_REG(hw, E1000_ICR);
3270 igb_irq_enable(adapter);
3272 /* notify VFs that reset has been completed */
3273 if (adapter->vfs_allocated_count) {
3274 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3275 reg_data |= E1000_CTRL_EXT_PFRSTD;
3276 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3279 netif_tx_start_all_queues(netdev);
3281 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3282 schedule_work(&adapter->dma_err_task);
3284 /* start the watchdog. */
3285 hw->mac.get_link_status = 1;
3286 schedule_work(&adapter->watchdog_task);
3288 return E1000_SUCCESS;
3291 igb_free_irq(adapter);
3293 igb_release_hw_control(adapter);
3294 igb_power_down_link(adapter);
3295 igb_free_all_rx_resources(adapter);
3297 igb_free_all_tx_resources(adapter);
3301 #ifdef CONFIG_PM_RUNTIME
3303 pm_runtime_put(&pdev->dev);
3304 #endif /* CONFIG_PM_RUNTIME */
3309 static int igb_open(struct net_device *netdev)
3311 return __igb_open(netdev, false);
3315 * igb_close - Disables a network interface
3316 * @netdev: network interface device structure
3318 * Returns 0, this is not allowed to fail
3320 * The close entry point is called when an interface is de-activated
3321 * by the OS. The hardware is still under the driver's control, but
3322 * needs to be disabled. A global MAC reset is issued to stop the
3323 * hardware, and all transmit and receive resources are freed.
3325 static int __igb_close(struct net_device *netdev, bool suspending)
3327 struct igb_adapter *adapter = netdev_priv(netdev);
3328 #ifdef CONFIG_PM_RUNTIME
3329 struct pci_dev *pdev = adapter->pdev;
3330 #endif /* CONFIG_PM_RUNTIME */
3332 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3334 #ifdef CONFIG_PM_RUNTIME
3336 pm_runtime_get_sync(&pdev->dev);
3337 #endif /* CONFIG_PM_RUNTIME */
3341 igb_release_hw_control(adapter);
3343 igb_free_irq(adapter);
3345 igb_free_all_tx_resources(adapter);
3346 igb_free_all_rx_resources(adapter);
3348 #ifdef CONFIG_PM_RUNTIME
3350 pm_runtime_put_sync(&pdev->dev);
3351 #endif /* CONFIG_PM_RUNTIME */
3356 static int igb_close(struct net_device *netdev)
3358 return __igb_close(netdev, false);
3362 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3363 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3365 * Return 0 on success, negative on failure
3367 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3369 struct device *dev = tx_ring->dev;
3372 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3373 tx_ring->tx_buffer_info = vzalloc(size);
3374 if (!tx_ring->tx_buffer_info)
3377 /* round up to nearest 4K */
3378 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3379 tx_ring->size = ALIGN(tx_ring->size, 4096);
3381 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3382 &tx_ring->dma, GFP_KERNEL);
3387 tx_ring->next_to_use = 0;
3388 tx_ring->next_to_clean = 0;
3393 vfree(tx_ring->tx_buffer_info);
3395 "Unable to allocate memory for the transmit descriptor ring\n");
3400 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3401 * (Descriptors) for all queues
3402 * @adapter: board private structure
3404 * Return 0 on success, negative on failure
3406 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3408 struct pci_dev *pdev = adapter->pdev;
3411 for (i = 0; i < adapter->num_tx_queues; i++) {
3412 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3414 dev_err(pci_dev_to_dev(pdev),
3415 "Allocation for Tx Queue %u failed\n", i);
3416 for (i--; i >= 0; i--)
3417 igb_free_tx_resources(adapter->tx_ring[i]);
3426 * igb_setup_tctl - configure the transmit control registers
3427 * @adapter: Board private structure
3429 void igb_setup_tctl(struct igb_adapter *adapter)
3431 struct e1000_hw *hw = &adapter->hw;
3434 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3435 E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3437 /* Program the Transmit Control Register */
3438 tctl = E1000_READ_REG(hw, E1000_TCTL);
3439 tctl &= ~E1000_TCTL_CT;
3440 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3441 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3443 e1000_config_collision_dist(hw);
3445 /* Enable transmits */
3446 tctl |= E1000_TCTL_EN;
3448 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3451 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3453 struct e1000_hw *hw = &adapter->hw;
3454 switch (hw->mac.type) {
3458 if (adapter->msix_entries)
3468 * igb_configure_tx_ring - Configure transmit ring after Reset
3469 * @adapter: board private structure
3470 * @ring: tx ring to configure
3472 * Configure a transmit ring after a reset.
3474 void igb_configure_tx_ring(struct igb_adapter *adapter,
3475 struct igb_ring *ring)
3477 struct e1000_hw *hw = &adapter->hw;
3479 u64 tdba = ring->dma;
3480 int reg_idx = ring->reg_idx;
3482 /* disable the queue */
3483 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3484 E1000_WRITE_FLUSH(hw);
3487 E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3488 ring->count * sizeof(union e1000_adv_tx_desc));
3489 E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3490 tdba & 0x00000000ffffffffULL);
3491 E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3493 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3494 E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3495 writel(0, ring->tail);
3497 txdctl |= IGB_TX_PTHRESH;
3498 txdctl |= IGB_TX_HTHRESH << 8;
3499 txdctl |= igb_tx_wthresh(adapter) << 16;
3501 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3502 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3506 * igb_configure_tx - Configure transmit Unit after Reset
3507 * @adapter: board private structure
3509 * Configure the Tx unit of the MAC after a reset.
3511 static void igb_configure_tx(struct igb_adapter *adapter)
3515 for (i = 0; i < adapter->num_tx_queues; i++)
3516 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3520 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3521 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3523 * Returns 0 on success, negative on failure
3525 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3527 struct device *dev = rx_ring->dev;
3530 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3531 rx_ring->rx_buffer_info = vzalloc(size);
3532 if (!rx_ring->rx_buffer_info)
3535 desc_len = sizeof(union e1000_adv_rx_desc);
3537 /* Round up to nearest 4K */
3538 rx_ring->size = rx_ring->count * desc_len;
3539 rx_ring->size = ALIGN(rx_ring->size, 4096);
3541 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3542 &rx_ring->dma, GFP_KERNEL);
3547 rx_ring->next_to_alloc = 0;
3548 rx_ring->next_to_clean = 0;
3549 rx_ring->next_to_use = 0;
3554 vfree(rx_ring->rx_buffer_info);
3555 rx_ring->rx_buffer_info = NULL;
3556 dev_err(dev, "Unable to allocate memory for the receive descriptor"
3562 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3563 * (Descriptors) for all queues
3564 * @adapter: board private structure
3566 * Return 0 on success, negative on failure
3568 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3570 struct pci_dev *pdev = adapter->pdev;
3573 for (i = 0; i < adapter->num_rx_queues; i++) {
3574 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3576 dev_err(pci_dev_to_dev(pdev),
3577 "Allocation for Rx Queue %u failed\n", i);
3578 for (i--; i >= 0; i--)
3579 igb_free_rx_resources(adapter->rx_ring[i]);
3588 * igb_setup_mrqc - configure the multiple receive queue control registers
3589 * @adapter: Board private structure
3591 static void igb_setup_mrqc(struct igb_adapter *adapter)
3593 struct e1000_hw *hw = &adapter->hw;
3595 u32 j, num_rx_queues, shift = 0, shift2 = 0;
3596 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3597 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3598 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3601 /* Fill out hash function seeds */
3602 for (j = 0; j < 10; j++)
3603 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3605 num_rx_queues = adapter->rss_queues;
3607 /* 82575 and 82576 supports 2 RSS queues for VMDq */
3608 switch (hw->mac.type) {
3610 if (adapter->vmdq_pools) {
3618 /* 82576 supports 2 RSS queues for SR-IOV */
3619 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3629 * Populate the redirection table 4 entries at a time. To do this
3630 * we are generating the results for n and n+2 and then interleaving
3631 * those with the results with n+1 and n+3.
3633 for (j = 0; j < 32; j++) {
3634 /* first pass generates n and n+2 */
3635 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3636 u32 reta = (base & 0x07800780) >> (7 - shift);
3638 /* second pass generates n+1 and n+3 */
3639 base += 0x00010001 * num_rx_queues;
3640 reta |= (base & 0x07800780) << (1 + shift);
3642 /* generate 2nd table for 82575 based parts */
3644 reta |= (0x01010101 * num_rx_queues) << shift2;
3646 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3650 * Disable raw packet checksumming so that RSS hash is placed in
3651 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3652 * offloads as they are enabled by default
3654 rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3655 rxcsum |= E1000_RXCSUM_PCSD;
3657 if (adapter->hw.mac.type >= e1000_82576)
3658 /* Enable Receive Checksum Offload for SCTP */
3659 rxcsum |= E1000_RXCSUM_CRCOFL;
3661 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3662 E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3664 /* Generate RSS hash based on packet types, TCP/UDP
3665 * port numbers and/or IPv4/v6 src and dst addresses
3667 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3668 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3669 E1000_MRQC_RSS_FIELD_IPV6 |
3670 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3671 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3673 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3674 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3675 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3676 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3678 /* If VMDq is enabled then we set the appropriate mode for that, else
3679 * we default to RSS so that an RSS hash is calculated per packet even
3680 * if we are only using one queue */
3681 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3682 if (hw->mac.type > e1000_82575) {
3683 /* Set the default pool for the PF's first queue */
3684 u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3685 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3686 E1000_VT_CTL_DISABLE_DEF_POOL);
3687 vtctl |= adapter->vfs_allocated_count <<
3688 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3689 E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3690 } else if (adapter->rss_queues > 1) {
3691 /* set default queue for pool 1 to queue 2 */
3692 E1000_WRITE_REG(hw, E1000_VT_CTL,
3693 adapter->rss_queues << 7);
3695 if (adapter->rss_queues > 1)
3696 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3698 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3700 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3702 igb_vmm_control(adapter);
3704 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3708 * igb_setup_rctl - configure the receive control registers
3709 * @adapter: Board private structure
3711 void igb_setup_rctl(struct igb_adapter *adapter)
3713 struct e1000_hw *hw = &adapter->hw;
3716 rctl = E1000_READ_REG(hw, E1000_RCTL);
3718 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3719 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3721 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3722 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3725 * enable stripping of CRC. It's unlikely this will break BMC
3726 * redirection as it did with e1000. Newer features require
3727 * that the HW strips the CRC.
3729 rctl |= E1000_RCTL_SECRC;
3731 /* disable store bad packets and clear size bits. */
3732 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3734 /* enable LPE to prevent packets larger than max_frame_size */
3735 rctl |= E1000_RCTL_LPE;
3737 /* disable queue 0 to prevent tail write w/o re-config */
3738 E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3740 /* Attention!!! For SR-IOV PF driver operations you must enable
3741 * queue drop for all VF and PF queues to prevent head of line blocking
3742 * if an un-trusted VF does not provide descriptors to hardware.
3744 if (adapter->vfs_allocated_count) {
3745 /* set all queue drop enable bits */
3746 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3749 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3752 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3755 struct e1000_hw *hw = &adapter->hw;
3758 /* if it isn't the PF check to see if VFs are enabled and
3759 * increase the size to support vlan tags */
3760 if (vfn < adapter->vfs_allocated_count &&
3761 adapter->vf_data[vfn].vlans_enabled)
3764 #ifdef CONFIG_IGB_VMDQ_NETDEV
3765 if (vfn >= adapter->vfs_allocated_count) {
3766 int queue = vfn - adapter->vfs_allocated_count;
3767 struct igb_vmdq_adapter *vadapter;
3769 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3770 if (vadapter->vlgrp)
3774 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3775 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3776 vmolr |= size | E1000_VMOLR_LPE;
3777 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3783 * igb_rlpml_set - set maximum receive packet size
3784 * @adapter: board private structure
3786 * Configure maximum receivable packet size.
3788 static void igb_rlpml_set(struct igb_adapter *adapter)
3790 u32 max_frame_size = adapter->max_frame_size;
3791 struct e1000_hw *hw = &adapter->hw;
3792 u16 pf_id = adapter->vfs_allocated_count;
3794 if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3796 for (i = 0; i < adapter->vmdq_pools; i++)
3797 igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3799 * If we're in VMDQ or SR-IOV mode, then set global RLPML
3800 * to our max jumbo frame size, in case we need to enable
3801 * jumbo frames on one of the rings later.
3802 * This will not pass over-length frames into the default
3803 * queue because it's gated by the VMOLR.RLPML.
3805 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3807 /* Set VF RLPML for the PF device. */
3808 if (adapter->vfs_allocated_count)
3809 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3811 E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3814 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3815 int vfn, bool enable)
3817 struct e1000_hw *hw = &adapter->hw;
3821 if (hw->mac.type < e1000_82576)
3824 if (hw->mac.type == e1000_i350)
3825 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3827 reg = hw->hw_addr + E1000_VMOLR(vfn);
3831 val |= E1000_VMOLR_STRVLAN;
3833 val &= ~(E1000_VMOLR_STRVLAN);
3836 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3839 struct e1000_hw *hw = &adapter->hw;
3843 * This register exists only on 82576 and newer so if we are older then
3844 * we should exit and do nothing
3846 if (hw->mac.type < e1000_82576)
3849 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3852 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3854 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3856 /* clear all bits that might not be set */
3857 vmolr &= ~E1000_VMOLR_RSSE;
3859 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3860 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3862 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3863 vmolr |= E1000_VMOLR_LPE; /* Accept long packets */
3865 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3869 * igb_configure_rx_ring - Configure a receive ring after Reset
3870 * @adapter: board private structure
3871 * @ring: receive ring to be configured
3873 * Configure the Rx unit of the MAC after a reset.
3875 void igb_configure_rx_ring(struct igb_adapter *adapter,
3876 struct igb_ring *ring)
3878 struct e1000_hw *hw = &adapter->hw;
3879 u64 rdba = ring->dma;
3880 int reg_idx = ring->reg_idx;
3881 u32 srrctl = 0, rxdctl = 0;
3883 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3885 * RLPML prevents us from receiving a frame larger than max_frame so
3886 * it is safe to just set the rx_buffer_len to max_frame without the
3887 * risk of an skb over panic.
3889 ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3890 MAXIMUM_ETHERNET_VLAN_SIZE);
3893 /* disable the queue */
3894 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3896 /* Set DMA base address registers */
3897 E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3898 rdba & 0x00000000ffffffffULL);
3899 E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3900 E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3901 ring->count * sizeof(union e1000_adv_rx_desc));
3903 /* initialize head and tail */
3904 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3905 E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3906 writel(0, ring->tail);
3908 /* reset next-to- use/clean to place SW in sync with hardwdare */
3909 ring->next_to_clean = 0;
3910 ring->next_to_use = 0;
3911 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3912 ring->next_to_alloc = 0;
3915 /* set descriptor configuration */
3916 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3917 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3918 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3919 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3920 srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3921 E1000_SRRCTL_BSIZEPKT_SHIFT;
3922 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3923 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3924 #ifdef HAVE_PTP_1588_CLOCK
3925 if (hw->mac.type >= e1000_82580)
3926 srrctl |= E1000_SRRCTL_TIMESTAMP;
3927 #endif /* HAVE_PTP_1588_CLOCK */
3929 * We should set the drop enable bit if:
3932 * Flow Control is disabled and number of RX queues > 1
3934 * This allows us to avoid head of line blocking for security
3935 * and performance reasons.
3937 if (adapter->vfs_allocated_count ||
3938 (adapter->num_rx_queues > 1 &&
3939 (hw->fc.requested_mode == e1000_fc_none ||
3940 hw->fc.requested_mode == e1000_fc_rx_pause)))
3941 srrctl |= E1000_SRRCTL_DROP_EN;
3943 E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3945 /* set filtering for VMDQ pools */
3946 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3948 rxdctl |= IGB_RX_PTHRESH;
3949 rxdctl |= IGB_RX_HTHRESH << 8;
3950 rxdctl |= IGB_RX_WTHRESH << 16;
3952 /* enable receive descriptor fetching */
3953 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3954 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3958 * igb_configure_rx - Configure receive Unit after Reset
3959 * @adapter: board private structure
3961 * Configure the Rx unit of the MAC after a reset.
3963 static void igb_configure_rx(struct igb_adapter *adapter)
3967 /* set UTA to appropriate mode */
3968 igb_set_uta(adapter);
3970 igb_full_sync_mac_table(adapter);
3971 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3972 * the Base and Length of the Rx Descriptor Ring */
3973 for (i = 0; i < adapter->num_rx_queues; i++)
3974 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3978 * igb_free_tx_resources - Free Tx Resources per Queue
3979 * @tx_ring: Tx descriptor ring for a specific queue
3981 * Free all transmit software resources
3983 void igb_free_tx_resources(struct igb_ring *tx_ring)
3985 igb_clean_tx_ring(tx_ring);
3987 vfree(tx_ring->tx_buffer_info);
3988 tx_ring->tx_buffer_info = NULL;
3990 /* if not set, then don't free */
3994 dma_free_coherent(tx_ring->dev, tx_ring->size,
3995 tx_ring->desc, tx_ring->dma);
3997 tx_ring->desc = NULL;
4001 * igb_free_all_tx_resources - Free Tx Resources for All Queues
4002 * @adapter: board private structure
4004 * Free all transmit software resources
4006 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4010 for (i = 0; i < adapter->num_tx_queues; i++)
4011 igb_free_tx_resources(adapter->tx_ring[i]);
4014 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4015 struct igb_tx_buffer *tx_buffer)
4017 if (tx_buffer->skb) {
4018 dev_kfree_skb_any(tx_buffer->skb);
4019 if (dma_unmap_len(tx_buffer, len))
4020 dma_unmap_single(ring->dev,
4021 dma_unmap_addr(tx_buffer, dma),
4022 dma_unmap_len(tx_buffer, len),
4024 } else if (dma_unmap_len(tx_buffer, len)) {
4025 dma_unmap_page(ring->dev,
4026 dma_unmap_addr(tx_buffer, dma),
4027 dma_unmap_len(tx_buffer, len),
4030 tx_buffer->next_to_watch = NULL;
4031 tx_buffer->skb = NULL;
4032 dma_unmap_len_set(tx_buffer, len, 0);
4033 /* buffer_info must be completely set up in the transmit path */
4037 * igb_clean_tx_ring - Free Tx Buffers
4038 * @tx_ring: ring to be cleaned
4040 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4042 struct igb_tx_buffer *buffer_info;
4046 if (!tx_ring->tx_buffer_info)
4048 /* Free all the Tx ring sk_buffs */
4050 for (i = 0; i < tx_ring->count; i++) {
4051 buffer_info = &tx_ring->tx_buffer_info[i];
4052 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4055 netdev_tx_reset_queue(txring_txq(tx_ring));
4057 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4058 memset(tx_ring->tx_buffer_info, 0, size);
4060 /* Zero out the descriptor ring */
4061 memset(tx_ring->desc, 0, tx_ring->size);
4063 tx_ring->next_to_use = 0;
4064 tx_ring->next_to_clean = 0;
4068 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4069 * @adapter: board private structure
4071 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4075 for (i = 0; i < adapter->num_tx_queues; i++)
4076 igb_clean_tx_ring(adapter->tx_ring[i]);
4080 * igb_free_rx_resources - Free Rx Resources
4081 * @rx_ring: ring to clean the resources from
4083 * Free all receive software resources
4085 void igb_free_rx_resources(struct igb_ring *rx_ring)
4087 igb_clean_rx_ring(rx_ring);
4089 vfree(rx_ring->rx_buffer_info);
4090 rx_ring->rx_buffer_info = NULL;
4092 /* if not set, then don't free */
4096 dma_free_coherent(rx_ring->dev, rx_ring->size,
4097 rx_ring->desc, rx_ring->dma);
4099 rx_ring->desc = NULL;
4103 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4104 * @adapter: board private structure
4106 * Free all receive software resources
4108 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4112 for (i = 0; i < adapter->num_rx_queues; i++)
4113 igb_free_rx_resources(adapter->rx_ring[i]);
4117 * igb_clean_rx_ring - Free Rx Buffers per Queue
4118 * @rx_ring: ring to free buffers from
4120 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4125 if (!rx_ring->rx_buffer_info)
4128 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4130 dev_kfree_skb(rx_ring->skb);
4131 rx_ring->skb = NULL;
4134 /* Free all the Rx ring sk_buffs */
4135 for (i = 0; i < rx_ring->count; i++) {
4136 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4137 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4138 if (buffer_info->dma) {
4139 dma_unmap_single(rx_ring->dev,
4141 rx_ring->rx_buffer_len,
4143 buffer_info->dma = 0;
4146 if (buffer_info->skb) {
4147 dev_kfree_skb(buffer_info->skb);
4148 buffer_info->skb = NULL;
4151 if (!buffer_info->page)
4154 dma_unmap_page(rx_ring->dev,
4158 __free_page(buffer_info->page);
4160 buffer_info->page = NULL;
4164 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4165 memset(rx_ring->rx_buffer_info, 0, size);
4167 /* Zero out the descriptor ring */
4168 memset(rx_ring->desc, 0, rx_ring->size);
4170 rx_ring->next_to_alloc = 0;
4171 rx_ring->next_to_clean = 0;
4172 rx_ring->next_to_use = 0;
4176 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4177 * @adapter: board private structure
4179 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4183 for (i = 0; i < adapter->num_rx_queues; i++)
4184 igb_clean_rx_ring(adapter->rx_ring[i]);
4188 * igb_set_mac - Change the Ethernet Address of the NIC
4189 * @netdev: network interface device structure
4190 * @p: pointer to an address structure
4192 * Returns 0 on success, negative on failure
4194 static int igb_set_mac(struct net_device *netdev, void *p)
4196 struct igb_adapter *adapter = netdev_priv(netdev);
4197 struct e1000_hw *hw = &adapter->hw;
4198 struct sockaddr *addr = p;
4200 if (!is_valid_ether_addr(addr->sa_data))
4201 return -EADDRNOTAVAIL;
4203 igb_del_mac_filter(adapter, hw->mac.addr,
4204 adapter->vfs_allocated_count);
4205 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4206 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4208 /* set the correct pool for the new PF MAC address in entry 0 */
4209 return igb_add_mac_filter(adapter, hw->mac.addr,
4210 adapter->vfs_allocated_count);
4214 * igb_write_mc_addr_list - write multicast addresses to MTA
4215 * @netdev: network interface device structure
4217 * Writes multicast address list to the MTA hash table.
4218 * Returns: -ENOMEM on failure
4219 * 0 on no addresses written
4220 * X on writing X addresses to MTA
4222 int igb_write_mc_addr_list(struct net_device *netdev)
4224 struct igb_adapter *adapter = netdev_priv(netdev);
4225 struct e1000_hw *hw = &adapter->hw;
4226 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4227 struct netdev_hw_addr *ha;
4229 struct dev_mc_list *ha;
4233 #ifdef CONFIG_IGB_VMDQ_NETDEV
4236 count = netdev_mc_count(netdev);
4237 #ifdef CONFIG_IGB_VMDQ_NETDEV
4238 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4239 if (!adapter->vmdq_netdev[vm])
4241 if (!netif_running(adapter->vmdq_netdev[vm]))
4243 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4248 e1000_update_mc_addr_list(hw, NULL, 0);
4251 mta_list = kzalloc(count * 6, GFP_ATOMIC);
4255 /* The shared function expects a packed array of only addresses. */
4257 netdev_for_each_mc_addr(ha, netdev)
4258 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4259 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4261 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4263 #ifdef CONFIG_IGB_VMDQ_NETDEV
4264 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4265 if (!adapter->vmdq_netdev[vm])
4267 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4268 !netdev_mc_count(adapter->vmdq_netdev[vm]))
4270 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4271 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4272 memcpy(mta_list + (i++ * ETH_ALEN),
4273 ha->addr, ETH_ALEN);
4275 memcpy(mta_list + (i++ * ETH_ALEN),
4276 ha->dmi_addr, ETH_ALEN);
4280 e1000_update_mc_addr_list(hw, mta_list, i);
4286 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4288 u32 rar_low, rar_high;
4289 struct e1000_hw *hw = &adapter->hw;
4290 u8 *addr = adapter->mac_table[index].addr;
4291 /* HW expects these in little endian so we reverse the byte order
4292 * from network order (big endian) to little endian
4294 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4295 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4296 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4298 /* Indicate to hardware the Address is Valid. */
4299 if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4300 rar_high |= E1000_RAH_AV;
4302 if (hw->mac.type == e1000_82575)
4303 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4305 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4307 E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4308 E1000_WRITE_FLUSH(hw);
4309 E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4310 E1000_WRITE_FLUSH(hw);
4313 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4315 struct e1000_hw *hw = &adapter->hw;
4317 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4318 igb_rar_set(adapter, i);
4322 void igb_sync_mac_table(struct igb_adapter *adapter)
4324 struct e1000_hw *hw = &adapter->hw;
4326 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4327 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4328 igb_rar_set(adapter, i);
4329 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4333 int igb_available_rars(struct igb_adapter *adapter)
4335 struct e1000_hw *hw = &adapter->hw;
4338 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4339 if (adapter->mac_table[i].state == 0)
4345 #ifdef HAVE_SET_RX_MODE
4347 * igb_write_uc_addr_list - write unicast addresses to RAR table
4348 * @netdev: network interface device structure
4350 * Writes unicast address list to the RAR table.
4351 * Returns: -ENOMEM on failure/insufficient address space
4352 * 0 on no addresses written
4353 * X on writing X addresses to the RAR table
4355 static int igb_write_uc_addr_list(struct net_device *netdev)
4357 struct igb_adapter *adapter = netdev_priv(netdev);
4358 unsigned int vfn = adapter->vfs_allocated_count;
4361 /* return ENOMEM indicating insufficient memory for addresses */
4362 if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4364 if (!netdev_uc_empty(netdev)) {
4365 #ifdef NETDEV_HW_ADDR_T_UNICAST
4366 struct netdev_hw_addr *ha;
4368 struct dev_mc_list *ha;
4370 netdev_for_each_uc_addr(ha, netdev) {
4371 #ifdef NETDEV_HW_ADDR_T_UNICAST
4372 igb_del_mac_filter(adapter, ha->addr, vfn);
4373 igb_add_mac_filter(adapter, ha->addr, vfn);
4375 igb_del_mac_filter(adapter, ha->da_addr, vfn);
4376 igb_add_mac_filter(adapter, ha->da_addr, vfn);
4384 #endif /* HAVE_SET_RX_MODE */
4386 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4387 * @netdev: network interface device structure
4389 * The set_rx_mode entry point is called whenever the unicast or multicast
4390 * address lists or the network interface flags are updated. This routine is
4391 * responsible for configuring the hardware for proper unicast, multicast,
4392 * promiscuous mode, and all-multi behavior.
4394 static void igb_set_rx_mode(struct net_device *netdev)
4396 struct igb_adapter *adapter = netdev_priv(netdev);
4397 struct e1000_hw *hw = &adapter->hw;
4398 unsigned int vfn = adapter->vfs_allocated_count;
4399 u32 rctl, vmolr = 0;
4402 /* Check for Promiscuous and All Multicast modes */
4403 rctl = E1000_READ_REG(hw, E1000_RCTL);
4405 /* clear the effected bits */
4406 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4408 if (netdev->flags & IFF_PROMISC) {
4409 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4410 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4411 /* retain VLAN HW filtering if in VT mode */
4412 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4413 rctl |= E1000_RCTL_VFE;
4415 if (netdev->flags & IFF_ALLMULTI) {
4416 rctl |= E1000_RCTL_MPE;
4417 vmolr |= E1000_VMOLR_MPME;
4420 * Write addresses to the MTA, if the attempt fails
4421 * then we should just turn on promiscuous mode so
4422 * that we can at least receive multicast traffic
4424 count = igb_write_mc_addr_list(netdev);
4426 rctl |= E1000_RCTL_MPE;
4427 vmolr |= E1000_VMOLR_MPME;
4429 vmolr |= E1000_VMOLR_ROMPE;
4432 #ifdef HAVE_SET_RX_MODE
4434 * Write addresses to available RAR registers, if there is not
4435 * sufficient space to store all the addresses then enable
4436 * unicast promiscuous mode
4438 count = igb_write_uc_addr_list(netdev);
4440 rctl |= E1000_RCTL_UPE;
4441 vmolr |= E1000_VMOLR_ROPE;
4443 #endif /* HAVE_SET_RX_MODE */
4444 rctl |= E1000_RCTL_VFE;
4446 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4449 * In order to support SR-IOV and eventually VMDq it is necessary to set
4450 * the VMOLR to enable the appropriate modes. Without this workaround
4451 * we will have issues with VLAN tag stripping not being done for frames
4452 * that are only arriving because we are the default pool
4454 if (hw->mac.type < e1000_82576)
4457 vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4458 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4459 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4460 igb_restore_vf_multicasts(adapter);
4463 static void igb_check_wvbr(struct igb_adapter *adapter)
4465 struct e1000_hw *hw = &adapter->hw;
4468 switch (hw->mac.type) {
4471 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4478 adapter->wvbr |= wvbr;
4481 #define IGB_STAGGERED_QUEUE_OFFSET 8
4483 static void igb_spoof_check(struct igb_adapter *adapter)
4490 switch (adapter->hw.mac.type) {
4492 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4493 if (adapter->wvbr & (1 << j) ||
4494 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4495 DPRINTK(DRV, WARNING,
4496 "Spoof event(s) detected on VF %d\n", j);
4499 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4504 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4505 if (adapter->wvbr & (1 << j)) {
4506 DPRINTK(DRV, WARNING,
4507 "Spoof event(s) detected on VF %d\n", j);
4508 adapter->wvbr &= ~(1 << j);
4517 /* Need to wait a few seconds after link up to get diagnostic information from
4519 static void igb_update_phy_info(unsigned long data)
4521 struct igb_adapter *adapter = (struct igb_adapter *) data;
4522 e1000_get_phy_info(&adapter->hw);
4526 * igb_has_link - check shared code for link and determine up/down
4527 * @adapter: pointer to driver private info
4529 bool igb_has_link(struct igb_adapter *adapter)
4531 struct e1000_hw *hw = &adapter->hw;
4532 bool link_active = FALSE;
4534 /* get_link_status is set on LSC (link status) interrupt or
4535 * rx sequence error interrupt. get_link_status will stay
4536 * false until the e1000_check_for_link establishes link
4537 * for copper adapters ONLY
4539 switch (hw->phy.media_type) {
4540 case e1000_media_type_copper:
4541 if (!hw->mac.get_link_status)
4543 case e1000_media_type_internal_serdes:
4544 e1000_check_for_link(hw);
4545 link_active = !hw->mac.get_link_status;
4547 case e1000_media_type_unknown:
4552 if (((hw->mac.type == e1000_i210) ||
4553 (hw->mac.type == e1000_i211)) &&
4554 (hw->phy.id == I210_I_PHY_ID)) {
4555 if (!netif_carrier_ok(adapter->netdev)) {
4556 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4557 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4558 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4559 adapter->link_check_timeout = jiffies;
4567 * igb_watchdog - Timer Call-back
4568 * @data: pointer to adapter cast into an unsigned long
4570 static void igb_watchdog(unsigned long data)
4572 struct igb_adapter *adapter = (struct igb_adapter *)data;
4573 /* Do the rest outside of interrupt context */
4574 schedule_work(&adapter->watchdog_task);
4577 static void igb_watchdog_task(struct work_struct *work)
4579 struct igb_adapter *adapter = container_of(work,
4582 struct e1000_hw *hw = &adapter->hw;
4583 struct net_device *netdev = adapter->netdev;
4586 u32 thstat, ctrl_ext;
4589 link = igb_has_link(adapter);
4590 /* Force link down if we have fiber to swap to */
4591 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4592 if (hw->phy.media_type == e1000_media_type_copper) {
4593 connsw = E1000_READ_REG(hw, E1000_CONNSW);
4594 if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4599 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4600 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4601 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4607 /* Perform a reset if the media type changed. */
4608 if (hw->dev_spec._82575.media_changed) {
4609 hw->dev_spec._82575.media_changed = false;
4610 adapter->flags |= IGB_FLAG_MEDIA_RESET;
4614 /* Cancel scheduled suspend requests. */
4615 pm_runtime_resume(netdev->dev.parent);
4617 if (!netif_carrier_ok(netdev)) {
4619 e1000_get_speed_and_duplex(hw,
4620 &adapter->link_speed,
4621 &adapter->link_duplex);
4623 ctrl = E1000_READ_REG(hw, E1000_CTRL);
4624 /* Links status message must follow this format */
4625 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4626 "Flow Control: %s\n",
4628 adapter->link_speed,
4629 adapter->link_duplex == FULL_DUPLEX ?
4630 "Full Duplex" : "Half Duplex",
4631 ((ctrl & E1000_CTRL_TFCE) &&
4632 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4633 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4634 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None")));
4635 /* adjust timeout factor according to speed/duplex */
4636 adapter->tx_timeout_factor = 1;
4637 switch (adapter->link_speed) {
4639 adapter->tx_timeout_factor = 14;
4642 /* maybe add some timeout factor ? */
4648 netif_carrier_on(netdev);
4649 netif_tx_wake_all_queues(netdev);
4651 igb_ping_all_vfs(adapter);
4653 igb_check_vf_rate_limit(adapter);
4654 #endif /* IFLA_VF_MAX */
4656 /* link state has changed, schedule phy info update */
4657 if (!test_bit(__IGB_DOWN, &adapter->state))
4658 mod_timer(&adapter->phy_info_timer,
4659 round_jiffies(jiffies + 2 * HZ));
4662 if (netif_carrier_ok(netdev)) {
4663 adapter->link_speed = 0;
4664 adapter->link_duplex = 0;
4665 /* check for thermal sensor event on i350 */
4666 if (hw->mac.type == e1000_i350) {
4667 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4668 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4669 if ((hw->phy.media_type ==
4670 e1000_media_type_copper) &&
4672 E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4673 if (thstat & E1000_THSTAT_PWR_DOWN) {
4674 printk(KERN_ERR "igb: %s The "
4675 "network adapter was stopped "
4676 "because it overheated.\n",
4679 if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4681 "igb: %s The network "
4682 "adapter supported "
4692 /* Links status message must follow this format */
4693 printk(KERN_INFO "igb: %s NIC Link is Down\n",
4695 netif_carrier_off(netdev);
4696 netif_tx_stop_all_queues(netdev);
4698 igb_ping_all_vfs(adapter);
4700 /* link state has changed, schedule phy info update */
4701 if (!test_bit(__IGB_DOWN, &adapter->state))
4702 mod_timer(&adapter->phy_info_timer,
4703 round_jiffies(jiffies + 2 * HZ));
4704 /* link is down, time to check for alternate media */
4705 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4706 igb_check_swap_media(adapter);
4707 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4708 schedule_work(&adapter->reset_task);
4709 /* return immediately */
4713 pm_schedule_suspend(netdev->dev.parent,
4716 /* also check for alternate media here */
4717 } else if (!netif_carrier_ok(netdev) &&
4718 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4719 hw->mac.ops.power_up_serdes(hw);
4720 igb_check_swap_media(adapter);
4721 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4722 schedule_work(&adapter->reset_task);
4723 /* return immediately */
4729 igb_update_stats(adapter);
4731 for (i = 0; i < adapter->num_tx_queues; i++) {
4732 struct igb_ring *tx_ring = adapter->tx_ring[i];
4733 if (!netif_carrier_ok(netdev)) {
4734 /* We've lost link, so the controller stops DMA,
4735 * but we've got queued Tx work that's never going
4736 * to get done, so reset controller to flush Tx.
4737 * (Do the reset outside of interrupt context). */
4738 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4739 adapter->tx_timeout_count++;
4740 schedule_work(&adapter->reset_task);
4741 /* return immediately since reset is imminent */
4746 /* Force detection of hung controller every watchdog period */
4747 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4750 /* Cause software interrupt to ensure rx ring is cleaned */
4751 if (adapter->msix_entries) {
4753 for (i = 0; i < adapter->num_q_vectors; i++)
4754 eics |= adapter->q_vector[i]->eims_value;
4755 E1000_WRITE_REG(hw, E1000_EICS, eics);
4757 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4760 igb_spoof_check(adapter);
4762 /* Reset the timer */
4763 if (!test_bit(__IGB_DOWN, &adapter->state)) {
4764 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4765 mod_timer(&adapter->watchdog_timer,
4766 round_jiffies(jiffies + HZ));
4768 mod_timer(&adapter->watchdog_timer,
4769 round_jiffies(jiffies + 2 * HZ));
4773 static void igb_dma_err_task(struct work_struct *work)
4775 struct igb_adapter *adapter = container_of(work,
4779 struct e1000_hw *hw = &adapter->hw;
4780 struct net_device *netdev = adapter->netdev;
4784 hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4785 if (hgptc) /* If incrementing then no need for the check below */
4786 goto dma_timer_reset;
4788 * Check to see if a bad DMA write target from an errant or
4789 * malicious VF has caused a PCIe error. If so then we can
4790 * issue a VFLR to the offending VF(s) and then resume without
4791 * requesting a full slot reset.
4794 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4795 ciaa = (vf << 16) | 0x80000000;
4796 /* 32 bit read so align, we really want status at offset 6 */
4797 ciaa |= PCI_COMMAND;
4798 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4799 ciad = E1000_READ_REG(hw, E1000_CIAD);
4801 /* disable debug mode asap after reading data */
4802 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4803 /* Get the upper 16 bits which will be the PCI status reg */
4805 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4806 PCI_STATUS_REC_TARGET_ABORT |
4807 PCI_STATUS_SIG_SYSTEM_ERROR)) {
4808 netdev_err(netdev, "VF %d suffered error\n", vf);
4810 ciaa = (vf << 16) | 0x80000000;
4812 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4813 ciad = 0x00008000; /* VFLR */
4814 E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4816 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4820 /* Reset the timer */
4821 if (!test_bit(__IGB_DOWN, &adapter->state))
4822 mod_timer(&adapter->dma_err_timer,
4823 round_jiffies(jiffies + HZ / 10));
4827 * igb_dma_err_timer - Timer Call-back
4828 * @data: pointer to adapter cast into an unsigned long
4830 static void igb_dma_err_timer(unsigned long data)
4832 struct igb_adapter *adapter = (struct igb_adapter *)data;
4833 /* Do the rest outside of interrupt context */
4834 schedule_work(&adapter->dma_err_task);
4837 enum latency_range {
4841 latency_invalid = 255
4845 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4847 * Stores a new ITR value based on strictly on packet size. This
4848 * algorithm is less sophisticated than that used in igb_update_itr,
4849 * due to the difficulty of synchronizing statistics across multiple
4850 * receive rings. The divisors and thresholds used by this function
4851 * were determined based on theoretical maximum wire speed and testing
4852 * data, in order to minimize response time while increasing bulk
4854 * This functionality is controlled by the InterruptThrottleRate module
4855 * parameter (see igb_param.c)
4856 * NOTE: This function is called only when operating in a multiqueue
4857 * receive environment.
4858 * @q_vector: pointer to q_vector
4860 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4862 int new_val = q_vector->itr_val;
4863 int avg_wire_size = 0;
4864 struct igb_adapter *adapter = q_vector->adapter;
4865 unsigned int packets;
4867 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4868 * ints/sec - ITR timer value of 120 ticks.
4870 switch (adapter->link_speed) {
4873 new_val = IGB_4K_ITR;
4879 packets = q_vector->rx.total_packets;
4881 avg_wire_size = q_vector->rx.total_bytes / packets;
4883 packets = q_vector->tx.total_packets;
4885 avg_wire_size = max_t(u32, avg_wire_size,
4886 q_vector->tx.total_bytes / packets);
4888 /* if avg_wire_size isn't set no work was done */
4892 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4893 avg_wire_size += 24;
4895 /* Don't starve jumbo frames */
4896 avg_wire_size = min(avg_wire_size, 3000);
4898 /* Give a little boost to mid-size frames */
4899 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4900 new_val = avg_wire_size / 3;
4902 new_val = avg_wire_size / 2;
4904 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4905 if (new_val < IGB_20K_ITR &&
4906 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4907 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4908 new_val = IGB_20K_ITR;
4911 if (new_val != q_vector->itr_val) {
4912 q_vector->itr_val = new_val;
4913 q_vector->set_itr = 1;
4916 q_vector->rx.total_bytes = 0;
4917 q_vector->rx.total_packets = 0;
4918 q_vector->tx.total_bytes = 0;
4919 q_vector->tx.total_packets = 0;
4923 * igb_update_itr - update the dynamic ITR value based on statistics
4924 * Stores a new ITR value based on packets and byte
4925 * counts during the last interrupt. The advantage of per interrupt
4926 * computation is faster updates and more accurate ITR for the current
4927 * traffic pattern. Constants in this function were computed
4928 * based on theoretical maximum wire speed and thresholds were set based
4929 * on testing data as well as attempting to minimize response time
4930 * while increasing bulk throughput.
4931 * this functionality is controlled by the InterruptThrottleRate module
4932 * parameter (see igb_param.c)
4933 * NOTE: These calculations are only valid when operating in a single-
4934 * queue environment.
4935 * @q_vector: pointer to q_vector
4936 * @ring_container: ring info to update the itr for
4938 static void igb_update_itr(struct igb_q_vector *q_vector,
4939 struct igb_ring_container *ring_container)
4941 unsigned int packets = ring_container->total_packets;
4942 unsigned int bytes = ring_container->total_bytes;
4943 u8 itrval = ring_container->itr;
4945 /* no packets, exit with status unchanged */
4950 case lowest_latency:
4951 /* handle TSO and jumbo frames */
4952 if (bytes/packets > 8000)
4953 itrval = bulk_latency;
4954 else if ((packets < 5) && (bytes > 512))
4955 itrval = low_latency;
4957 case low_latency: /* 50 usec aka 20000 ints/s */
4958 if (bytes > 10000) {
4959 /* this if handles the TSO accounting */
4960 if (bytes/packets > 8000) {
4961 itrval = bulk_latency;
4962 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4963 itrval = bulk_latency;
4964 } else if ((packets > 35)) {
4965 itrval = lowest_latency;
4967 } else if (bytes/packets > 2000) {
4968 itrval = bulk_latency;
4969 } else if (packets <= 2 && bytes < 512) {
4970 itrval = lowest_latency;
4973 case bulk_latency: /* 250 usec aka 4000 ints/s */
4974 if (bytes > 25000) {
4976 itrval = low_latency;
4977 } else if (bytes < 1500) {
4978 itrval = low_latency;
4983 /* clear work counters since we have the values we need */
4984 ring_container->total_bytes = 0;
4985 ring_container->total_packets = 0;
4987 /* write updated itr to ring container */
4988 ring_container->itr = itrval;
4991 static void igb_set_itr(struct igb_q_vector *q_vector)
4993 struct igb_adapter *adapter = q_vector->adapter;
4994 u32 new_itr = q_vector->itr_val;
4997 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4998 switch (adapter->link_speed) {
5002 new_itr = IGB_4K_ITR;
5008 igb_update_itr(q_vector, &q_vector->tx);
5009 igb_update_itr(q_vector, &q_vector->rx);
5011 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5013 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5014 if (current_itr == lowest_latency &&
5015 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5016 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5017 current_itr = low_latency;
5019 switch (current_itr) {
5020 /* counts and packets in update_itr are dependent on these numbers */
5021 case lowest_latency:
5022 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5025 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5028 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
5035 if (new_itr != q_vector->itr_val) {
5036 /* this attempts to bias the interrupt rate towards Bulk
5037 * by adding intermediate steps when interrupt rate is
5039 new_itr = new_itr > q_vector->itr_val ?
5040 max((new_itr * q_vector->itr_val) /
5041 (new_itr + (q_vector->itr_val >> 2)),
5044 /* Don't write the value here; it resets the adapter's
5045 * internal timer, and causes us to delay far longer than
5046 * we should between interrupts. Instead, we write the ITR
5047 * value at the beginning of the next interrupt so the timing
5048 * ends up being correct.
5050 q_vector->itr_val = new_itr;
5051 q_vector->set_itr = 1;
5055 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5056 u32 type_tucmd, u32 mss_l4len_idx)
5058 struct e1000_adv_tx_context_desc *context_desc;
5059 u16 i = tx_ring->next_to_use;
5061 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5064 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5066 /* set bits to identify this as an advanced context descriptor */
5067 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5069 /* For 82575, context index must be unique per ring. */
5070 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5071 mss_l4len_idx |= tx_ring->reg_idx << 4;
5073 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5074 context_desc->seqnum_seed = 0;
5075 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
5076 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5079 static int igb_tso(struct igb_ring *tx_ring,
5080 struct igb_tx_buffer *first,
5084 struct sk_buff *skb = first->skb;
5085 u32 vlan_macip_lens, type_tucmd;
5086 u32 mss_l4len_idx, l4len;
5088 if (skb->ip_summed != CHECKSUM_PARTIAL)
5091 if (!skb_is_gso(skb))
5092 #endif /* NETIF_F_TSO */
5096 if (skb_header_cloned(skb)) {
5097 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5102 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5103 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5105 if (first->protocol == __constant_htons(ETH_P_IP)) {
5106 struct iphdr *iph = ip_hdr(skb);
5109 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5113 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5114 first->tx_flags |= IGB_TX_FLAGS_TSO |
5118 } else if (skb_is_gso_v6(skb)) {
5119 ipv6_hdr(skb)->payload_len = 0;
5120 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5121 &ipv6_hdr(skb)->daddr,
5123 first->tx_flags |= IGB_TX_FLAGS_TSO |
5128 /* compute header lengths */
5129 l4len = tcp_hdrlen(skb);
5130 *hdr_len = skb_transport_offset(skb) + l4len;
5132 /* update gso size and bytecount with header size */
5133 first->gso_segs = skb_shinfo(skb)->gso_segs;
5134 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5137 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5138 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5140 /* VLAN MACLEN IPLEN */
5141 vlan_macip_lens = skb_network_header_len(skb);
5142 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5143 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5145 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5148 #endif /* NETIF_F_TSO */
5151 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5153 struct sk_buff *skb = first->skb;
5154 u32 vlan_macip_lens = 0;
5155 u32 mss_l4len_idx = 0;
5158 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5159 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5163 switch (first->protocol) {
5164 case __constant_htons(ETH_P_IP):
5165 vlan_macip_lens |= skb_network_header_len(skb);
5166 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5167 nexthdr = ip_hdr(skb)->protocol;
5169 #ifdef NETIF_F_IPV6_CSUM
5170 case __constant_htons(ETH_P_IPV6):
5171 vlan_macip_lens |= skb_network_header_len(skb);
5172 nexthdr = ipv6_hdr(skb)->nexthdr;
5176 if (unlikely(net_ratelimit())) {
5177 dev_warn(tx_ring->dev,
5178 "partial checksum but proto=%x!\n",
5186 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5187 mss_l4len_idx = tcp_hdrlen(skb) <<
5188 E1000_ADVTXD_L4LEN_SHIFT;
5192 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5193 mss_l4len_idx = sizeof(struct sctphdr) <<
5194 E1000_ADVTXD_L4LEN_SHIFT;
5198 mss_l4len_idx = sizeof(struct udphdr) <<
5199 E1000_ADVTXD_L4LEN_SHIFT;
5202 if (unlikely(net_ratelimit())) {
5203 dev_warn(tx_ring->dev,
5204 "partial checksum but l4 proto=%x!\n",
5210 /* update TX checksum flag */
5211 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5214 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5215 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5217 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5220 #define IGB_SET_FLAG(_input, _flag, _result) \
5221 ((_flag <= _result) ? \
5222 ((u32)(_input & _flag) * (_result / _flag)) : \
5223 ((u32)(_input & _flag) / (_flag / _result)))
5225 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5227 /* set type for advanced descriptor with frame checksum insertion */
5228 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5229 E1000_ADVTXD_DCMD_DEXT |
5230 E1000_ADVTXD_DCMD_IFCS;
5232 /* set HW vlan bit if vlan is present */
5233 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5234 (E1000_ADVTXD_DCMD_VLE));
5236 /* set segmentation bits for TSO */
5237 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5238 (E1000_ADVTXD_DCMD_TSE));
5240 /* set timestamp bit if present */
5241 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5242 (E1000_ADVTXD_MAC_TSTAMP));
5247 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5248 union e1000_adv_tx_desc *tx_desc,
5249 u32 tx_flags, unsigned int paylen)
5251 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5253 /* 82575 requires a unique index per ring */
5254 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5255 olinfo_status |= tx_ring->reg_idx << 4;
5257 /* insert L4 checksum */
5258 olinfo_status |= IGB_SET_FLAG(tx_flags,
5260 (E1000_TXD_POPTS_TXSM << 8));
5262 /* insert IPv4 checksum */
5263 olinfo_status |= IGB_SET_FLAG(tx_flags,
5265 (E1000_TXD_POPTS_IXSM << 8));
5267 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5270 static void igb_tx_map(struct igb_ring *tx_ring,
5271 struct igb_tx_buffer *first,
5274 struct sk_buff *skb = first->skb;
5275 struct igb_tx_buffer *tx_buffer;
5276 union e1000_adv_tx_desc *tx_desc;
5277 struct skb_frag_struct *frag;
5279 unsigned int data_len, size;
5280 u32 tx_flags = first->tx_flags;
5281 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5282 u16 i = tx_ring->next_to_use;
5284 tx_desc = IGB_TX_DESC(tx_ring, i);
5286 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5288 size = skb_headlen(skb);
5289 data_len = skb->data_len;
5291 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5295 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5296 if (dma_mapping_error(tx_ring->dev, dma))
5299 /* record length, and DMA address */
5300 dma_unmap_len_set(tx_buffer, len, size);
5301 dma_unmap_addr_set(tx_buffer, dma, dma);
5303 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5305 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5306 tx_desc->read.cmd_type_len =
5307 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5311 if (i == tx_ring->count) {
5312 tx_desc = IGB_TX_DESC(tx_ring, 0);
5315 tx_desc->read.olinfo_status = 0;
5317 dma += IGB_MAX_DATA_PER_TXD;
5318 size -= IGB_MAX_DATA_PER_TXD;
5320 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5323 if (likely(!data_len))
5326 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5330 if (i == tx_ring->count) {
5331 tx_desc = IGB_TX_DESC(tx_ring, 0);
5334 tx_desc->read.olinfo_status = 0;
5336 size = skb_frag_size(frag);
5339 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5340 size, DMA_TO_DEVICE);
5342 tx_buffer = &tx_ring->tx_buffer_info[i];
5345 /* write last descriptor with RS and EOP bits */
5346 cmd_type |= size | IGB_TXD_DCMD;
5347 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5349 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5350 /* set the timestamp */
5351 first->time_stamp = jiffies;
5354 * Force memory writes to complete before letting h/w know there
5355 * are new descriptors to fetch. (Only applicable for weak-ordered
5356 * memory model archs, such as IA-64).
5358 * We also need this memory barrier to make certain all of the
5359 * status bits have been updated before next_to_watch is written.
5363 /* set next_to_watch value indicating a packet is present */
5364 first->next_to_watch = tx_desc;
5367 if (i == tx_ring->count)
5370 tx_ring->next_to_use = i;
5372 writel(i, tx_ring->tail);
5374 /* we need this if more than one processor can write to our tail
5375 * at a time, it syncronizes IO on IA64/Altix systems */
5381 dev_err(tx_ring->dev, "TX DMA map failed\n");
5383 /* clear dma mappings for failed tx_buffer_info map */
5385 tx_buffer = &tx_ring->tx_buffer_info[i];
5386 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5387 if (tx_buffer == first)
5394 tx_ring->next_to_use = i;
5397 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5399 struct net_device *netdev = netdev_ring(tx_ring);
5401 if (netif_is_multiqueue(netdev))
5402 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5404 netif_stop_queue(netdev);
5406 /* Herbert's original patch had:
5407 * smp_mb__after_netif_stop_queue();
5408 * but since that doesn't exist yet, just open code it. */
5411 /* We need to check again in a case another CPU has just
5412 * made room available. */
5413 if (igb_desc_unused(tx_ring) < size)
5417 if (netif_is_multiqueue(netdev))
5418 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5420 netif_wake_queue(netdev);
5422 tx_ring->tx_stats.restart_queue++;
5427 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5429 if (igb_desc_unused(tx_ring) >= size)
5431 return __igb_maybe_stop_tx(tx_ring, size);
5434 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5435 struct igb_ring *tx_ring)
5437 struct igb_tx_buffer *first;
5440 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5443 u16 count = TXD_USE_COUNT(skb_headlen(skb));
5444 __be16 protocol = vlan_get_protocol(skb);
5448 * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5449 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5450 * + 2 desc gap to keep tail from touching head,
5451 * + 1 desc for context descriptor,
5452 * otherwise try next time
5454 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5455 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5456 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5458 count += skb_shinfo(skb)->nr_frags;
5460 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5461 /* this is a hard error */
5462 return NETDEV_TX_BUSY;
5465 /* record the location of the first descriptor for this packet */
5466 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5468 first->bytecount = skb->len;
5469 first->gso_segs = 1;
5471 skb_tx_timestamp(skb);
5473 #ifdef HAVE_PTP_1588_CLOCK
5474 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5475 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5476 if (!adapter->ptp_tx_skb) {
5477 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5478 tx_flags |= IGB_TX_FLAGS_TSTAMP;
5480 adapter->ptp_tx_skb = skb_get(skb);
5481 adapter->ptp_tx_start = jiffies;
5482 if (adapter->hw.mac.type == e1000_82576)
5483 schedule_work(&adapter->ptp_tx_work);
5486 #endif /* HAVE_PTP_1588_CLOCK */
5488 if (vlan_tx_tag_present(skb)) {
5489 tx_flags |= IGB_TX_FLAGS_VLAN;
5490 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5493 /* record initial flags and protocol */
5494 first->tx_flags = tx_flags;
5495 first->protocol = protocol;
5497 tso = igb_tso(tx_ring, first, &hdr_len);
5501 igb_tx_csum(tx_ring, first);
5503 igb_tx_map(tx_ring, first, hdr_len);
5505 #ifndef HAVE_TRANS_START_IN_QUEUE
5506 netdev_ring(tx_ring)->trans_start = jiffies;
5509 /* Make sure there is space in the ring for the next send. */
5510 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5512 return NETDEV_TX_OK;
5515 igb_unmap_and_free_tx_resource(tx_ring, first);
5517 return NETDEV_TX_OK;
5521 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5522 struct sk_buff *skb)
5524 unsigned int r_idx = skb->queue_mapping;
5526 if (r_idx >= adapter->num_tx_queues)
5527 r_idx = r_idx % adapter->num_tx_queues;
5529 return adapter->tx_ring[r_idx];
5532 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5535 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5536 struct net_device *netdev)
5538 struct igb_adapter *adapter = netdev_priv(netdev);
5540 if (test_bit(__IGB_DOWN, &adapter->state)) {
5541 dev_kfree_skb_any(skb);
5542 return NETDEV_TX_OK;
5545 if (skb->len <= 0) {
5546 dev_kfree_skb_any(skb);
5547 return NETDEV_TX_OK;
5551 * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5552 * in order to meet this minimum size requirement.
5554 if (skb->len < 17) {
5555 if (skb_padto(skb, 17))
5556 return NETDEV_TX_OK;
5560 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5564 * igb_tx_timeout - Respond to a Tx Hang
5565 * @netdev: network interface device structure
5567 static void igb_tx_timeout(struct net_device *netdev)
5569 struct igb_adapter *adapter = netdev_priv(netdev);
5570 struct e1000_hw *hw = &adapter->hw;
5572 /* Do the reset outside of interrupt context */
5573 adapter->tx_timeout_count++;
5575 if (hw->mac.type >= e1000_82580)
5576 hw->dev_spec._82575.global_device_reset = true;
5578 schedule_work(&adapter->reset_task);
5579 E1000_WRITE_REG(hw, E1000_EICS,
5580 (adapter->eims_enable_mask & ~adapter->eims_other));
5583 static void igb_reset_task(struct work_struct *work)
5585 struct igb_adapter *adapter;
5586 adapter = container_of(work, struct igb_adapter, reset_task);
5588 igb_reinit_locked(adapter);
5592 * igb_get_stats - Get System Network Statistics
5593 * @netdev: network interface device structure
5595 * Returns the address of the device statistics structure.
5596 * The statistics are updated here and also from the timer callback.
5598 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5600 struct igb_adapter *adapter = netdev_priv(netdev);
5602 if (!test_bit(__IGB_RESETTING, &adapter->state))
5603 igb_update_stats(adapter);
5605 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5606 /* only return the current stats */
5607 return &netdev->stats;
5609 /* only return the current stats */
5610 return &adapter->net_stats;
5611 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5615 * igb_change_mtu - Change the Maximum Transfer Unit
5616 * @netdev: network interface device structure
5617 * @new_mtu: new value for maximum frame size
5619 * Returns 0 on success, negative on failure
5621 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5623 struct igb_adapter *adapter = netdev_priv(netdev);
5624 struct e1000_hw *hw = &adapter->hw;
5625 struct pci_dev *pdev = adapter->pdev;
5626 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5628 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5629 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5633 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5634 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5635 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5639 /* adjust max frame to be at least the size of a standard frame */
5640 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5641 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5643 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5644 usleep_range(1000, 2000);
5646 /* igb_down has a dependency on max_frame_size */
5647 adapter->max_frame_size = max_frame;
5649 if (netif_running(netdev))
5652 dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5653 netdev->mtu, new_mtu);
5654 netdev->mtu = new_mtu;
5655 hw->dev_spec._82575.mtu = new_mtu;
5657 if (netif_running(netdev))
5662 clear_bit(__IGB_RESETTING, &adapter->state);
5668 * igb_update_stats - Update the board statistics counters
5669 * @adapter: board private structure
5672 void igb_update_stats(struct igb_adapter *adapter)
5674 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5675 struct net_device_stats *net_stats = &adapter->netdev->stats;
5677 struct net_device_stats *net_stats = &adapter->net_stats;
5678 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5679 struct e1000_hw *hw = &adapter->hw;
5681 struct pci_dev *pdev = adapter->pdev;
5688 u32 flushed = 0, coal = 0;
5689 struct igb_q_vector *q_vector;
5692 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5695 * Prevent stats update while adapter is being reset, or if the pci
5696 * connection is down.
5698 if (adapter->link_speed == 0)
5701 if (pci_channel_offline(pdev))
5706 for (i = 0; i < adapter->num_q_vectors; i++) {
5707 q_vector = adapter->q_vector[i];
5710 flushed += q_vector->lrolist.stats.flushed;
5711 coal += q_vector->lrolist.stats.coal;
5713 adapter->lro_stats.flushed = flushed;
5714 adapter->lro_stats.coal = coal;
5719 for (i = 0; i < adapter->num_rx_queues; i++) {
5720 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5721 struct igb_ring *ring = adapter->rx_ring[i];
5722 ring->rx_stats.drops += rqdpc_tmp;
5723 net_stats->rx_fifo_errors += rqdpc_tmp;
5724 #ifdef CONFIG_IGB_VMDQ_NETDEV
5725 if (!ring->vmdq_netdev) {
5726 bytes += ring->rx_stats.bytes;
5727 packets += ring->rx_stats.packets;
5730 bytes += ring->rx_stats.bytes;
5731 packets += ring->rx_stats.packets;
5735 net_stats->rx_bytes = bytes;
5736 net_stats->rx_packets = packets;
5740 for (i = 0; i < adapter->num_tx_queues; i++) {
5741 struct igb_ring *ring = adapter->tx_ring[i];
5742 #ifdef CONFIG_IGB_VMDQ_NETDEV
5743 if (!ring->vmdq_netdev) {
5744 bytes += ring->tx_stats.bytes;
5745 packets += ring->tx_stats.packets;
5748 bytes += ring->tx_stats.bytes;
5749 packets += ring->tx_stats.packets;
5752 net_stats->tx_bytes = bytes;
5753 net_stats->tx_packets = packets;
5755 /* read stats registers */
5756 adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5757 adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5758 adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5759 E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5760 adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5761 adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5762 adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5764 adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5765 adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5766 adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5767 adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5768 adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5769 adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5770 adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5771 adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5773 mpc = E1000_READ_REG(hw, E1000_MPC);
5774 adapter->stats.mpc += mpc;
5775 net_stats->rx_fifo_errors += mpc;
5776 adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5777 adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5778 adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5779 adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5780 adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5781 adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5782 adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5783 adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5784 adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5785 adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5786 adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5787 adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5788 adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5789 E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5790 adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5791 adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5792 adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5793 adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5794 adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5795 adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5796 adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5798 adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5799 adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5800 adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5801 adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5802 adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5803 adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5805 adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5806 adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5808 adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5809 adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5811 adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5812 /* read internal phy sepecific stats */
5813 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5814 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5815 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5817 /* this stat has invalid values on i210/i211 */
5818 if ((hw->mac.type != e1000_i210) &&
5819 (hw->mac.type != e1000_i211))
5820 adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5822 adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5823 adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5825 adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5826 adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5827 adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5828 adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5829 adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5830 adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5831 adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5832 adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5833 adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5835 /* Fill out the OS statistics structure */
5836 net_stats->multicast = adapter->stats.mprc;
5837 net_stats->collisions = adapter->stats.colc;
5841 /* RLEC on some newer hardware can be incorrect so build
5842 * our own version based on RUC and ROC */
5843 net_stats->rx_errors = adapter->stats.rxerrc +
5844 adapter->stats.crcerrs + adapter->stats.algnerrc +
5845 adapter->stats.ruc + adapter->stats.roc +
5846 adapter->stats.cexterr;
5847 net_stats->rx_length_errors = adapter->stats.ruc +
5849 net_stats->rx_crc_errors = adapter->stats.crcerrs;
5850 net_stats->rx_frame_errors = adapter->stats.algnerrc;
5851 net_stats->rx_missed_errors = adapter->stats.mpc;
5854 net_stats->tx_errors = adapter->stats.ecol +
5855 adapter->stats.latecol;
5856 net_stats->tx_aborted_errors = adapter->stats.ecol;
5857 net_stats->tx_window_errors = adapter->stats.latecol;
5858 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5860 /* Tx Dropped needs to be maintained elsewhere */
5863 if (hw->phy.media_type == e1000_media_type_copper) {
5864 if ((adapter->link_speed == SPEED_1000) &&
5865 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5866 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5867 adapter->phy_stats.idle_errors += phy_tmp;
5871 /* Management Stats */
5872 adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5873 adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5874 if (hw->mac.type > e1000_82580) {
5875 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5876 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5877 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5878 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5882 static irqreturn_t igb_msix_other(int irq, void *data)
5884 struct igb_adapter *adapter = data;
5885 struct e1000_hw *hw = &adapter->hw;
5886 u32 icr = E1000_READ_REG(hw, E1000_ICR);
5887 /* reading ICR causes bit 31 of EICR to be cleared */
5889 if (icr & E1000_ICR_DRSTA)
5890 schedule_work(&adapter->reset_task);
5892 if (icr & E1000_ICR_DOUTSYNC) {
5893 /* HW is reporting DMA is out of sync */
5894 adapter->stats.doosync++;
5895 /* The DMA Out of Sync is also indication of a spoof event
5896 * in IOV mode. Check the Wrong VM Behavior register to
5897 * see if it is really a spoof event. */
5898 igb_check_wvbr(adapter);
5901 /* Check for a mailbox event */
5902 if (icr & E1000_ICR_VMMB)
5903 igb_msg_task(adapter);
5905 if (icr & E1000_ICR_LSC) {
5906 hw->mac.get_link_status = 1;
5907 /* guard against interrupt when we're going down */
5908 if (!test_bit(__IGB_DOWN, &adapter->state))
5909 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5912 #ifdef HAVE_PTP_1588_CLOCK
5913 if (icr & E1000_ICR_TS) {
5914 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5916 if (tsicr & E1000_TSICR_TXTS) {
5917 /* acknowledge the interrupt */
5918 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5919 /* retrieve hardware timestamp */
5920 schedule_work(&adapter->ptp_tx_work);
5923 #endif /* HAVE_PTP_1588_CLOCK */
5925 /* Check for MDD event */
5926 if (icr & E1000_ICR_MDDET)
5927 igb_process_mdd_event(adapter);
5929 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5934 static void igb_write_itr(struct igb_q_vector *q_vector)
5936 struct igb_adapter *adapter = q_vector->adapter;
5937 u32 itr_val = q_vector->itr_val & 0x7FFC;
5939 if (!q_vector->set_itr)
5945 if (adapter->hw.mac.type == e1000_82575)
5946 itr_val |= itr_val << 16;
5948 itr_val |= E1000_EITR_CNT_IGNR;
5950 writel(itr_val, q_vector->itr_register);
5951 q_vector->set_itr = 0;
5954 static irqreturn_t igb_msix_ring(int irq, void *data)
5956 struct igb_q_vector *q_vector = data;
5958 /* Write the ITR value calculated from the previous interrupt. */
5959 igb_write_itr(q_vector);
5961 napi_schedule(&q_vector->napi);
5967 static void igb_update_tx_dca(struct igb_adapter *adapter,
5968 struct igb_ring *tx_ring,
5971 struct e1000_hw *hw = &adapter->hw;
5972 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5974 if (hw->mac.type != e1000_82575)
5975 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5978 * We can enable relaxed ordering for reads, but not writes when
5979 * DCA is enabled. This is due to a known issue in some chipsets
5980 * which will cause the DCA tag to be cleared.
5982 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5983 E1000_DCA_TXCTRL_DATA_RRO_EN |
5984 E1000_DCA_TXCTRL_DESC_DCA_EN;
5986 E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5989 static void igb_update_rx_dca(struct igb_adapter *adapter,
5990 struct igb_ring *rx_ring,
5993 struct e1000_hw *hw = &adapter->hw;
5994 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5996 if (hw->mac.type != e1000_82575)
5997 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6000 * We can enable relaxed ordering for reads, but not writes when
6001 * DCA is enabled. This is due to a known issue in some chipsets
6002 * which will cause the DCA tag to be cleared.
6004 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6005 E1000_DCA_RXCTRL_DESC_DCA_EN;
6007 E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6010 static void igb_update_dca(struct igb_q_vector *q_vector)
6012 struct igb_adapter *adapter = q_vector->adapter;
6013 int cpu = get_cpu();
6015 if (q_vector->cpu == cpu)
6018 if (q_vector->tx.ring)
6019 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6021 if (q_vector->rx.ring)
6022 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6024 q_vector->cpu = cpu;
6029 static void igb_setup_dca(struct igb_adapter *adapter)
6031 struct e1000_hw *hw = &adapter->hw;
6034 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6037 /* Always use CB2 mode, difference is masked in the CB driver. */
6038 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6040 for (i = 0; i < adapter->num_q_vectors; i++) {
6041 adapter->q_vector[i]->cpu = -1;
6042 igb_update_dca(adapter->q_vector[i]);
6046 static int __igb_notify_dca(struct device *dev, void *data)
6048 struct net_device *netdev = dev_get_drvdata(dev);
6049 struct igb_adapter *adapter = netdev_priv(netdev);
6050 struct pci_dev *pdev = adapter->pdev;
6051 struct e1000_hw *hw = &adapter->hw;
6052 unsigned long event = *(unsigned long *)data;
6055 case DCA_PROVIDER_ADD:
6056 /* if already enabled, don't do it again */
6057 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6059 if (dca_add_requester(dev) == E1000_SUCCESS) {
6060 adapter->flags |= IGB_FLAG_DCA_ENABLED;
6061 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6062 igb_setup_dca(adapter);
6065 /* Fall Through since DCA is disabled. */
6066 case DCA_PROVIDER_REMOVE:
6067 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6068 /* without this a class_device is left
6069 * hanging around in the sysfs model */
6070 dca_remove_requester(dev);
6071 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6072 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6073 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6078 return E1000_SUCCESS;
6081 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6086 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6089 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6091 #endif /* IGB_DCA */
6093 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6095 unsigned char mac_addr[ETH_ALEN];
6097 random_ether_addr(mac_addr);
6098 igb_set_vf_mac(adapter, vf, mac_addr);
6101 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6102 /* By default spoof check is enabled for all VFs */
6103 adapter->vf_data[vf].spoofchk_enabled = true;
6110 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6112 struct e1000_hw *hw = &adapter->hw;
6116 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6117 ping = E1000_PF_CONTROL_MSG;
6118 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6119 ping |= E1000_VT_MSGTYPE_CTS;
6120 e1000_write_mbx(hw, &ping, 1, i);
6125 * igb_mta_set_ - Set multicast filter table address
6126 * @adapter: pointer to the adapter structure
6127 * @hash_value: determines the MTA register and bit to set
6129 * The multicast table address is a register array of 32-bit registers.
6130 * The hash_value is used to determine what register the bit is in, the
6131 * current value is read, the new bit is OR'd in and the new value is
6132 * written back into the register.
6134 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6136 struct e1000_hw *hw = &adapter->hw;
6137 u32 hash_bit, hash_reg, mta;
6140 * The MTA is a register array of 32-bit registers. It is
6141 * treated like an array of (32*mta_reg_count) bits. We want to
6142 * set bit BitArray[hash_value]. So we figure out what register
6143 * the bit is in, read it, OR in the new bit, then write
6144 * back the new value. The (hw->mac.mta_reg_count - 1) serves as a
6145 * mask to bits 31:5 of the hash value which gives us the
6146 * register we're modifying. The hash bit within that register
6147 * is determined by the lower 5 bits of the hash value.
6149 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6150 hash_bit = hash_value & 0x1F;
6152 mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6154 mta |= (1 << hash_bit);
6156 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6157 E1000_WRITE_FLUSH(hw);
6160 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6163 struct e1000_hw *hw = &adapter->hw;
6164 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6165 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6167 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6168 IGB_VF_FLAG_MULTI_PROMISC);
6169 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6171 #ifdef IGB_ENABLE_VF_PROMISC
6172 if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6173 vmolr |= E1000_VMOLR_ROPE;
6174 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6175 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6178 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6179 vmolr |= E1000_VMOLR_MPME;
6180 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6181 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6184 * if we have hashes and we are clearing a multicast promisc
6185 * flag we need to write the hashes to the MTA as this step
6186 * was previously skipped
6188 if (vf_data->num_vf_mc_hashes > 30) {
6189 vmolr |= E1000_VMOLR_MPME;
6190 } else if (vf_data->num_vf_mc_hashes) {
6192 vmolr |= E1000_VMOLR_ROMPE;
6193 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6194 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6198 E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6200 /* there are flags left unprocessed, likely not supported */
6201 if (*msgbuf & E1000_VT_MSGINFO_MASK)
6208 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6209 u32 *msgbuf, u32 vf)
6211 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6212 u16 *hash_list = (u16 *)&msgbuf[1];
6213 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6216 /* salt away the number of multicast addresses assigned
6217 * to this VF for later use to restore when the PF multi cast
6220 vf_data->num_vf_mc_hashes = n;
6222 /* only up to 30 hash values supported */
6226 /* store the hashes for later use */
6227 for (i = 0; i < n; i++)
6228 vf_data->vf_mc_hashes[i] = hash_list[i];
6230 /* Flush and reset the mta with the new values */
6231 igb_set_rx_mode(adapter->netdev);
6236 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6238 struct e1000_hw *hw = &adapter->hw;
6239 struct vf_data_storage *vf_data;
6242 for (i = 0; i < adapter->vfs_allocated_count; i++) {
6243 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6244 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6246 vf_data = &adapter->vf_data[i];
6248 if ((vf_data->num_vf_mc_hashes > 30) ||
6249 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6250 vmolr |= E1000_VMOLR_MPME;
6251 } else if (vf_data->num_vf_mc_hashes) {
6252 vmolr |= E1000_VMOLR_ROMPE;
6253 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6254 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6256 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6260 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6262 struct e1000_hw *hw = &adapter->hw;
6263 u32 pool_mask, reg, vid;
6267 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6269 /* Find the vlan filter for this id */
6270 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6271 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6273 /* remove the vf from the pool */
6276 /* if pool is empty then remove entry from vfta */
6277 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6278 (reg & E1000_VLVF_VLANID_ENABLE)) {
6280 vid = reg & E1000_VLVF_VLANID_MASK;
6281 igb_vfta_set(adapter, vid, FALSE);
6284 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6287 adapter->vf_data[vf].vlans_enabled = 0;
6289 vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6291 igb_vlvf_set(adapter, vlan_default, true, vf);
6294 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6296 struct e1000_hw *hw = &adapter->hw;
6299 /* The vlvf table only exists on 82576 hardware and newer */
6300 if (hw->mac.type < e1000_82576)
6303 /* we only need to do this if VMDq is enabled */
6304 if (!adapter->vmdq_pools)
6307 /* Find the vlan filter for this id */
6308 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6309 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6310 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6311 vid == (reg & E1000_VLVF_VLANID_MASK))
6316 if (i == E1000_VLVF_ARRAY_SIZE) {
6317 /* Did not find a matching VLAN ID entry that was
6318 * enabled. Search for a free filter entry, i.e.
6319 * one without the enable bit set
6321 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6322 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6323 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6327 if (i < E1000_VLVF_ARRAY_SIZE) {
6328 /* Found an enabled/available entry */
6329 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6331 /* if !enabled we need to set this up in vfta */
6332 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6333 /* add VID to filter table */
6334 igb_vfta_set(adapter, vid, TRUE);
6335 reg |= E1000_VLVF_VLANID_ENABLE;
6337 reg &= ~E1000_VLVF_VLANID_MASK;
6339 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6341 /* do not modify RLPML for PF devices */
6342 if (vf >= adapter->vfs_allocated_count)
6343 return E1000_SUCCESS;
6345 if (!adapter->vf_data[vf].vlans_enabled) {
6347 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6348 size = reg & E1000_VMOLR_RLPML_MASK;
6350 reg &= ~E1000_VMOLR_RLPML_MASK;
6352 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6355 adapter->vf_data[vf].vlans_enabled++;
6358 if (i < E1000_VLVF_ARRAY_SIZE) {
6359 /* remove vf from the pool */
6360 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6361 /* if pool is empty then remove entry from vfta */
6362 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6364 igb_vfta_set(adapter, vid, FALSE);
6366 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6368 /* do not modify RLPML for PF devices */
6369 if (vf >= adapter->vfs_allocated_count)
6370 return E1000_SUCCESS;
6372 adapter->vf_data[vf].vlans_enabled--;
6373 if (!adapter->vf_data[vf].vlans_enabled) {
6375 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6376 size = reg & E1000_VMOLR_RLPML_MASK;
6378 reg &= ~E1000_VMOLR_RLPML_MASK;
6380 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6384 return E1000_SUCCESS;
6388 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6390 struct e1000_hw *hw = &adapter->hw;
6393 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6395 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6398 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6399 int vf, u16 vlan, u8 qos)
6402 struct igb_adapter *adapter = netdev_priv(netdev);
6404 /* VLAN IDs accepted range 0-4094 */
6405 if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6408 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6411 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6412 igb_set_vmolr(adapter, vf, !vlan);
6413 adapter->vf_data[vf].pf_vlan = vlan;
6414 adapter->vf_data[vf].pf_qos = qos;
6415 igb_set_vf_vlan_strip(adapter, vf, true);
6416 dev_info(&adapter->pdev->dev,
6417 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6418 if (test_bit(__IGB_DOWN, &adapter->state)) {
6419 dev_warn(&adapter->pdev->dev,
6420 "The VF VLAN has been set,"
6421 " but the PF device is not up.\n");
6422 dev_warn(&adapter->pdev->dev,
6423 "Bring the PF device up before"
6424 " attempting to use the VF device.\n");
6427 if (adapter->vf_data[vf].pf_vlan)
6428 dev_info(&adapter->pdev->dev,
6429 "Clearing VLAN on VF %d\n", vf);
6430 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6432 igb_set_vmvir(adapter, vlan, vf);
6433 igb_set_vmolr(adapter, vf, true);
6434 igb_set_vf_vlan_strip(adapter, vf, false);
6435 adapter->vf_data[vf].pf_vlan = 0;
6436 adapter->vf_data[vf].pf_qos = 0;
6442 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6443 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6446 struct igb_adapter *adapter = netdev_priv(netdev);
6447 struct e1000_hw *hw = &adapter->hw;
6448 u32 dtxswc, reg_offset;
6450 if (!adapter->vfs_allocated_count)
6453 if (vf >= adapter->vfs_allocated_count)
6456 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6457 dtxswc = E1000_READ_REG(hw, reg_offset);
6459 dtxswc |= ((1 << vf) |
6460 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6462 dtxswc &= ~((1 << vf) |
6463 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6464 E1000_WRITE_REG(hw, reg_offset, dtxswc);
6466 adapter->vf_data[vf].spoofchk_enabled = setting;
6467 return E1000_SUCCESS;
6469 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6470 #endif /* IFLA_VF_MAX */
6472 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6474 struct e1000_hw *hw = &adapter->hw;
6478 /* Find the vlan filter for this id */
6479 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6480 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6481 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6482 vid == (reg & E1000_VLVF_VLANID_MASK))
6486 if (i >= E1000_VLVF_ARRAY_SIZE)
6492 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6494 struct e1000_hw *hw = &adapter->hw;
6495 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6496 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6500 igb_set_vf_vlan_strip(adapter, vf, true);
6502 igb_set_vf_vlan_strip(adapter, vf, false);
6504 /* If in promiscuous mode we need to make sure the PF also has
6505 * the VLAN filter set.
6507 if (add && (adapter->netdev->flags & IFF_PROMISC))
6508 err = igb_vlvf_set(adapter, vid, add,
6509 adapter->vfs_allocated_count);
6513 err = igb_vlvf_set(adapter, vid, add, vf);
6518 /* Go through all the checks to see if the VLAN filter should
6519 * be wiped completely.
6521 if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6524 int regndx = igb_find_vlvf_entry(adapter, vid);
6527 /* See if any other pools are set for this VLAN filter
6528 * entry other than the PF.
6530 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6531 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6532 adapter->vfs_allocated_count);
6533 /* If the filter was removed then ensure PF pool bit
6534 * is cleared if the PF only added itself to the pool
6535 * because the PF is in promiscuous mode.
6537 if ((vlvf & VLAN_VID_MASK) == vid &&
6538 #ifndef HAVE_VLAN_RX_REGISTER
6539 !test_bit(vid, adapter->active_vlans) &&
6542 igb_vlvf_set(adapter, vid, add,
6543 adapter->vfs_allocated_count);
6550 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6552 struct e1000_hw *hw = &adapter->hw;
6554 /* clear flags except flag that the PF has set the MAC */
6555 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6556 adapter->vf_data[vf].last_nack = jiffies;
6558 /* reset offloads to defaults */
6559 igb_set_vmolr(adapter, vf, true);
6561 /* reset vlans for device */
6562 igb_clear_vf_vfta(adapter, vf);
6564 if (adapter->vf_data[vf].pf_vlan)
6565 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6566 adapter->vf_data[vf].pf_vlan,
6567 adapter->vf_data[vf].pf_qos);
6569 igb_clear_vf_vfta(adapter, vf);
6572 /* reset multicast table array for vf */
6573 adapter->vf_data[vf].num_vf_mc_hashes = 0;
6575 /* Flush and reset the mta with the new values */
6576 igb_set_rx_mode(adapter->netdev);
6579 * Reset the VFs TDWBAL and TDWBAH registers which are not
6582 E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6583 E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6584 if (hw->mac.type == e1000_82576) {
6585 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6586 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6590 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6592 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6594 /* generate a new mac address as we were hotplug removed/added */
6595 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6596 random_ether_addr(vf_mac);
6598 /* process remaining reset events */
6599 igb_vf_reset(adapter, vf);
6602 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6604 struct e1000_hw *hw = &adapter->hw;
6605 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6607 u8 *addr = (u8 *)(&msgbuf[1]);
6609 /* process all the same items cleared in a function level reset */
6610 igb_vf_reset(adapter, vf);
6612 /* set vf mac address */
6613 igb_del_mac_filter(adapter, vf_mac, vf);
6614 igb_add_mac_filter(adapter, vf_mac, vf);
6616 /* enable transmit and receive for vf */
6617 reg = E1000_READ_REG(hw, E1000_VFTE);
6618 E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6619 reg = E1000_READ_REG(hw, E1000_VFRE);
6620 E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6622 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6624 /* reply to reset with ack and vf mac address */
6625 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6626 memcpy(addr, vf_mac, 6);
6627 e1000_write_mbx(hw, msgbuf, 3, vf);
6630 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6633 * The VF MAC Address is stored in a packed array of bytes
6634 * starting at the second 32 bit word of the msg array
6636 unsigned char *addr = (unsigned char *)&msg[1];
6639 if (is_valid_ether_addr(addr))
6640 err = igb_set_vf_mac(adapter, vf, addr);
6645 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6647 struct e1000_hw *hw = &adapter->hw;
6648 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6649 u32 msg = E1000_VT_MSGTYPE_NACK;
6651 /* if device isn't clear to send it shouldn't be reading either */
6652 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6653 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6654 e1000_write_mbx(hw, &msg, 1, vf);
6655 vf_data->last_nack = jiffies;
6659 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6661 struct pci_dev *pdev = adapter->pdev;
6662 u32 msgbuf[E1000_VFMAILBOX_SIZE];
6663 struct e1000_hw *hw = &adapter->hw;
6664 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6667 retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6670 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6674 /* this is a message we already processed, do nothing */
6675 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6679 * until the vf completes a reset it should not be
6680 * allowed to start any configuration.
6683 if (msgbuf[0] == E1000_VF_RESET) {
6684 igb_vf_reset_msg(adapter, vf);
6688 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6689 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6690 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6691 e1000_write_mbx(hw, msgbuf, 1, vf);
6692 vf_data->last_nack = jiffies;
6697 switch ((msgbuf[0] & 0xFFFF)) {
6698 case E1000_VF_SET_MAC_ADDR:
6700 #ifndef IGB_DISABLE_VF_MAC_SET
6701 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6702 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6705 "VF %d attempted to override administratively "
6706 "set MAC address\nReload the VF driver to "
6707 "resume operations\n", vf);
6710 case E1000_VF_SET_PROMISC:
6711 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6713 case E1000_VF_SET_MULTICAST:
6714 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6716 case E1000_VF_SET_LPE:
6717 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6719 case E1000_VF_SET_VLAN:
6722 if (vf_data->pf_vlan)
6724 "VF %d attempted to override administratively "
6725 "set VLAN tag\nReload the VF driver to "
6726 "resume operations\n", vf);
6729 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6732 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6733 retval = -E1000_ERR_MBX;
6737 /* notify the VF of the results of what it sent us */
6739 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6741 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6743 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6745 e1000_write_mbx(hw, msgbuf, 1, vf);
6748 static void igb_msg_task(struct igb_adapter *adapter)
6750 struct e1000_hw *hw = &adapter->hw;
6753 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6754 /* process any reset requests */
6755 if (!e1000_check_for_rst(hw, vf))
6756 igb_vf_reset_event(adapter, vf);
6758 /* process any messages pending */
6759 if (!e1000_check_for_msg(hw, vf))
6760 igb_rcv_msg_from_vf(adapter, vf);
6762 /* process any acks */
6763 if (!e1000_check_for_ack(hw, vf))
6764 igb_rcv_ack_from_vf(adapter, vf);
6769 * igb_set_uta - Set unicast filter table address
6770 * @adapter: board private structure
6772 * The unicast table address is a register array of 32-bit registers.
6773 * The table is meant to be used in a way similar to how the MTA is used
6774 * however due to certain limitations in the hardware it is necessary to
6775 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6776 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6778 static void igb_set_uta(struct igb_adapter *adapter)
6780 struct e1000_hw *hw = &adapter->hw;
6783 /* The UTA table only exists on 82576 hardware and newer */
6784 if (hw->mac.type < e1000_82576)
6787 /* we only need to do this if VMDq is enabled */
6788 if (!adapter->vmdq_pools)
6791 for (i = 0; i < hw->mac.uta_reg_count; i++)
6792 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6796 * igb_intr_msi - Interrupt Handler
6797 * @irq: interrupt number
6798 * @data: pointer to a network interface device structure
6800 static irqreturn_t igb_intr_msi(int irq, void *data)
6802 struct igb_adapter *adapter = data;
6803 struct igb_q_vector *q_vector = adapter->q_vector[0];
6804 struct e1000_hw *hw = &adapter->hw;
6805 /* read ICR disables interrupts using IAM */
6806 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6808 igb_write_itr(q_vector);
6810 if (icr & E1000_ICR_DRSTA)
6811 schedule_work(&adapter->reset_task);
6813 if (icr & E1000_ICR_DOUTSYNC) {
6814 /* HW is reporting DMA is out of sync */
6815 adapter->stats.doosync++;
6818 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6819 hw->mac.get_link_status = 1;
6820 if (!test_bit(__IGB_DOWN, &adapter->state))
6821 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6824 #ifdef HAVE_PTP_1588_CLOCK
6825 if (icr & E1000_ICR_TS) {
6826 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6828 if (tsicr & E1000_TSICR_TXTS) {
6829 /* acknowledge the interrupt */
6830 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6831 /* retrieve hardware timestamp */
6832 schedule_work(&adapter->ptp_tx_work);
6835 #endif /* HAVE_PTP_1588_CLOCK */
6837 napi_schedule(&q_vector->napi);
6843 * igb_intr - Legacy Interrupt Handler
6844 * @irq: interrupt number
6845 * @data: pointer to a network interface device structure
6847 static irqreturn_t igb_intr(int irq, void *data)
6849 struct igb_adapter *adapter = data;
6850 struct igb_q_vector *q_vector = adapter->q_vector[0];
6851 struct e1000_hw *hw = &adapter->hw;
6852 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6853 * need for the IMC write */
6854 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6856 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6857 * not set, then the adapter didn't send an interrupt */
6858 if (!(icr & E1000_ICR_INT_ASSERTED))
6861 igb_write_itr(q_vector);
6863 if (icr & E1000_ICR_DRSTA)
6864 schedule_work(&adapter->reset_task);
6866 if (icr & E1000_ICR_DOUTSYNC) {
6867 /* HW is reporting DMA is out of sync */
6868 adapter->stats.doosync++;
6871 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6872 hw->mac.get_link_status = 1;
6873 /* guard against interrupt when we're going down */
6874 if (!test_bit(__IGB_DOWN, &adapter->state))
6875 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6878 #ifdef HAVE_PTP_1588_CLOCK
6879 if (icr & E1000_ICR_TS) {
6880 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6882 if (tsicr & E1000_TSICR_TXTS) {
6883 /* acknowledge the interrupt */
6884 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6885 /* retrieve hardware timestamp */
6886 schedule_work(&adapter->ptp_tx_work);
6889 #endif /* HAVE_PTP_1588_CLOCK */
6891 napi_schedule(&q_vector->napi);
6896 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6898 struct igb_adapter *adapter = q_vector->adapter;
6899 struct e1000_hw *hw = &adapter->hw;
6901 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6902 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6903 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6904 igb_set_itr(q_vector);
6906 igb_update_ring_itr(q_vector);
6909 if (!test_bit(__IGB_DOWN, &adapter->state)) {
6910 if (adapter->msix_entries)
6911 E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6913 igb_irq_enable(adapter);
6918 * igb_poll - NAPI Rx polling callback
6919 * @napi: napi polling structure
6920 * @budget: count of how many packets we should handle
6922 static int igb_poll(struct napi_struct *napi, int budget)
6924 struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6925 bool clean_complete = true;
6928 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6929 igb_update_dca(q_vector);
6931 if (q_vector->tx.ring)
6932 clean_complete = igb_clean_tx_irq(q_vector);
6934 if (q_vector->rx.ring)
6935 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6937 #ifndef HAVE_NETDEV_NAPI_LIST
6938 /* if netdev is disabled we need to stop polling */
6939 if (!netif_running(q_vector->adapter->netdev))
6940 clean_complete = true;
6943 /* If all work not completed, return budget and keep polling */
6944 if (!clean_complete)
6947 /* If not enough Rx work done, exit the polling mode */
6948 napi_complete(napi);
6949 igb_ring_irq_enable(q_vector);
6955 * igb_clean_tx_irq - Reclaim resources after transmit completes
6956 * @q_vector: pointer to q_vector containing needed info
6957 * returns TRUE if ring is completely cleaned
6959 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6961 struct igb_adapter *adapter = q_vector->adapter;
6962 struct igb_ring *tx_ring = q_vector->tx.ring;
6963 struct igb_tx_buffer *tx_buffer;
6964 union e1000_adv_tx_desc *tx_desc;
6965 unsigned int total_bytes = 0, total_packets = 0;
6966 unsigned int budget = q_vector->tx.work_limit;
6967 unsigned int i = tx_ring->next_to_clean;
6969 if (test_bit(__IGB_DOWN, &adapter->state))
6972 tx_buffer = &tx_ring->tx_buffer_info[i];
6973 tx_desc = IGB_TX_DESC(tx_ring, i);
6974 i -= tx_ring->count;
6977 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6979 /* if next_to_watch is not set then there is no work pending */
6983 /* prevent any other reads prior to eop_desc */
6984 read_barrier_depends();
6986 /* if DD is not set pending work has not been completed */
6987 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6990 /* clear next_to_watch to prevent false hangs */
6991 tx_buffer->next_to_watch = NULL;
6993 /* update the statistics for this packet */
6994 total_bytes += tx_buffer->bytecount;
6995 total_packets += tx_buffer->gso_segs;
6998 dev_kfree_skb_any(tx_buffer->skb);
7000 /* unmap skb header data */
7001 dma_unmap_single(tx_ring->dev,
7002 dma_unmap_addr(tx_buffer, dma),
7003 dma_unmap_len(tx_buffer, len),
7006 /* clear tx_buffer data */
7007 tx_buffer->skb = NULL;
7008 dma_unmap_len_set(tx_buffer, len, 0);
7010 /* clear last DMA location and unmap remaining buffers */
7011 while (tx_desc != eop_desc) {
7016 i -= tx_ring->count;
7017 tx_buffer = tx_ring->tx_buffer_info;
7018 tx_desc = IGB_TX_DESC(tx_ring, 0);
7021 /* unmap any remaining paged data */
7022 if (dma_unmap_len(tx_buffer, len)) {
7023 dma_unmap_page(tx_ring->dev,
7024 dma_unmap_addr(tx_buffer, dma),
7025 dma_unmap_len(tx_buffer, len),
7027 dma_unmap_len_set(tx_buffer, len, 0);
7031 /* move us one more past the eop_desc for start of next pkt */
7036 i -= tx_ring->count;
7037 tx_buffer = tx_ring->tx_buffer_info;
7038 tx_desc = IGB_TX_DESC(tx_ring, 0);
7041 /* issue prefetch for next Tx descriptor */
7044 /* update budget accounting */
7046 } while (likely(budget));
7048 netdev_tx_completed_queue(txring_txq(tx_ring),
7049 total_packets, total_bytes);
7051 i += tx_ring->count;
7052 tx_ring->next_to_clean = i;
7053 tx_ring->tx_stats.bytes += total_bytes;
7054 tx_ring->tx_stats.packets += total_packets;
7055 q_vector->tx.total_bytes += total_bytes;
7056 q_vector->tx.total_packets += total_packets;
7059 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7060 !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7062 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7064 struct e1000_hw *hw = &adapter->hw;
7066 /* Detect a transmit hang in hardware, this serializes the
7067 * check with the clearing of time_stamp and movement of i */
7068 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7069 if (tx_buffer->next_to_watch &&
7070 time_after(jiffies, tx_buffer->time_stamp +
7071 (adapter->tx_timeout_factor * HZ))
7072 && !(E1000_READ_REG(hw, E1000_STATUS) &
7073 E1000_STATUS_TXOFF)) {
7075 /* detected Tx unit hang */
7077 adapter->tx_hang_detected = TRUE;
7078 if (adapter->disable_hw_reset) {
7079 DPRINTK(DRV, WARNING,
7080 "Deactivating netdev watchdog timer\n");
7081 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7082 dev_put(netdev_ring(tx_ring));
7083 #ifndef HAVE_NET_DEVICE_OPS
7084 netdev_ring(tx_ring)->tx_timeout = NULL;
7088 dev_err(tx_ring->dev,
7089 "Detected Tx Unit Hang\n"
7093 " next_to_use <%x>\n"
7094 " next_to_clean <%x>\n"
7095 "buffer_info[next_to_clean]\n"
7096 " time_stamp <%lx>\n"
7097 " next_to_watch <%p>\n"
7099 " desc.status <%x>\n",
7100 tx_ring->queue_index,
7101 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7102 readl(tx_ring->tail),
7103 tx_ring->next_to_use,
7104 tx_ring->next_to_clean,
7105 tx_buffer->time_stamp,
7106 tx_buffer->next_to_watch,
7108 tx_buffer->next_to_watch->wb.status);
7109 if (netif_is_multiqueue(netdev_ring(tx_ring)))
7110 netif_stop_subqueue(netdev_ring(tx_ring),
7111 ring_queue_index(tx_ring));
7113 netif_stop_queue(netdev_ring(tx_ring));
7115 /* we are about to reset, no point in enabling stuff */
7120 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7121 if (unlikely(total_packets &&
7122 netif_carrier_ok(netdev_ring(tx_ring)) &&
7123 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7124 /* Make sure that anybody stopping the queue after this
7125 * sees the new next_to_clean.
7128 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7129 if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7130 ring_queue_index(tx_ring)) &&
7131 !(test_bit(__IGB_DOWN, &adapter->state))) {
7132 netif_wake_subqueue(netdev_ring(tx_ring),
7133 ring_queue_index(tx_ring));
7134 tx_ring->tx_stats.restart_queue++;
7137 if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7138 !(test_bit(__IGB_DOWN, &adapter->state))) {
7139 netif_wake_queue(netdev_ring(tx_ring));
7140 tx_ring->tx_stats.restart_queue++;
7148 #ifdef HAVE_VLAN_RX_REGISTER
7150 * igb_receive_skb - helper function to handle rx indications
7151 * @q_vector: structure containing interrupt and ring information
7152 * @skb: packet to send up
7154 static void igb_receive_skb(struct igb_q_vector *q_vector,
7155 struct sk_buff *skb)
7157 struct vlan_group **vlgrp = netdev_priv(skb->dev);
7159 if (IGB_CB(skb)->vid) {
7161 vlan_gro_receive(&q_vector->napi, *vlgrp,
7162 IGB_CB(skb)->vid, skb);
7164 dev_kfree_skb_any(skb);
7167 napi_gro_receive(&q_vector->napi, skb);
7171 #endif /* HAVE_VLAN_RX_REGISTER */
7172 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7174 * igb_reuse_rx_page - page flip buffer and store it back on the ring
7175 * @rx_ring: rx descriptor ring to store buffers on
7176 * @old_buff: donor buffer to have page reused
7178 * Synchronizes page for reuse by the adapter
7180 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7181 struct igb_rx_buffer *old_buff)
7183 struct igb_rx_buffer *new_buff;
7184 u16 nta = rx_ring->next_to_alloc;
7186 new_buff = &rx_ring->rx_buffer_info[nta];
7188 /* update, and store next to alloc */
7190 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7192 /* transfer page from old buffer to new buffer */
7193 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7195 /* sync the buffer for use by the device */
7196 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7197 old_buff->page_offset,
7202 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7204 unsigned int truesize)
7206 /* avoid re-using remote pages */
7207 if (unlikely(page_to_nid(page) != numa_node_id()))
7210 #if (PAGE_SIZE < 8192)
7211 /* if we are only owner of page we can reuse it */
7212 if (unlikely(page_count(page) != 1))
7215 /* flip page offset to other buffer */
7216 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7219 /* move offset up to the next cache line */
7220 rx_buffer->page_offset += truesize;
7222 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7226 /* bump ref count on page before it is given to the stack */
7233 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7234 * @rx_ring: rx descriptor ring to transact packets on
7235 * @rx_buffer: buffer containing page to add
7236 * @rx_desc: descriptor containing length of buffer written by hardware
7237 * @skb: sk_buff to place the data into
7239 * This function will add the data contained in rx_buffer->page to the skb.
7240 * This is done either through a direct copy if the data in the buffer is
7241 * less than the skb header size, otherwise it will just attach the page as
7242 * a frag to the skb.
7244 * The function will then update the page offset if necessary and return
7245 * true if the buffer can be reused by the adapter.
7247 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7248 struct igb_rx_buffer *rx_buffer,
7249 union e1000_adv_rx_desc *rx_desc,
7250 struct sk_buff *skb)
7252 struct page *page = rx_buffer->page;
7253 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7254 #if (PAGE_SIZE < 8192)
7255 unsigned int truesize = IGB_RX_BUFSZ;
7257 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7260 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7261 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7263 #ifdef HAVE_PTP_1588_CLOCK
7264 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7265 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7266 va += IGB_TS_HDR_LEN;
7267 size -= IGB_TS_HDR_LEN;
7269 #endif /* HAVE_PTP_1588_CLOCK */
7271 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7273 /* we can reuse buffer as-is, just make sure it is local */
7274 if (likely(page_to_nid(page) == numa_node_id()))
7277 /* this page cannot be reused so discard it */
7282 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7283 rx_buffer->page_offset, size, truesize);
7285 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7288 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7289 union e1000_adv_rx_desc *rx_desc,
7290 struct sk_buff *skb)
7292 struct igb_rx_buffer *rx_buffer;
7295 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7297 page = rx_buffer->page;
7301 void *page_addr = page_address(page) +
7302 rx_buffer->page_offset;
7304 /* prefetch first cache line of first page */
7305 prefetch(page_addr);
7306 #if L1_CACHE_BYTES < 128
7307 prefetch(page_addr + L1_CACHE_BYTES);
7310 /* allocate a skb to store the frags */
7311 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7313 if (unlikely(!skb)) {
7314 rx_ring->rx_stats.alloc_failed++;
7319 * we will be copying header into skb->data in
7320 * pskb_may_pull so it is in our interest to prefetch
7321 * it now to avoid a possible cache miss
7323 prefetchw(skb->data);
7326 /* we are reusing so sync this buffer for CPU use */
7327 dma_sync_single_range_for_cpu(rx_ring->dev,
7329 rx_buffer->page_offset,
7333 /* pull page into skb */
7334 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7335 /* hand second half of page back to the ring */
7336 igb_reuse_rx_page(rx_ring, rx_buffer);
7338 /* we are not reusing the buffer so unmap it */
7339 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7340 PAGE_SIZE, DMA_FROM_DEVICE);
7343 /* clear contents of rx_buffer */
7344 rx_buffer->page = NULL;
7350 static inline void igb_rx_checksum(struct igb_ring *ring,
7351 union e1000_adv_rx_desc *rx_desc,
7352 struct sk_buff *skb)
7354 skb_checksum_none_assert(skb);
7356 /* Ignore Checksum bit is set */
7357 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7360 /* Rx checksum disabled via ethtool */
7361 if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7364 /* TCP/UDP checksum error bit is set */
7365 if (igb_test_staterr(rx_desc,
7366 E1000_RXDEXT_STATERR_TCPE |
7367 E1000_RXDEXT_STATERR_IPE)) {
7369 * work around errata with sctp packets where the TCPE aka
7370 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7371 * packets, (aka let the stack check the crc32c)
7373 if (!((skb->len == 60) &&
7374 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7375 ring->rx_stats.csum_err++;
7377 /* let the stack verify checksum errors */
7380 /* It must be a TCP or UDP packet with a valid checksum */
7381 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7382 E1000_RXD_STAT_UDPCS))
7383 skb->ip_summed = CHECKSUM_UNNECESSARY;
7386 #ifdef NETIF_F_RXHASH
7387 static inline void igb_rx_hash(struct igb_ring *ring,
7388 union e1000_adv_rx_desc *rx_desc,
7389 struct sk_buff *skb)
7391 if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7392 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7398 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7400 * igb_merge_active_tail - merge active tail into lro skb
7401 * @tail: pointer to active tail in frag_list
7403 * This function merges the length and data of an active tail into the
7404 * skb containing the frag_list. It resets the tail's pointer to the head,
7405 * but it leaves the heads pointer to tail intact.
7407 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7409 struct sk_buff *head = IGB_CB(tail)->head;
7414 head->len += tail->len;
7415 head->data_len += tail->len;
7416 head->truesize += tail->len;
7418 IGB_CB(tail)->head = NULL;
7424 * igb_add_active_tail - adds an active tail into the skb frag_list
7425 * @head: pointer to the start of the skb
7426 * @tail: pointer to active tail to add to frag_list
7428 * This function adds an active tail to the end of the frag list. This tail
7429 * will still be receiving data so we cannot yet ad it's stats to the main
7430 * skb. That is done via igb_merge_active_tail.
7432 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7434 struct sk_buff *old_tail = IGB_CB(head)->tail;
7437 igb_merge_active_tail(old_tail);
7438 old_tail->next = tail;
7440 skb_shinfo(head)->frag_list = tail;
7443 IGB_CB(tail)->head = head;
7444 IGB_CB(head)->tail = tail;
7446 IGB_CB(head)->append_cnt++;
7450 * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7451 * @head: pointer to head of an active frag list
7453 * This function will clear the frag_tail_tracker pointer on an active
7454 * frag_list and returns true if the pointer was actually set
7456 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7458 struct sk_buff *tail = IGB_CB(head)->tail;
7463 igb_merge_active_tail(tail);
7465 IGB_CB(head)->tail = NULL;
7470 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7472 * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7473 * @adapter: board private structure
7474 * @rx_desc: pointer to the rx descriptor
7475 * @skb: pointer to the skb to be merged
7478 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7479 union e1000_adv_rx_desc *rx_desc,
7480 struct sk_buff *skb)
7482 struct iphdr *iph = (struct iphdr *)skb->data;
7483 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7485 /* verify hardware indicates this is IPv4/TCP */
7486 if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7487 !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7490 /* .. and LRO is enabled */
7491 if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7494 /* .. and we are not in promiscuous mode */
7495 if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7498 /* .. and the header is large enough for us to read IP/TCP fields */
7499 if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7502 /* .. and there are no VLANs on packet */
7503 if (skb->protocol != __constant_htons(ETH_P_IP))
7506 /* .. and we are version 4 with no options */
7507 if (*(u8 *)iph != 0x45)
7510 /* .. and the packet is not fragmented */
7511 if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7514 /* .. and that next header is TCP */
7515 if (iph->protocol != IPPROTO_TCP)
7521 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7523 return (struct igb_lrohdr *)skb->data;
7527 * igb_lro_flush - Indicate packets to upper layer.
7529 * Update IP and TCP header part of head skb if more than one
7530 * skb's chained and indicate packets to upper layer.
7532 static void igb_lro_flush(struct igb_q_vector *q_vector,
7533 struct sk_buff *skb)
7535 struct igb_lro_list *lrolist = &q_vector->lrolist;
7537 __skb_unlink(skb, &lrolist->active);
7539 if (IGB_CB(skb)->append_cnt) {
7540 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7542 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7543 /* close any active lro contexts */
7544 igb_close_active_frag_list(skb);
7547 /* incorporate ip header and re-calculate checksum */
7548 lroh->iph.tot_len = ntohs(skb->len);
7549 lroh->iph.check = 0;
7551 /* header length is 5 since we know no options exist */
7552 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7554 /* clear TCP checksum to indicate we are an LRO frame */
7557 /* incorporate latest timestamp into the tcp header */
7558 if (IGB_CB(skb)->tsecr) {
7559 lroh->ts[2] = IGB_CB(skb)->tsecr;
7560 lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7564 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7565 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7569 #ifdef HAVE_VLAN_RX_REGISTER
7570 igb_receive_skb(q_vector, skb);
7572 napi_gro_receive(&q_vector->napi, skb);
7574 lrolist->stats.flushed++;
7577 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7579 struct igb_lro_list *lrolist = &q_vector->lrolist;
7580 struct sk_buff *skb, *tmp;
7582 skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7583 igb_lro_flush(q_vector, skb);
7587 * igb_lro_header_ok - Main LRO function.
7589 static void igb_lro_header_ok(struct sk_buff *skb)
7591 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7592 u16 opt_bytes, data_len;
7594 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7595 IGB_CB(skb)->tail = NULL;
7597 IGB_CB(skb)->tsecr = 0;
7598 IGB_CB(skb)->append_cnt = 0;
7599 IGB_CB(skb)->mss = 0;
7601 /* ensure that the checksum is valid */
7602 if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7605 /* If we see CE codepoint in IP header, packet is not mergeable */
7606 if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7609 /* ensure no bits set besides ack or psh */
7610 if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7611 lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7615 /* store the total packet length */
7616 data_len = ntohs(lroh->iph.tot_len);
7618 /* remove any padding from the end of the skb */
7619 __pskb_trim(skb, data_len);
7621 /* remove header length from data length */
7622 data_len -= sizeof(struct igb_lrohdr);
7625 * check for timestamps. Since the only option we handle are timestamps,
7626 * we only have to handle the simple case of aligned timestamps
7628 opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7629 if (opt_bytes != 0) {
7630 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7631 !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7632 TCPOLEN_TSTAMP_ALIGNED) ||
7633 (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7634 (TCPOPT_NOP << 16) |
7635 (TCPOPT_TIMESTAMP << 8) |
7636 TCPOLEN_TIMESTAMP)) ||
7637 (lroh->ts[2] == 0)) {
7641 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7642 IGB_CB(skb)->tsecr = lroh->ts[2];
7644 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7647 /* record data_len as mss for the packet */
7648 IGB_CB(skb)->mss = data_len;
7649 IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7652 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7653 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7655 struct skb_shared_info *sh_info;
7656 struct skb_shared_info *new_skb_info;
7657 unsigned int data_len;
7659 sh_info = skb_shinfo(lro_skb);
7660 new_skb_info = skb_shinfo(new_skb);
7662 /* copy frags into the last skb */
7663 memcpy(sh_info->frags + sh_info->nr_frags,
7664 new_skb_info->frags,
7665 new_skb_info->nr_frags * sizeof(skb_frag_t));
7667 /* copy size data over */
7668 sh_info->nr_frags += new_skb_info->nr_frags;
7669 data_len = IGB_CB(new_skb)->mss;
7670 lro_skb->len += data_len;
7671 lro_skb->data_len += data_len;
7672 lro_skb->truesize += data_len;
7674 /* wipe record of data from new_skb */
7675 new_skb_info->nr_frags = 0;
7676 new_skb->len = new_skb->data_len = 0;
7677 dev_kfree_skb_any(new_skb);
7680 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7682 * igb_lro_receive - if able, queue skb into lro chain
7683 * @q_vector: structure containing interrupt and ring information
7684 * @new_skb: pointer to current skb being checked
7686 * Checks whether the skb given is eligible for LRO and if that's
7687 * fine chains it to the existing lro_skb based on flowid. If an LRO for
7688 * the flow doesn't exist create one.
7690 static void igb_lro_receive(struct igb_q_vector *q_vector,
7691 struct sk_buff *new_skb)
7693 struct sk_buff *lro_skb;
7694 struct igb_lro_list *lrolist = &q_vector->lrolist;
7695 struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7696 __be32 saddr = lroh->iph.saddr;
7697 __be32 daddr = lroh->iph.daddr;
7698 __be32 tcp_ports = *(__be32 *)&lroh->th;
7700 #ifdef HAVE_VLAN_RX_REGISTER
7701 u16 vid = IGB_CB(new_skb)->vid;
7703 u16 vid = new_skb->vlan_tci;
7706 igb_lro_header_ok(new_skb);
7709 * we have a packet that might be eligible for LRO,
7710 * so see if it matches anything we might expect
7712 skb_queue_walk(&lrolist->active, lro_skb) {
7713 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7714 igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7715 igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7718 #ifdef HAVE_VLAN_RX_REGISTER
7719 if (IGB_CB(lro_skb)->vid != vid)
7721 if (lro_skb->vlan_tci != vid)
7725 /* out of order packet */
7726 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7727 igb_lro_flush(q_vector, lro_skb);
7728 IGB_CB(new_skb)->mss = 0;
7732 /* TCP timestamp options have changed */
7733 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7734 igb_lro_flush(q_vector, lro_skb);
7738 /* make sure timestamp values are increasing */
7739 if (IGB_CB(lro_skb)->tsecr &&
7740 IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7741 igb_lro_flush(q_vector, lro_skb);
7742 IGB_CB(new_skb)->mss = 0;
7746 data_len = IGB_CB(new_skb)->mss;
7748 /* Check for all of the above below
7751 * resultant packet would be too large
7752 * new skb is larger than our current mss
7753 * data would remain in header
7754 * we would consume more frags then the sk_buff contains
7755 * ack sequence numbers changed
7756 * window size has changed
7758 if (data_len == 0 ||
7759 data_len > IGB_CB(lro_skb)->mss ||
7760 data_len > IGB_CB(lro_skb)->free ||
7761 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7762 data_len != new_skb->data_len ||
7763 skb_shinfo(new_skb)->nr_frags >=
7764 (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7766 igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7767 igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7768 igb_lro_flush(q_vector, lro_skb);
7772 /* Remove IP and TCP header*/
7773 skb_pull(new_skb, new_skb->len - data_len);
7775 /* update timestamp and timestamp echo response */
7776 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7777 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7779 /* update sequence and free space */
7780 IGB_CB(lro_skb)->next_seq += data_len;
7781 IGB_CB(lro_skb)->free -= data_len;
7783 /* update append_cnt */
7784 IGB_CB(lro_skb)->append_cnt++;
7786 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7787 /* if header is empty pull pages into current skb */
7788 igb_merge_frags(lro_skb, new_skb);
7790 /* chain this new skb in frag_list */
7791 igb_add_active_tail(lro_skb, new_skb);
7794 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7795 skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7796 igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7797 igb_lro_flush(q_vector, lro_skb);
7800 lrolist->stats.coal++;
7804 if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7805 /* if we are at capacity flush the tail */
7806 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7807 lro_skb = skb_peek_tail(&lrolist->active);
7809 igb_lro_flush(q_vector, lro_skb);
7812 /* update sequence and free space */
7813 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7814 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7816 /* .. and insert at the front of the active list */
7817 __skb_queue_head(&lrolist->active, new_skb);
7819 lrolist->stats.coal++;
7823 /* packet not handled by any of the above, pass it to the stack */
7824 #ifdef HAVE_VLAN_RX_REGISTER
7825 igb_receive_skb(q_vector, new_skb);
7827 napi_gro_receive(&q_vector->napi, new_skb);
7831 #endif /* IGB_NO_LRO */
7833 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7834 * @rx_ring: rx descriptor ring packet is being transacted on
7835 * @rx_desc: pointer to the EOP Rx descriptor
7836 * @skb: pointer to current skb being populated
7838 * This function checks the ring, descriptor, and packet information in
7839 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7840 * other fields within the skb.
7842 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7843 union e1000_adv_rx_desc *rx_desc,
7844 struct sk_buff *skb)
7846 struct net_device *dev = rx_ring->netdev;
7847 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7849 #ifdef NETIF_F_RXHASH
7850 igb_rx_hash(rx_ring, rx_desc, skb);
7853 igb_rx_checksum(rx_ring, rx_desc, skb);
7855 /* update packet type stats */
7856 if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7857 rx_ring->rx_stats.ipv4_packets++;
7858 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7859 rx_ring->rx_stats.ipv4e_packets++;
7860 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7861 rx_ring->rx_stats.ipv6_packets++;
7862 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7863 rx_ring->rx_stats.ipv6e_packets++;
7864 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7865 rx_ring->rx_stats.tcp_packets++;
7866 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7867 rx_ring->rx_stats.udp_packets++;
7868 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7869 rx_ring->rx_stats.sctp_packets++;
7870 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7871 rx_ring->rx_stats.nfs_packets++;
7873 #ifdef HAVE_PTP_1588_CLOCK
7874 igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7875 #endif /* HAVE_PTP_1588_CLOCK */
7877 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7878 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7880 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7882 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7884 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7885 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7886 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7888 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7889 #ifdef HAVE_VLAN_RX_REGISTER
7890 IGB_CB(skb)->vid = vid;
7892 IGB_CB(skb)->vid = 0;
7895 #ifdef HAVE_VLAN_PROTOCOL
7896 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7898 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7905 skb_record_rx_queue(skb, rx_ring->queue_index);
7907 skb->protocol = eth_type_trans(skb, dev);
7911 * igb_is_non_eop - process handling of non-EOP buffers
7912 * @rx_ring: Rx ring being processed
7913 * @rx_desc: Rx descriptor for current buffer
7915 * This function updates next to clean. If the buffer is an EOP buffer
7916 * this function exits returning false, otherwise it will place the
7917 * sk_buff in the next buffer to be chained and return true indicating
7918 * that this is in fact a non-EOP buffer.
7920 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7921 union e1000_adv_rx_desc *rx_desc)
7923 u32 ntc = rx_ring->next_to_clean + 1;
7925 /* fetch, update, and store next to clean */
7926 ntc = (ntc < rx_ring->count) ? ntc : 0;
7927 rx_ring->next_to_clean = ntc;
7929 prefetch(IGB_RX_DESC(rx_ring, ntc));
7931 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7937 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7938 /* igb_clean_rx_irq -- * legacy */
7939 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7941 struct igb_ring *rx_ring = q_vector->rx.ring;
7942 unsigned int total_bytes = 0, total_packets = 0;
7943 u16 cleaned_count = igb_desc_unused(rx_ring);
7946 struct igb_rx_buffer *rx_buffer;
7947 union e1000_adv_rx_desc *rx_desc;
7948 struct sk_buff *skb;
7951 /* return some buffers to hardware, one at a time is too slow */
7952 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7953 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7957 ntc = rx_ring->next_to_clean;
7958 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7959 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7961 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7965 * This memory barrier is needed to keep us from reading
7966 * any other fields out of the rx_desc until we know the
7967 * RXD_STAT_DD bit is set
7971 skb = rx_buffer->skb;
7973 prefetch(skb->data);
7975 /* pull the header of the skb in */
7976 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7978 /* clear skb reference in buffer info structure */
7979 rx_buffer->skb = NULL;
7983 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
7985 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
7986 rx_ring->rx_buffer_len,
7990 if (igb_test_staterr(rx_desc,
7991 E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
7992 dev_kfree_skb_any(skb);
7996 total_bytes += skb->len;
7998 /* populate checksum, timestamp, VLAN, and protocol */
7999 igb_process_skb_fields(rx_ring, rx_desc, skb);
8002 if (igb_can_lro(rx_ring, rx_desc, skb))
8003 igb_lro_receive(q_vector, skb);
8006 #ifdef HAVE_VLAN_RX_REGISTER
8007 igb_receive_skb(q_vector, skb);
8009 napi_gro_receive(&q_vector->napi, skb);
8013 netdev_ring(rx_ring)->last_rx = jiffies;
8016 /* update budget accounting */
8018 } while (likely(total_packets < budget));
8020 rx_ring->rx_stats.packets += total_packets;
8021 rx_ring->rx_stats.bytes += total_bytes;
8022 q_vector->rx.total_packets += total_packets;
8023 q_vector->rx.total_bytes += total_bytes;
8026 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8029 igb_lro_flush_all(q_vector);
8031 #endif /* IGB_NO_LRO */
8032 return (total_packets < budget);
8034 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8036 * igb_get_headlen - determine size of header for LRO/GRO
8037 * @data: pointer to the start of the headers
8038 * @max_len: total length of section to find headers in
8040 * This function is meant to determine the length of headers that will
8041 * be recognized by hardware for LRO, and GRO offloads. The main
8042 * motivation of doing this is to only perform one pull for IPv4 TCP
8043 * packets so that we can do basic things like calculating the gso_size
8044 * based on the average data per packet.
8046 static unsigned int igb_get_headlen(unsigned char *data,
8047 unsigned int max_len)
8050 unsigned char *network;
8053 struct vlan_hdr *vlan;
8056 struct ipv6hdr *ipv6;
8059 u8 nexthdr = 0; /* default to not TCP */
8062 /* this should never happen, but better safe than sorry */
8063 if (max_len < ETH_HLEN)
8066 /* initialize network frame pointer */
8069 /* set first protocol and move network header forward */
8070 protocol = hdr.eth->h_proto;
8071 hdr.network += ETH_HLEN;
8073 /* handle any vlan tag if present */
8074 if (protocol == __constant_htons(ETH_P_8021Q)) {
8075 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8078 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8079 hdr.network += VLAN_HLEN;
8082 /* handle L3 protocols */
8083 if (protocol == __constant_htons(ETH_P_IP)) {
8084 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8087 /* access ihl as a u8 to avoid unaligned access on ia64 */
8088 hlen = (hdr.network[0] & 0x0F) << 2;
8090 /* verify hlen meets minimum size requirements */
8091 if (hlen < sizeof(struct iphdr))
8092 return hdr.network - data;
8094 /* record next protocol if header is present */
8095 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8096 nexthdr = hdr.ipv4->protocol;
8098 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8099 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8102 /* record next protocol */
8103 nexthdr = hdr.ipv6->nexthdr;
8104 hlen = sizeof(struct ipv6hdr);
8105 #endif /* NETIF_F_TSO6 */
8107 return hdr.network - data;
8110 /* relocate pointer to start of L4 header */
8111 hdr.network += hlen;
8113 /* finally sort out TCP */
8114 if (nexthdr == IPPROTO_TCP) {
8115 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8118 /* access doff as a u8 to avoid unaligned access on ia64 */
8119 hlen = (hdr.network[12] & 0xF0) >> 2;
8121 /* verify hlen meets minimum size requirements */
8122 if (hlen < sizeof(struct tcphdr))
8123 return hdr.network - data;
8125 hdr.network += hlen;
8126 } else if (nexthdr == IPPROTO_UDP) {
8127 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8130 hdr.network += sizeof(struct udphdr);
8134 * If everything has gone correctly hdr.network should be the
8135 * data section of the packet and will be the end of the header.
8136 * If not then it probably represents the end of the last recognized
8139 if ((hdr.network - data) < max_len)
8140 return hdr.network - data;
8146 * igb_pull_tail - igb specific version of skb_pull_tail
8147 * @rx_ring: rx descriptor ring packet is being transacted on
8148 * @rx_desc: pointer to the EOP Rx descriptor
8149 * @skb: pointer to current skb being adjusted
8151 * This function is an igb specific version of __pskb_pull_tail. The
8152 * main difference between this version and the original function is that
8153 * this function can make several assumptions about the state of things
8154 * that allow for significant optimizations versus the standard function.
8155 * As a result we can do things like drop a frag and maintain an accurate
8156 * truesize for the skb.
8158 static void igb_pull_tail(struct igb_ring *rx_ring,
8159 union e1000_adv_rx_desc *rx_desc,
8160 struct sk_buff *skb)
8162 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8164 unsigned int pull_len;
8167 * it is valid to use page_address instead of kmap since we are
8168 * working with pages allocated out of the lomem pool per
8169 * alloc_page(GFP_ATOMIC)
8171 va = skb_frag_address(frag);
8173 #ifdef HAVE_PTP_1588_CLOCK
8174 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8175 /* retrieve timestamp from buffer */
8176 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8178 /* update pointers to remove timestamp header */
8179 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8180 frag->page_offset += IGB_TS_HDR_LEN;
8181 skb->data_len -= IGB_TS_HDR_LEN;
8182 skb->len -= IGB_TS_HDR_LEN;
8184 /* move va to start of packet data */
8185 va += IGB_TS_HDR_LEN;
8187 #endif /* HAVE_PTP_1588_CLOCK */
8190 * we need the header to contain the greater of either ETH_HLEN or
8191 * 60 bytes if the skb->len is less than 60 for skb_pad.
8193 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8195 /* align pull length to size of long to optimize memcpy performance */
8196 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8198 /* update all of the pointers */
8199 skb_frag_size_sub(frag, pull_len);
8200 frag->page_offset += pull_len;
8201 skb->data_len -= pull_len;
8202 skb->tail += pull_len;
8206 * igb_cleanup_headers - Correct corrupted or empty headers
8207 * @rx_ring: rx descriptor ring packet is being transacted on
8208 * @rx_desc: pointer to the EOP Rx descriptor
8209 * @skb: pointer to current skb being fixed
8211 * Address the case where we are pulling data in on pages only
8212 * and as such no data is present in the skb header.
8214 * In addition if skb is not at least 60 bytes we need to pad it so that
8215 * it is large enough to qualify as a valid Ethernet frame.
8217 * Returns true if an error was encountered and skb was freed.
8219 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8220 union e1000_adv_rx_desc *rx_desc,
8221 struct sk_buff *skb)
8224 if (unlikely((igb_test_staterr(rx_desc,
8225 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8226 struct net_device *netdev = rx_ring->netdev;
8227 if (!(netdev->features & NETIF_F_RXALL)) {
8228 dev_kfree_skb_any(skb);
8233 /* place header in linear portion of buffer */
8234 if (skb_is_nonlinear(skb))
8235 igb_pull_tail(rx_ring, rx_desc, skb);
8237 /* if skb_pad returns an error the skb was freed */
8238 if (unlikely(skb->len < 60)) {
8239 int pad_len = 60 - skb->len;
8241 if (skb_pad(skb, pad_len))
8243 __skb_put(skb, pad_len);
8249 /* igb_clean_rx_irq -- * packet split */
8250 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8252 struct igb_ring *rx_ring = q_vector->rx.ring;
8253 struct sk_buff *skb = rx_ring->skb;
8254 unsigned int total_bytes = 0, total_packets = 0;
8255 u16 cleaned_count = igb_desc_unused(rx_ring);
8258 union e1000_adv_rx_desc *rx_desc;
8260 /* return some buffers to hardware, one at a time is too slow */
8261 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8262 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8266 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8268 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8272 * This memory barrier is needed to keep us from reading
8273 * any other fields out of the rx_desc until we know the
8274 * RXD_STAT_DD bit is set
8278 /* retrieve a buffer from the ring */
8279 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8281 /* exit if we failed to retrieve a buffer */
8287 /* fetch next buffer in frame if non-eop */
8288 if (igb_is_non_eop(rx_ring, rx_desc))
8291 /* verify the packet layout is correct */
8292 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8297 /* probably a little skewed due to removing CRC */
8298 total_bytes += skb->len;
8300 /* populate checksum, timestamp, VLAN, and protocol */
8301 igb_process_skb_fields(rx_ring, rx_desc, skb);
8304 if (igb_can_lro(rx_ring, rx_desc, skb))
8305 igb_lro_receive(q_vector, skb);
8308 #ifdef HAVE_VLAN_RX_REGISTER
8309 igb_receive_skb(q_vector, skb);
8311 napi_gro_receive(&q_vector->napi, skb);
8315 netdev_ring(rx_ring)->last_rx = jiffies;
8318 /* reset skb pointer */
8321 /* update budget accounting */
8323 } while (likely(total_packets < budget));
8325 /* place incomplete frames back on ring for completion */
8328 rx_ring->rx_stats.packets += total_packets;
8329 rx_ring->rx_stats.bytes += total_bytes;
8330 q_vector->rx.total_packets += total_packets;
8331 q_vector->rx.total_bytes += total_bytes;
8334 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8337 igb_lro_flush_all(q_vector);
8339 #endif /* IGB_NO_LRO */
8340 return (total_packets < budget);
8342 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8344 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8345 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8346 struct igb_rx_buffer *bi)
8348 struct sk_buff *skb = bi->skb;
8349 dma_addr_t dma = bi->dma;
8355 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8356 rx_ring->rx_buffer_len);
8359 rx_ring->rx_stats.alloc_failed++;
8363 /* initialize skb for ring */
8364 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8367 dma = dma_map_single(rx_ring->dev, skb->data,
8368 rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8370 /* if mapping failed free memory back to system since
8371 * there isn't much point in holding memory we can't use
8373 if (dma_mapping_error(rx_ring->dev, dma)) {
8374 dev_kfree_skb_any(skb);
8377 rx_ring->rx_stats.alloc_failed++;
8385 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8386 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8387 struct igb_rx_buffer *bi)
8389 struct page *page = bi->page;
8392 /* since we are recycling buffers we should seldom need to alloc */
8396 /* alloc new page for storage */
8397 page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8398 if (unlikely(!page)) {
8399 rx_ring->rx_stats.alloc_failed++;
8403 /* map page for use */
8404 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8407 * if mapping failed free memory back to system since
8408 * there isn't much point in holding memory we can't use
8410 if (dma_mapping_error(rx_ring->dev, dma)) {
8413 rx_ring->rx_stats.alloc_failed++;
8419 bi->page_offset = 0;
8424 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8426 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8427 * @adapter: address of board private structure
8429 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8431 union e1000_adv_rx_desc *rx_desc;
8432 struct igb_rx_buffer *bi;
8433 u16 i = rx_ring->next_to_use;
8439 rx_desc = IGB_RX_DESC(rx_ring, i);
8440 bi = &rx_ring->rx_buffer_info[i];
8441 i -= rx_ring->count;
8444 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8445 if (!igb_alloc_mapped_skb(rx_ring, bi))
8447 if (!igb_alloc_mapped_page(rx_ring, bi))
8448 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8452 * Refresh the desc even if buffer_addrs didn't change
8453 * because each write-back erases this info.
8455 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8456 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8458 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8465 rx_desc = IGB_RX_DESC(rx_ring, 0);
8466 bi = rx_ring->rx_buffer_info;
8467 i -= rx_ring->count;
8470 /* clear the hdr_addr for the next_to_use descriptor */
8471 rx_desc->read.hdr_addr = 0;
8474 } while (cleaned_count);
8476 i += rx_ring->count;
8478 if (rx_ring->next_to_use != i) {
8479 /* record the next descriptor to use */
8480 rx_ring->next_to_use = i;
8482 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8483 /* update next to alloc since we have filled the ring */
8484 rx_ring->next_to_alloc = i;
8488 * Force memory writes to complete before letting h/w
8489 * know there are new descriptors to fetch. (Only
8490 * applicable for weak-ordered memory model archs,
8494 writel(i, rx_ring->tail);
8505 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8507 struct igb_adapter *adapter = netdev_priv(netdev);
8508 struct mii_ioctl_data *data = if_mii(ifr);
8510 if (adapter->hw.phy.media_type != e1000_media_type_copper)
8515 data->phy_id = adapter->hw.phy.addr;
8518 if (!capable(CAP_NET_ADMIN))
8520 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8528 return E1000_SUCCESS;
8538 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8545 return igb_mii_ioctl(netdev, ifr, cmd);
8547 #ifdef HAVE_PTP_1588_CLOCK
8549 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8550 #endif /* HAVE_PTP_1588_CLOCK */
8551 #ifdef ETHTOOL_OPS_COMPAT
8553 return ethtool_ioctl(ifr);
8560 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8562 struct igb_adapter *adapter = hw->back;
8565 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8567 return -E1000_ERR_CONFIG;
8569 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8571 return E1000_SUCCESS;
8574 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8576 struct igb_adapter *adapter = hw->back;
8579 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8581 return -E1000_ERR_CONFIG;
8583 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8585 return E1000_SUCCESS;
8588 #ifdef HAVE_VLAN_RX_REGISTER
8589 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8591 void igb_vlan_mode(struct net_device *netdev, u32 features)
8594 struct igb_adapter *adapter = netdev_priv(netdev);
8595 struct e1000_hw *hw = &adapter->hw;
8598 #ifdef HAVE_VLAN_RX_REGISTER
8599 bool enable = !!vlgrp;
8601 igb_irq_disable(adapter);
8603 adapter->vlgrp = vlgrp;
8605 if (!test_bit(__IGB_DOWN, &adapter->state))
8606 igb_irq_enable(adapter);
8608 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8609 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8611 bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8616 /* enable VLAN tag insert/strip */
8617 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8618 ctrl |= E1000_CTRL_VME;
8619 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8621 /* Disable CFI check */
8622 rctl = E1000_READ_REG(hw, E1000_RCTL);
8623 rctl &= ~E1000_RCTL_CFIEN;
8624 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8626 /* disable VLAN tag insert/strip */
8627 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8628 ctrl &= ~E1000_CTRL_VME;
8629 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8632 #ifndef CONFIG_IGB_VMDQ_NETDEV
8633 for (i = 0; i < adapter->vmdq_pools; i++) {
8634 igb_set_vf_vlan_strip(adapter,
8635 adapter->vfs_allocated_count + i,
8640 igb_set_vf_vlan_strip(adapter,
8641 adapter->vfs_allocated_count,
8644 for (i = 1; i < adapter->vmdq_pools; i++) {
8645 #ifdef HAVE_VLAN_RX_REGISTER
8646 struct igb_vmdq_adapter *vadapter;
8647 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8648 enable = !!vadapter->vlgrp;
8650 struct net_device *vnetdev;
8651 vnetdev = adapter->vmdq_netdev[i-1];
8652 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8653 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8655 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8658 igb_set_vf_vlan_strip(adapter,
8659 adapter->vfs_allocated_count + i,
8664 igb_rlpml_set(adapter);
8667 #ifdef HAVE_VLAN_PROTOCOL
8668 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8669 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8670 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8671 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8672 __always_unused __be16 proto, u16 vid)
8674 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8677 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8680 struct igb_adapter *adapter = netdev_priv(netdev);
8681 int pf_id = adapter->vfs_allocated_count;
8683 /* attempt to add filter to vlvf array */
8684 igb_vlvf_set(adapter, vid, TRUE, pf_id);
8686 /* add the filter since PF can receive vlans w/o entry in vlvf */
8687 igb_vfta_set(adapter, vid, TRUE);
8688 #ifndef HAVE_NETDEV_VLAN_FEATURES
8690 /* Copy feature flags from netdev to the vlan netdev for this vid.
8691 * This allows things like TSO to bubble down to our vlan device.
8692 * There is no need to update netdev for vlan 0 (DCB), since it
8693 * wouldn't has v_netdev.
8695 if (adapter->vlgrp) {
8696 struct vlan_group *vlgrp = adapter->vlgrp;
8697 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8699 v_netdev->features |= netdev->features;
8700 vlan_group_set_device(vlgrp, vid, v_netdev);
8704 #ifndef HAVE_VLAN_RX_REGISTER
8706 set_bit(vid, adapter->active_vlans);
8708 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8713 #ifdef HAVE_VLAN_PROTOCOL
8714 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8715 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8716 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8717 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8718 __always_unused __be16 proto, u16 vid)
8720 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8723 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8726 struct igb_adapter *adapter = netdev_priv(netdev);
8727 int pf_id = adapter->vfs_allocated_count;
8730 #ifdef HAVE_VLAN_RX_REGISTER
8731 igb_irq_disable(adapter);
8733 vlan_group_set_device(adapter->vlgrp, vid, NULL);
8735 if (!test_bit(__IGB_DOWN, &adapter->state))
8736 igb_irq_enable(adapter);
8738 #endif /* HAVE_VLAN_RX_REGISTER */
8739 /* remove vlan from VLVF table array */
8740 err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8742 /* if vid was not present in VLVF just remove it from table */
8744 igb_vfta_set(adapter, vid, FALSE);
8745 #ifndef HAVE_VLAN_RX_REGISTER
8747 clear_bit(vid, adapter->active_vlans);
8749 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8754 static void igb_restore_vlan(struct igb_adapter *adapter)
8756 #ifdef HAVE_VLAN_RX_REGISTER
8757 igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8759 if (adapter->vlgrp) {
8761 for (vid = 0; vid < VLAN_N_VID; vid++) {
8762 if (!vlan_group_get_device(adapter->vlgrp, vid))
8764 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8765 igb_vlan_rx_add_vid(adapter->netdev,
8766 htons(ETH_P_8021Q), vid);
8768 igb_vlan_rx_add_vid(adapter->netdev, vid);
8775 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8777 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8778 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8779 igb_vlan_rx_add_vid(adapter->netdev,
8780 htons(ETH_P_8021Q), vid);
8782 igb_vlan_rx_add_vid(adapter->netdev, vid);
8787 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8789 struct pci_dev *pdev = adapter->pdev;
8790 struct e1000_mac_info *mac = &adapter->hw.mac;
8794 /* SerDes device's does not support 10Mbps Full/duplex
8795 * and 100Mbps Half duplex
8797 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8799 case SPEED_10 + DUPLEX_HALF:
8800 case SPEED_10 + DUPLEX_FULL:
8801 case SPEED_100 + DUPLEX_HALF:
8802 dev_err(pci_dev_to_dev(pdev),
8803 "Unsupported Speed/Duplex configuration\n");
8811 case SPEED_10 + DUPLEX_HALF:
8812 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8814 case SPEED_10 + DUPLEX_FULL:
8815 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8817 case SPEED_100 + DUPLEX_HALF:
8818 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8820 case SPEED_100 + DUPLEX_FULL:
8821 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8823 case SPEED_1000 + DUPLEX_FULL:
8825 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8827 case SPEED_1000 + DUPLEX_HALF: /* not supported */
8829 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8833 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8834 adapter->hw.phy.mdix = AUTO_ALL_MODES;
8839 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8842 struct net_device *netdev = pci_get_drvdata(pdev);
8843 struct igb_adapter *adapter = netdev_priv(netdev);
8844 struct e1000_hw *hw = &adapter->hw;
8845 u32 ctrl, rctl, status;
8846 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8851 netif_device_detach(netdev);
8853 status = E1000_READ_REG(hw, E1000_STATUS);
8854 if (status & E1000_STATUS_LU)
8855 wufc &= ~E1000_WUFC_LNKC;
8857 if (netif_running(netdev))
8858 __igb_close(netdev, true);
8860 igb_clear_interrupt_scheme(adapter);
8863 retval = pci_save_state(pdev);
8869 igb_setup_rctl(adapter);
8870 igb_set_rx_mode(netdev);
8872 /* turn on all-multi mode if wake on multicast is enabled */
8873 if (wufc & E1000_WUFC_MC) {
8874 rctl = E1000_READ_REG(hw, E1000_RCTL);
8875 rctl |= E1000_RCTL_MPE;
8876 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8879 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8880 /* phy power management enable */
8881 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8882 ctrl |= E1000_CTRL_ADVD3WUC;
8883 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8885 /* Allow time for pending master requests to run */
8886 e1000_disable_pcie_master(hw);
8888 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8889 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8891 E1000_WRITE_REG(hw, E1000_WUC, 0);
8892 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8895 *enable_wake = wufc || adapter->en_mng_pt;
8897 igb_power_down_link(adapter);
8899 igb_power_up_link(adapter);
8901 /* Release control of h/w to f/w. If f/w is AMT enabled, this
8902 * would have already happened in close and is redundant. */
8903 igb_release_hw_control(adapter);
8905 pci_disable_device(pdev);
8911 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8912 static int igb_suspend(struct device *dev)
8914 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8915 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8917 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8918 struct pci_dev *pdev = to_pci_dev(dev);
8919 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8923 retval = __igb_shutdown(pdev, &wake, 0);
8928 pci_prepare_to_sleep(pdev);
8930 pci_wake_from_d3(pdev, false);
8931 pci_set_power_state(pdev, PCI_D3hot);
8937 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8938 static int igb_resume(struct device *dev)
8940 static int igb_resume(struct pci_dev *pdev)
8941 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8943 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8944 struct pci_dev *pdev = to_pci_dev(dev);
8945 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8946 struct net_device *netdev = pci_get_drvdata(pdev);
8947 struct igb_adapter *adapter = netdev_priv(netdev);
8948 struct e1000_hw *hw = &adapter->hw;
8951 pci_set_power_state(pdev, PCI_D0);
8952 pci_restore_state(pdev);
8953 pci_save_state(pdev);
8955 err = pci_enable_device_mem(pdev);
8957 dev_err(pci_dev_to_dev(pdev),
8958 "igb: Cannot enable PCI device from suspend\n");
8961 pci_set_master(pdev);
8963 pci_enable_wake(pdev, PCI_D3hot, 0);
8964 pci_enable_wake(pdev, PCI_D3cold, 0);
8966 if (igb_init_interrupt_scheme(adapter, true)) {
8967 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8973 /* let the f/w know that the h/w is now under the control of the
8975 igb_get_hw_control(adapter);
8977 E1000_WRITE_REG(hw, E1000_WUS, ~0);
8979 if (netdev->flags & IFF_UP) {
8981 err = __igb_open(netdev, true);
8987 netif_device_attach(netdev);
8992 #ifdef CONFIG_PM_RUNTIME
8993 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8994 static int igb_runtime_idle(struct device *dev)
8996 struct pci_dev *pdev = to_pci_dev(dev);
8997 struct net_device *netdev = pci_get_drvdata(pdev);
8998 struct igb_adapter *adapter = netdev_priv(netdev);
9000 if (!igb_has_link(adapter))
9001 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9006 static int igb_runtime_suspend(struct device *dev)
9008 struct pci_dev *pdev = to_pci_dev(dev);
9012 retval = __igb_shutdown(pdev, &wake, 1);
9017 pci_prepare_to_sleep(pdev);
9019 pci_wake_from_d3(pdev, false);
9020 pci_set_power_state(pdev, PCI_D3hot);
9026 static int igb_runtime_resume(struct device *dev)
9028 return igb_resume(dev);
9030 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9031 #endif /* CONFIG_PM_RUNTIME */
9032 #endif /* CONFIG_PM */
9034 #ifdef USE_REBOOT_NOTIFIER
9035 /* only want to do this for 2.4 kernels? */
9036 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9039 struct pci_dev *pdev = NULL;
9046 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9047 if (pci_dev_driver(pdev) == &igb_driver) {
9048 __igb_shutdown(pdev, &wake, 0);
9049 if (event == SYS_POWER_OFF) {
9050 pci_wake_from_d3(pdev, wake);
9051 pci_set_power_state(pdev, PCI_D3hot);
9059 static void igb_shutdown(struct pci_dev *pdev)
9063 __igb_shutdown(pdev, &wake, 0);
9065 if (system_state == SYSTEM_POWER_OFF) {
9066 pci_wake_from_d3(pdev, wake);
9067 pci_set_power_state(pdev, PCI_D3hot);
9070 #endif /* USE_REBOOT_NOTIFIER */
9072 #ifdef CONFIG_NET_POLL_CONTROLLER
9074 * Polling 'interrupt' - used by things like netconsole to send skbs
9075 * without having to re-enable interrupts. It's not called while
9076 * the interrupt routine is executing.
9078 static void igb_netpoll(struct net_device *netdev)
9080 struct igb_adapter *adapter = netdev_priv(netdev);
9081 struct e1000_hw *hw = &adapter->hw;
9082 struct igb_q_vector *q_vector;
9085 for (i = 0; i < adapter->num_q_vectors; i++) {
9086 q_vector = adapter->q_vector[i];
9087 if (adapter->msix_entries)
9088 E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9090 igb_irq_disable(adapter);
9091 napi_schedule(&q_vector->napi);
9094 #endif /* CONFIG_NET_POLL_CONTROLLER */
9097 #define E1000_DEV_ID_82576_VF 0x10CA
9099 * igb_io_error_detected - called when PCI error is detected
9100 * @pdev: Pointer to PCI device
9101 * @state: The current pci connection state
9103 * This function is called after a PCI bus error affecting
9104 * this device has been detected.
9106 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9107 pci_channel_state_t state)
9109 struct net_device *netdev = pci_get_drvdata(pdev);
9110 struct igb_adapter *adapter = netdev_priv(netdev);
9112 #ifdef CONFIG_PCI_IOV__UNUSED
9113 struct pci_dev *bdev, *vfdev;
9114 u32 dw0, dw1, dw2, dw3;
9116 u16 req_id, pf_func;
9118 if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9119 goto skip_bad_vf_detection;
9121 bdev = pdev->bus->self;
9122 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9123 bdev = bdev->bus->self;
9126 goto skip_bad_vf_detection;
9128 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9130 goto skip_bad_vf_detection;
9132 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9133 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9134 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9135 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9138 /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9139 if (!(req_id & 0x0080))
9140 goto skip_bad_vf_detection;
9142 pf_func = req_id & 0x01;
9143 if ((pf_func & 1) == (pdev->devfn & 1)) {
9145 vf = (req_id & 0x7F) >> 1;
9146 dev_err(pci_dev_to_dev(pdev),
9147 "VF %d has caused a PCIe error\n", vf);
9148 dev_err(pci_dev_to_dev(pdev),
9149 "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9150 "%8.8x\tdw3: %8.8x\n",
9151 dw0, dw1, dw2, dw3);
9153 /* Find the pci device of the offending VF */
9154 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9155 E1000_DEV_ID_82576_VF, NULL);
9157 if (vfdev->devfn == (req_id & 0xFF))
9159 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9160 E1000_DEV_ID_82576_VF, vfdev);
9163 * There's a slim chance the VF could have been hot plugged,
9164 * so if it is no longer present we don't need to issue the
9165 * VFLR. Just clean up the AER in that case.
9168 dev_err(pci_dev_to_dev(pdev),
9169 "Issuing VFLR to VF %d\n", vf);
9170 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9173 pci_cleanup_aer_uncorrect_error_status(pdev);
9177 * Even though the error may have occurred on the other port
9178 * we still need to increment the vf error reference count for
9179 * both ports because the I/O resume function will be called
9182 adapter->vferr_refcount++;
9184 return PCI_ERS_RESULT_RECOVERED;
9186 skip_bad_vf_detection:
9187 #endif /* CONFIG_PCI_IOV */
9189 netif_device_detach(netdev);
9191 if (state == pci_channel_io_perm_failure)
9192 return PCI_ERS_RESULT_DISCONNECT;
9194 if (netif_running(netdev))
9196 pci_disable_device(pdev);
9198 /* Request a slot slot reset. */
9199 return PCI_ERS_RESULT_NEED_RESET;
9203 * igb_io_slot_reset - called after the pci bus has been reset.
9204 * @pdev: Pointer to PCI device
9206 * Restart the card from scratch, as if from a cold-boot. Implementation
9207 * resembles the first-half of the igb_resume routine.
9209 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9211 struct net_device *netdev = pci_get_drvdata(pdev);
9212 struct igb_adapter *adapter = netdev_priv(netdev);
9213 struct e1000_hw *hw = &adapter->hw;
9214 pci_ers_result_t result;
9216 if (pci_enable_device_mem(pdev)) {
9217 dev_err(pci_dev_to_dev(pdev),
9218 "Cannot re-enable PCI device after reset.\n");
9219 result = PCI_ERS_RESULT_DISCONNECT;
9221 pci_set_master(pdev);
9222 pci_restore_state(pdev);
9223 pci_save_state(pdev);
9225 pci_enable_wake(pdev, PCI_D3hot, 0);
9226 pci_enable_wake(pdev, PCI_D3cold, 0);
9228 schedule_work(&adapter->reset_task);
9229 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9230 result = PCI_ERS_RESULT_RECOVERED;
9233 pci_cleanup_aer_uncorrect_error_status(pdev);
9239 * igb_io_resume - called when traffic can start flowing again.
9240 * @pdev: Pointer to PCI device
9242 * This callback is called when the error recovery driver tells us that
9243 * its OK to resume normal operation. Implementation resembles the
9244 * second-half of the igb_resume routine.
9246 static void igb_io_resume(struct pci_dev *pdev)
9248 struct net_device *netdev = pci_get_drvdata(pdev);
9249 struct igb_adapter *adapter = netdev_priv(netdev);
9251 if (adapter->vferr_refcount) {
9252 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9253 adapter->vferr_refcount--;
9257 if (netif_running(netdev)) {
9258 if (igb_up(adapter)) {
9259 dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9264 netif_device_attach(netdev);
9266 /* let the f/w know that the h/w is now under the control of the
9268 igb_get_hw_control(adapter);
9271 #endif /* HAVE_PCI_ERS */
9273 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9275 struct e1000_hw *hw = &adapter->hw;
9278 if (is_zero_ether_addr(addr))
9281 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9282 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9284 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9285 IGB_MAC_STATE_IN_USE);
9286 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9287 adapter->mac_table[i].queue = queue;
9288 igb_sync_mac_table(adapter);
9293 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9295 /* search table for addr, if found, set to 0 and sync */
9297 struct e1000_hw *hw = &adapter->hw;
9299 if (is_zero_ether_addr(addr))
9301 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9302 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9303 adapter->mac_table[i].queue == queue) {
9304 adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9305 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9306 adapter->mac_table[i].queue = 0;
9307 igb_sync_mac_table(adapter);
9313 static int igb_set_vf_mac(struct igb_adapter *adapter,
9314 int vf, unsigned char *mac_addr)
9316 igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9317 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9319 igb_add_mac_filter(adapter, mac_addr, vf);
9325 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9327 struct igb_adapter *adapter = netdev_priv(netdev);
9328 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9330 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9331 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9332 dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9333 " change effective.\n");
9334 if (test_bit(__IGB_DOWN, &adapter->state)) {
9335 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9336 " but the PF device is not up.\n");
9337 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9338 " attempting to use the VF device.\n");
9340 return igb_set_vf_mac(adapter, vf, mac);
9343 static int igb_link_mbps(int internal_link_speed)
9345 switch (internal_link_speed) {
9357 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9364 /* Calculate the rate factor values to set */
9365 rf_int = link_speed / tx_rate;
9366 rf_dec = (link_speed - (rf_int * tx_rate));
9367 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9369 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9370 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9371 E1000_RTTBCNRC_RF_INT_MASK);
9372 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9377 E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9379 * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9380 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9382 E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9383 E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9386 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9388 int actual_link_speed, i;
9389 bool reset_rate = false;
9391 /* VF TX rate limit was not set */
9392 if ((adapter->vf_rate_link_speed == 0) ||
9393 (adapter->hw.mac.type != e1000_82576))
9396 actual_link_speed = igb_link_mbps(adapter->link_speed);
9397 if (actual_link_speed != adapter->vf_rate_link_speed) {
9399 adapter->vf_rate_link_speed = 0;
9400 dev_info(&adapter->pdev->dev,
9401 "Link speed has been changed. VF Transmit rate is disabled\n");
9404 for (i = 0; i < adapter->vfs_allocated_count; i++) {
9406 adapter->vf_data[i].tx_rate = 0;
9408 igb_set_vf_rate_limit(&adapter->hw, i,
9409 adapter->vf_data[i].tx_rate, actual_link_speed);
9413 #ifdef HAVE_VF_MIN_MAX_TXRATE
9414 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9416 #else /* HAVE_VF_MIN_MAX_TXRATE */
9417 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9418 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9420 struct igb_adapter *adapter = netdev_priv(netdev);
9421 struct e1000_hw *hw = &adapter->hw;
9422 int actual_link_speed;
9424 if (hw->mac.type != e1000_82576)
9427 #ifdef HAVE_VF_MIN_MAX_TXRATE
9430 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9432 actual_link_speed = igb_link_mbps(adapter->link_speed);
9433 if ((vf >= adapter->vfs_allocated_count) ||
9434 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9435 (tx_rate < 0) || (tx_rate > actual_link_speed))
9438 adapter->vf_rate_link_speed = actual_link_speed;
9439 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9440 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9445 static int igb_ndo_get_vf_config(struct net_device *netdev,
9446 int vf, struct ifla_vf_info *ivi)
9448 struct igb_adapter *adapter = netdev_priv(netdev);
9449 if (vf >= adapter->vfs_allocated_count)
9452 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9453 #ifdef HAVE_VF_MIN_MAX_TXRATE
9454 ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9455 ivi->min_tx_rate = 0;
9456 #else /* HAVE_VF_MIN_MAX_TXRATE */
9457 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9458 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9459 ivi->vlan = adapter->vf_data[vf].pf_vlan;
9460 ivi->qos = adapter->vf_data[vf].pf_qos;
9461 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9462 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9467 static void igb_vmm_control(struct igb_adapter *adapter)
9469 struct e1000_hw *hw = &adapter->hw;
9473 switch (hw->mac.type) {
9476 /* replication is not supported for 82575 */
9479 /* notify HW that the MAC is adding vlan tags */
9480 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9481 reg |= (E1000_DTXCTL_VLAN_ADDED |
9482 E1000_DTXCTL_SPOOF_INT);
9483 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9485 /* enable replication vlan tag stripping */
9486 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9487 reg |= E1000_RPLOLR_STRVLAN;
9488 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9491 /* none of the above registers are supported by i350 */
9495 /* Enable Malicious Driver Detection */
9496 if ((adapter->vfs_allocated_count) &&
9498 if (hw->mac.type == e1000_i350)
9499 igb_enable_mdd(adapter);
9502 /* enable replication and loopback support */
9503 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9504 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9505 e1000_vmdq_set_loopback_pf(hw, 1);
9506 e1000_vmdq_set_anti_spoofing_pf(hw,
9507 adapter->vfs_allocated_count || adapter->vmdq_pools,
9508 adapter->vfs_allocated_count);
9509 e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9510 adapter->vmdq_pools);
9513 static void igb_init_fw(struct igb_adapter *adapter)
9515 struct e1000_fw_drv_info fw_cmd;
9516 struct e1000_hw *hw = &adapter->hw;
9520 if (hw->mac.type == e1000_i210)
9521 mask = E1000_SWFW_EEP_SM;
9523 mask = E1000_SWFW_PHY0_SM;
9524 /* i211 parts do not support this feature */
9525 if (hw->mac.type == e1000_i211)
9526 hw->mac.arc_subsystem_valid = false;
9528 if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9529 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9530 E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9531 fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9532 fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9533 fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9534 fw_cmd.port_num = hw->bus.func;
9535 fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9536 fw_cmd.hdr.checksum = 0;
9537 fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9539 fw_cmd.hdr.buf_len));
9540 e1000_host_interface_command(hw, (u8*)&fw_cmd,
9542 if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9546 dev_warn(pci_dev_to_dev(adapter->pdev),
9547 "Unable to get semaphore, firmware init failed.\n");
9548 hw->mac.ops.release_swfw_sync(hw, mask);
9551 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9553 struct e1000_hw *hw = &adapter->hw;
9558 if (hw->mac.type == e1000_i211)
9561 if (hw->mac.type > e1000_82580) {
9562 if (adapter->dmac != IGB_DMAC_DISABLE) {
9565 /* force threshold to 0. */
9566 E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9569 * DMA Coalescing high water mark needs to be greater
9570 * than the Rx threshold. Set hwm to PBA - max frame
9571 * size in 16B units, capping it at PBA - 6KB.
9573 hwm = 64 * pba - adapter->max_frame_size / 16;
9574 if (hwm < 64 * (pba - 6))
9575 hwm = 64 * (pba - 6);
9576 reg = E1000_READ_REG(hw, E1000_FCRTC);
9577 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9578 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9579 & E1000_FCRTC_RTH_COAL_MASK);
9580 E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9583 * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9584 * frame size, capping it at PBA - 10KB.
9586 dmac_thr = pba - adapter->max_frame_size / 512;
9587 if (dmac_thr < pba - 10)
9588 dmac_thr = pba - 10;
9589 reg = E1000_READ_REG(hw, E1000_DMACR);
9590 reg &= ~E1000_DMACR_DMACTHR_MASK;
9591 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9592 & E1000_DMACR_DMACTHR_MASK);
9594 /* transition to L0x or L1 if available..*/
9595 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9597 /* Check if status is 2.5Gb backplane connection
9598 * before configuration of watchdog timer, which is
9599 * in msec values in 12.8usec intervals
9600 * watchdog timer= msec values in 32usec intervals
9601 * for non 2.5Gb connection
9603 if (hw->mac.type == e1000_i354) {
9604 status = E1000_READ_REG(hw, E1000_STATUS);
9605 if ((status & E1000_STATUS_2P5_SKU) &&
9606 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9607 reg |= ((adapter->dmac * 5) >> 6);
9609 reg |= ((adapter->dmac) >> 5);
9611 reg |= ((adapter->dmac) >> 5);
9615 * Disable BMC-to-OS Watchdog enable
9616 * on devices that support OS-to-BMC
9618 if (hw->mac.type != e1000_i354)
9619 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9620 E1000_WRITE_REG(hw, E1000_DMACR, reg);
9622 /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9623 E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9625 /* This sets the time to wait before requesting
9626 * transition to low power state to number of usecs
9627 * needed to receive 1 512 byte frame at gigabit
9628 * line rate. On i350 device, time to make transition
9629 * to Lx state is delayed by 4 usec with flush disable
9630 * bit set to avoid losing mailbox interrupts
9632 reg = E1000_READ_REG(hw, E1000_DMCTLX);
9633 if (hw->mac.type == e1000_i350)
9634 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9636 /* in 2.5Gb connection, TTLX unit is 0.4 usec
9637 * which is 0x4*2 = 0xA. But delay is still 4 usec
9639 if (hw->mac.type == e1000_i354) {
9640 status = E1000_READ_REG(hw, E1000_STATUS);
9641 if ((status & E1000_STATUS_2P5_SKU) &&
9642 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9649 E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9651 /* free space in tx packet buffer to wake from DMA coal */
9652 E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9653 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9655 /* make low power state decision controlled by DMA coal */
9656 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9657 reg &= ~E1000_PCIEMISC_LX_DECISION;
9658 E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9659 } /* endif adapter->dmac is not disabled */
9660 } else if (hw->mac.type == e1000_82580) {
9661 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9662 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9663 reg & ~E1000_PCIEMISC_LX_DECISION);
9664 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9668 #ifdef HAVE_I2C_SUPPORT
9669 /* igb_read_i2c_byte - Reads 8 bit word over I2C
9670 * @hw: pointer to hardware structure
9671 * @byte_offset: byte offset to read
9672 * @dev_addr: device address
9675 * Performs byte read operation over I2C interface at
9676 * a specified device address.
9678 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9679 u8 dev_addr, u8 *data)
9681 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9682 struct i2c_client *this_client = adapter->i2c_client;
9687 return E1000_ERR_I2C;
9689 swfw_mask = E1000_SWFW_PHY0_SM;
9691 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9693 return E1000_ERR_SWFW_SYNC;
9695 status = i2c_smbus_read_byte_data(this_client, byte_offset);
9696 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9699 return E1000_ERR_I2C;
9702 return E1000_SUCCESS;
9706 /* igb_write_i2c_byte - Writes 8 bit word over I2C
9707 * @hw: pointer to hardware structure
9708 * @byte_offset: byte offset to write
9709 * @dev_addr: device address
9710 * @data: value to write
9712 * Performs byte write operation over I2C interface at
9713 * a specified device address.
9715 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9716 u8 dev_addr, u8 data)
9718 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9719 struct i2c_client *this_client = adapter->i2c_client;
9721 u16 swfw_mask = E1000_SWFW_PHY0_SM;
9724 return E1000_ERR_I2C;
9726 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9727 return E1000_ERR_SWFW_SYNC;
9728 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9729 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9732 return E1000_ERR_I2C;
9734 return E1000_SUCCESS;
9736 #endif /* HAVE_I2C_SUPPORT */
9741 * igb_probe - Device Initialization Routine
9742 * @pdev: PCI device information struct
9743 * @ent: entry in igb_pci_tbl
9745 * Returns 0 on success, negative on failure
9747 * igb_probe initializes an adapter identified by a pci_dev structure.
9748 * The OS initialization, configuring of the adapter private structure,
9749 * and a hardware reset occur.
9751 int igb_kni_probe(struct pci_dev *pdev,
9752 struct net_device **lad_dev)
9754 struct net_device *netdev;
9755 struct igb_adapter *adapter;
9756 struct e1000_hw *hw;
9757 u16 eeprom_data = 0;
9758 u8 pba_str[E1000_PBANUM_LENGTH];
9760 static int global_quad_port_a; /* global quad port a indication */
9761 int i, err, pci_using_dac = 0;
9762 static int cards_found;
9764 err = pci_enable_device_mem(pdev);
9770 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9772 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9776 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9778 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9780 IGB_ERR("No usable DMA configuration, "
9787 #ifndef HAVE_ASPM_QUIRKS
9788 /* 82575 requires that the pci-e link partner disable the L0s state */
9789 switch (pdev->device) {
9790 case E1000_DEV_ID_82575EB_COPPER:
9791 case E1000_DEV_ID_82575EB_FIBER_SERDES:
9792 case E1000_DEV_ID_82575GB_QUAD_COPPER:
9793 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9798 #endif /* HAVE_ASPM_QUIRKS */
9799 err = pci_request_selected_regions(pdev,
9800 pci_select_bars(pdev,
9806 pci_enable_pcie_error_reporting(pdev);
9808 pci_set_master(pdev);
9813 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9816 netdev = alloc_etherdev(sizeof(struct igb_adapter));
9817 #endif /* HAVE_TX_MQ */
9819 goto err_alloc_etherdev;
9821 SET_MODULE_OWNER(netdev);
9822 SET_NETDEV_DEV(netdev, &pdev->dev);
9824 //pci_set_drvdata(pdev, netdev);
9825 adapter = netdev_priv(netdev);
9826 adapter->netdev = netdev;
9827 adapter->pdev = pdev;
9830 adapter->port_num = hw->bus.func;
9831 adapter->msg_enable = (1 << debug) - 1;
9834 err = pci_save_state(pdev);
9839 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9840 pci_resource_len(pdev, 0));
9844 #ifdef HAVE_NET_DEVICE_OPS
9845 netdev->netdev_ops = &igb_netdev_ops;
9846 #else /* HAVE_NET_DEVICE_OPS */
9847 netdev->open = &igb_open;
9848 netdev->stop = &igb_close;
9849 netdev->get_stats = &igb_get_stats;
9850 #ifdef HAVE_SET_RX_MODE
9851 netdev->set_rx_mode = &igb_set_rx_mode;
9853 netdev->set_multicast_list = &igb_set_rx_mode;
9854 netdev->set_mac_address = &igb_set_mac;
9855 netdev->change_mtu = &igb_change_mtu;
9856 netdev->do_ioctl = &igb_ioctl;
9857 #ifdef HAVE_TX_TIMEOUT
9858 netdev->tx_timeout = &igb_tx_timeout;
9860 netdev->vlan_rx_register = igb_vlan_mode;
9861 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9862 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9863 #ifdef CONFIG_NET_POLL_CONTROLLER
9864 netdev->poll_controller = igb_netpoll;
9866 netdev->hard_start_xmit = &igb_xmit_frame;
9867 #endif /* HAVE_NET_DEVICE_OPS */
9868 igb_set_ethtool_ops(netdev);
9869 #ifdef HAVE_TX_TIMEOUT
9870 netdev->watchdog_timeo = 5 * HZ;
9873 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9875 adapter->bd_number = cards_found;
9877 /* setup the private structure */
9878 err = igb_sw_init(adapter);
9882 e1000_get_bus_info(hw);
9884 hw->phy.autoneg_wait_to_complete = FALSE;
9885 hw->mac.adaptive_ifs = FALSE;
9887 /* Copper options */
9888 if (hw->phy.media_type == e1000_media_type_copper) {
9889 hw->phy.mdix = AUTO_ALL_MODES;
9890 hw->phy.disable_polarity_correction = FALSE;
9891 hw->phy.ms_type = e1000_ms_hw_default;
9894 if (e1000_check_reset_block(hw))
9895 dev_info(pci_dev_to_dev(pdev),
9896 "PHY reset is blocked due to SOL/IDER session.\n");
9899 * features is initialized to 0 in allocation, it might have bits
9900 * set by igb_sw_init so we should use an or instead of an
9903 netdev->features |= NETIF_F_SG |
9905 #ifdef NETIF_F_IPV6_CSUM
9913 #endif /* NETIF_F_TSO */
9914 #ifdef NETIF_F_RXHASH
9918 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9919 NETIF_F_HW_VLAN_CTAG_RX |
9920 NETIF_F_HW_VLAN_CTAG_TX;
9922 NETIF_F_HW_VLAN_RX |
9926 if (hw->mac.type >= e1000_82576)
9927 netdev->features |= NETIF_F_SCTP_CSUM;
9929 #ifdef HAVE_NDO_SET_FEATURES
9930 /* copy netdev features into list of user selectable features */
9931 netdev->hw_features |= netdev->features;
9934 /* give us the option of enabling LRO later */
9935 netdev->hw_features |= NETIF_F_LRO;
9940 /* this is only needed on kernels prior to 2.6.39 */
9941 netdev->features |= NETIF_F_GRO;
9945 /* set this bit last since it cannot be part of hw_features */
9946 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9947 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9949 netdev->features |= NETIF_F_HW_VLAN_FILTER;
9952 #ifdef HAVE_NETDEV_VLAN_FEATURES
9953 netdev->vlan_features |= NETIF_F_TSO |
9961 netdev->features |= NETIF_F_HIGHDMA;
9964 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9966 if (adapter->dmac != IGB_DMAC_DISABLE)
9967 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9970 /* before reading the NVM, reset the controller to put the device in a
9971 * known good starting state */
9975 /* make sure the NVM is good */
9976 if (e1000_validate_nvm_checksum(hw) < 0) {
9977 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9983 /* copy the MAC address out of the NVM */
9984 if (e1000_read_mac_addr(hw))
9985 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
9986 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
9987 #ifdef ETHTOOL_GPERMADDR
9988 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
9990 if (!is_valid_ether_addr(netdev->perm_addr)) {
9992 if (!is_valid_ether_addr(netdev->dev_addr)) {
9994 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
9999 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10000 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10001 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10002 igb_rar_set(adapter, 0);
10004 /* get firmware version for ethtool -i */
10005 igb_set_fw_version(adapter);
10007 /* Check if Media Autosense is enabled */
10008 if (hw->mac.type == e1000_82580)
10009 igb_init_mas(adapter);
10012 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10013 (unsigned long) adapter);
10014 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10015 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10016 (unsigned long) adapter);
10017 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10018 (unsigned long) adapter);
10020 INIT_WORK(&adapter->reset_task, igb_reset_task);
10021 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10022 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10023 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10026 /* Initialize link properties that are user-changeable */
10027 adapter->fc_autoneg = true;
10028 hw->mac.autoneg = true;
10029 hw->phy.autoneg_advertised = 0x2f;
10031 hw->fc.requested_mode = e1000_fc_default;
10032 hw->fc.current_mode = e1000_fc_default;
10034 e1000_validate_mdi_setting(hw);
10036 /* By default, support wake on port A */
10037 if (hw->bus.func == 0)
10038 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10040 /* Check the NVM for wake support for non-port A ports */
10041 if (hw->mac.type >= e1000_82580)
10042 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10043 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10045 else if (hw->bus.func == 1)
10046 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10048 if (eeprom_data & IGB_EEPROM_APME)
10049 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10051 /* now that we have the eeprom settings, apply the special cases where
10052 * the eeprom may be wrong or the board simply won't support wake on
10053 * lan on a particular port */
10054 switch (pdev->device) {
10055 case E1000_DEV_ID_82575GB_QUAD_COPPER:
10056 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10058 case E1000_DEV_ID_82575EB_FIBER_SERDES:
10059 case E1000_DEV_ID_82576_FIBER:
10060 case E1000_DEV_ID_82576_SERDES:
10061 /* Wake events only supported on port A for dual fiber
10062 * regardless of eeprom setting */
10063 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10064 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10066 case E1000_DEV_ID_82576_QUAD_COPPER:
10067 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10068 /* if quad port adapter, disable WoL on all but port A */
10069 if (global_quad_port_a != 0)
10070 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10072 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10073 /* Reset for multiple quad port adapters */
10074 if (++global_quad_port_a == 4)
10075 global_quad_port_a = 0;
10078 /* If the device can't wake, don't set software support */
10079 if (!device_can_wakeup(&adapter->pdev->dev))
10080 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10084 /* initialize the wol settings based on the eeprom settings */
10085 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10086 adapter->wol |= E1000_WUFC_MAG;
10088 /* Some vendors want WoL disabled by default, but still supported */
10089 if ((hw->mac.type == e1000_i350) &&
10090 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10091 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10096 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10097 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10099 /* reset the hardware with the new settings */
10100 igb_reset(adapter);
10101 adapter->devrc = 0;
10103 #ifdef HAVE_I2C_SUPPORT
10104 /* Init the I2C interface */
10105 err = igb_init_i2c(adapter);
10107 dev_err(&pdev->dev, "failed to init i2c interface\n");
10110 #endif /* HAVE_I2C_SUPPORT */
10112 /* let the f/w know that the h/w is now under the control of the
10114 igb_get_hw_control(adapter);
10116 strncpy(netdev->name, "eth%d", IFNAMSIZ);
10117 err = register_netdev(netdev);
10121 #ifdef CONFIG_IGB_VMDQ_NETDEV
10122 err = igb_init_vmdq_netdevs(adapter);
10126 /* carrier off reporting is important to ethtool even BEFORE open */
10127 netif_carrier_off(netdev);
10130 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10131 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10132 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10133 igb_setup_dca(adapter);
10137 #ifdef HAVE_PTP_1588_CLOCK
10138 /* do hw tstamp init after resetting */
10139 igb_ptp_init(adapter);
10140 #endif /* HAVE_PTP_1588_CLOCK */
10142 #endif /* NO_KNI */
10143 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10144 /* print bus type/speed/width info */
10145 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10147 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10148 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10149 (hw->mac.type == e1000_i354) ? "integrated" :
10151 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10152 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10153 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10154 (hw->mac.type == e1000_i354) ? "integrated" :
10156 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10157 for (i = 0; i < 6; i++)
10158 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10160 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10162 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10163 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10167 /* Initialize the thermal sensor on i350 devices. */
10168 if (hw->mac.type == e1000_i350) {
10169 if (hw->bus.func == 0) {
10173 * Read the NVM to determine if this i350 device
10174 * supports an external thermal sensor.
10176 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10177 if (ets_word != 0x0000 && ets_word != 0xFFFF)
10178 adapter->ets = true;
10180 adapter->ets = false;
10185 igb_sysfs_init(adapter);
10189 igb_procfs_init(adapter);
10190 #endif /* IGB_PROCFS */
10191 #endif /* IGB_HWMON */
10192 #endif /* NO_KNI */
10194 adapter->ets = false;
10197 if (hw->phy.media_type == e1000_media_type_copper) {
10198 switch (hw->mac.type) {
10202 /* Enable EEE for internal copper PHY devices */
10203 err = e1000_set_eee_i350(hw);
10205 (adapter->flags & IGB_FLAG_EEE))
10206 adapter->eee_advert =
10207 MDIO_EEE_100TX | MDIO_EEE_1000T;
10210 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10211 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10212 err = e1000_set_eee_i354(hw);
10214 (adapter->flags & IGB_FLAG_EEE))
10215 adapter->eee_advert =
10216 MDIO_EEE_100TX | MDIO_EEE_1000T;
10224 /* send driver version info to firmware */
10225 if (hw->mac.type >= e1000_i350)
10226 igb_init_fw(adapter);
10229 if (netdev->features & NETIF_F_LRO)
10230 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10232 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10234 dev_info(pci_dev_to_dev(pdev),
10235 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10236 adapter->msix_entries ? "MSI-X" :
10237 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10238 adapter->num_rx_queues, adapter->num_tx_queues);
10243 pm_runtime_put_noidle(&pdev->dev);
10247 // igb_release_hw_control(adapter);
10248 #ifdef HAVE_I2C_SUPPORT
10249 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10250 #endif /* HAVE_I2C_SUPPORT */
10252 // if (!e1000_check_reset_block(hw))
10253 // e1000_phy_hw_reset(hw);
10255 if (hw->flash_address)
10256 iounmap(hw->flash_address);
10258 // igb_clear_interrupt_scheme(adapter);
10259 // igb_reset_sriov_capability(adapter);
10260 iounmap(hw->hw_addr);
10262 free_netdev(netdev);
10263 err_alloc_etherdev:
10264 // pci_release_selected_regions(pdev,
10265 // pci_select_bars(pdev, IORESOURCE_MEM));
10268 pci_disable_device(pdev);
10273 void igb_kni_remove(struct pci_dev *pdev)
10275 pci_disable_device(pdev);