1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint16_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
130 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
131 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
135 #undef RTE_RX_OFFLOAD_BIT2STR
137 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
138 { DEV_TX_OFFLOAD_##_name, #_name }
140 static const struct {
143 } rte_tx_offload_names[] = {
144 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
145 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
152 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
153 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
158 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
159 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
160 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
161 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
168 #undef RTE_TX_OFFLOAD_BIT2STR
171 * The user application callback description.
173 * It contains callback address to be registered by user application,
174 * the pointer to the parameters for callback, and the event type.
176 struct rte_eth_dev_callback {
177 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
178 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
179 void *cb_arg; /**< Parameter for callback */
180 void *ret_param; /**< Return parameter */
181 enum rte_eth_event_type event; /**< Interrupt event type */
182 uint32_t active; /**< Callback is executing */
190 int __rte_experimental
191 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
194 struct rte_devargs devargs = {.args = NULL};
195 const char *bus_param_key;
196 char *bus_str = NULL;
197 char *cls_str = NULL;
200 memset(iter, 0, sizeof(*iter));
203 * The devargs string may use various syntaxes:
204 * - 0000:08:00.0,representor=[1-3]
205 * - pci:0000:06:00.0,representor=[0,5]
206 * - class=eth,mac=00:11:22:33:44:55
207 * A new syntax is in development (not yet supported):
208 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
212 * Handle pure class filter (i.e. without any bus-level argument),
213 * from future new syntax.
214 * rte_devargs_parse() is not yet supporting the new syntax,
215 * that's why this simple case is temporarily parsed here.
217 #define iter_anybus_str "class=eth,"
218 if (strncmp(devargs_str, iter_anybus_str,
219 strlen(iter_anybus_str)) == 0) {
220 iter->cls_str = devargs_str + strlen(iter_anybus_str);
224 /* Split bus, device and parameters. */
225 ret = rte_devargs_parse(&devargs, devargs_str);
230 * Assume parameters of old syntax can match only at ethdev level.
231 * Extra parameters will be ignored, thanks to "+" prefix.
233 str_size = strlen(devargs.args) + 2;
234 cls_str = malloc(str_size);
235 if (cls_str == NULL) {
239 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
240 if (ret != str_size - 1) {
244 iter->cls_str = cls_str;
245 free(devargs.args); /* allocated by rte_devargs_parse() */
248 iter->bus = devargs.bus;
249 if (iter->bus->dev_iterate == NULL) {
254 /* Convert bus args to new syntax for use with new API dev_iterate. */
255 if (strcmp(iter->bus->name, "vdev") == 0) {
256 bus_param_key = "name";
257 } else if (strcmp(iter->bus->name, "pci") == 0) {
258 bus_param_key = "addr";
263 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
264 bus_str = malloc(str_size);
265 if (bus_str == NULL) {
269 ret = snprintf(bus_str, str_size, "%s=%s",
270 bus_param_key, devargs.name);
271 if (ret != str_size - 1) {
275 iter->bus_str = bus_str;
278 iter->cls = rte_class_find_by_name("eth");
283 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 uint16_t __rte_experimental
292 rte_eth_iterator_next(struct rte_dev_iterator *iter)
294 if (iter->cls == NULL) /* invalid ethdev iterator */
295 return RTE_MAX_ETHPORTS;
297 do { /* loop to try all matching rte_device */
298 /* If not pure ethdev filter and */
299 if (iter->bus != NULL &&
300 /* not in middle of rte_eth_dev iteration, */
301 iter->class_device == NULL) {
302 /* get next rte_device to try. */
303 iter->device = iter->bus->dev_iterate(
304 iter->device, iter->bus_str, iter);
305 if (iter->device == NULL)
306 break; /* no more rte_device candidate */
308 /* A device is matching bus part, need to check ethdev part. */
309 iter->class_device = iter->cls->dev_iterate(
310 iter->class_device, iter->cls_str, iter);
311 if (iter->class_device != NULL)
312 return eth_dev_to_id(iter->class_device); /* match */
313 } while (iter->bus != NULL); /* need to try next rte_device */
315 /* No more ethdev port to iterate. */
316 rte_eth_iterator_cleanup(iter);
317 return RTE_MAX_ETHPORTS;
320 void __rte_experimental
321 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
323 if (iter->bus_str == NULL)
324 return; /* nothing to free in pure class filter */
325 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
326 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
327 memset(iter, 0, sizeof(*iter));
331 rte_eth_find_next(uint16_t port_id)
333 while (port_id < RTE_MAX_ETHPORTS &&
334 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
335 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
338 if (port_id >= RTE_MAX_ETHPORTS)
339 return RTE_MAX_ETHPORTS;
345 rte_eth_dev_shared_data_prepare(void)
347 const unsigned flags = 0;
348 const struct rte_memzone *mz;
350 rte_spinlock_lock(&rte_eth_shared_data_lock);
352 if (rte_eth_dev_shared_data == NULL) {
353 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
354 /* Allocate port data and ownership shared memory. */
355 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
356 sizeof(*rte_eth_dev_shared_data),
357 rte_socket_id(), flags);
359 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
361 rte_panic("Cannot allocate ethdev shared data\n");
363 rte_eth_dev_shared_data = mz->addr;
364 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
365 rte_eth_dev_shared_data->next_owner_id =
366 RTE_ETH_DEV_NO_OWNER + 1;
367 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
368 memset(rte_eth_dev_shared_data->data, 0,
369 sizeof(rte_eth_dev_shared_data->data));
373 rte_spinlock_unlock(&rte_eth_shared_data_lock);
377 is_allocated(const struct rte_eth_dev *ethdev)
379 return ethdev->data->name[0] != '\0';
382 static struct rte_eth_dev *
383 _rte_eth_dev_allocated(const char *name)
387 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
388 if (rte_eth_devices[i].data != NULL &&
389 strcmp(rte_eth_devices[i].data->name, name) == 0)
390 return &rte_eth_devices[i];
396 rte_eth_dev_allocated(const char *name)
398 struct rte_eth_dev *ethdev;
400 rte_eth_dev_shared_data_prepare();
402 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
404 ethdev = _rte_eth_dev_allocated(name);
406 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
412 rte_eth_dev_find_free_port(void)
416 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
417 /* Using shared name field to find a free port. */
418 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
419 RTE_ASSERT(rte_eth_devices[i].state ==
424 return RTE_MAX_ETHPORTS;
427 static struct rte_eth_dev *
428 eth_dev_get(uint16_t port_id)
430 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
432 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
434 eth_dev_last_created_port = port_id;
440 rte_eth_dev_allocate(const char *name)
443 struct rte_eth_dev *eth_dev = NULL;
445 rte_eth_dev_shared_data_prepare();
447 /* Synchronize port creation between primary and secondary threads. */
448 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
450 if (_rte_eth_dev_allocated(name) != NULL) {
452 "Ethernet device with name %s already allocated\n",
457 port_id = rte_eth_dev_find_free_port();
458 if (port_id == RTE_MAX_ETHPORTS) {
460 "Reached maximum number of Ethernet ports\n");
464 eth_dev = eth_dev_get(port_id);
465 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
466 eth_dev->data->port_id = port_id;
467 eth_dev->data->mtu = ETHER_MTU;
470 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
476 * Attach to a port already registered by the primary process, which
477 * makes sure that the same device would have the same port id both
478 * in the primary and secondary process.
481 rte_eth_dev_attach_secondary(const char *name)
484 struct rte_eth_dev *eth_dev = NULL;
486 rte_eth_dev_shared_data_prepare();
488 /* Synchronize port attachment to primary port creation and release. */
489 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
491 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
492 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
495 if (i == RTE_MAX_ETHPORTS) {
497 "Device %s is not driven by the primary process\n",
500 eth_dev = eth_dev_get(i);
501 RTE_ASSERT(eth_dev->data->port_id == i);
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
509 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
514 rte_eth_dev_shared_data_prepare();
516 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
518 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
520 eth_dev->state = RTE_ETH_DEV_UNUSED;
522 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
523 rte_free(eth_dev->data->rx_queues);
524 rte_free(eth_dev->data->tx_queues);
525 rte_free(eth_dev->data->mac_addrs);
526 rte_free(eth_dev->data->hash_mac_addrs);
527 rte_free(eth_dev->data->dev_private);
528 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
531 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
537 rte_eth_dev_is_valid_port(uint16_t port_id)
539 if (port_id >= RTE_MAX_ETHPORTS ||
540 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
547 rte_eth_is_valid_owner_id(uint64_t owner_id)
549 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
550 rte_eth_dev_shared_data->next_owner_id <= owner_id)
556 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
558 while (port_id < RTE_MAX_ETHPORTS &&
559 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
560 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
561 rte_eth_devices[port_id].data->owner.id != owner_id))
564 if (port_id >= RTE_MAX_ETHPORTS)
565 return RTE_MAX_ETHPORTS;
570 int __rte_experimental
571 rte_eth_dev_owner_new(uint64_t *owner_id)
573 rte_eth_dev_shared_data_prepare();
575 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
577 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
579 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
584 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
585 const struct rte_eth_dev_owner *new_owner)
587 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
588 struct rte_eth_dev_owner *port_owner;
591 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
592 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
597 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
598 !rte_eth_is_valid_owner_id(old_owner_id)) {
600 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
601 old_owner_id, new_owner->id);
605 port_owner = &rte_eth_devices[port_id].data->owner;
606 if (port_owner->id != old_owner_id) {
608 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
609 port_id, port_owner->name, port_owner->id);
613 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
615 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
616 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
619 port_owner->id = new_owner->id;
621 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
622 port_id, new_owner->name, new_owner->id);
627 int __rte_experimental
628 rte_eth_dev_owner_set(const uint16_t port_id,
629 const struct rte_eth_dev_owner *owner)
633 rte_eth_dev_shared_data_prepare();
635 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
637 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
639 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
643 int __rte_experimental
644 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
646 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
647 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
650 rte_eth_dev_shared_data_prepare();
652 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
654 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
656 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
660 void __rte_experimental
661 rte_eth_dev_owner_delete(const uint64_t owner_id)
665 rte_eth_dev_shared_data_prepare();
667 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
669 if (rte_eth_is_valid_owner_id(owner_id)) {
670 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
671 if (rte_eth_devices[port_id].data->owner.id == owner_id)
672 memset(&rte_eth_devices[port_id].data->owner, 0,
673 sizeof(struct rte_eth_dev_owner));
674 RTE_ETHDEV_LOG(NOTICE,
675 "All port owners owned by %016"PRIx64" identifier have removed\n",
679 "Invalid owner id=%016"PRIx64"\n",
683 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
686 int __rte_experimental
687 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
690 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
692 rte_eth_dev_shared_data_prepare();
694 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
696 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
697 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
701 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
704 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
709 rte_eth_dev_socket_id(uint16_t port_id)
711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
712 return rte_eth_devices[port_id].data->numa_node;
716 rte_eth_dev_get_sec_ctx(uint16_t port_id)
718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
719 return rte_eth_devices[port_id].security_ctx;
723 rte_eth_dev_count(void)
725 return rte_eth_dev_count_avail();
729 rte_eth_dev_count_avail(void)
736 RTE_ETH_FOREACH_DEV(p)
742 uint16_t __rte_experimental
743 rte_eth_dev_count_total(void)
745 uint16_t port, count = 0;
747 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
748 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
755 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
762 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
766 /* shouldn't check 'rte_eth_devices[i].data',
767 * because it might be overwritten by VDEV PMD */
768 tmp = rte_eth_dev_shared_data->data[port_id].name;
774 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
779 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
783 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
784 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
785 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
795 eth_err(uint16_t port_id, int ret)
799 if (rte_eth_dev_is_removed(port_id))
804 /* attach the new device, then store port_id of the device */
806 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
808 int current = rte_eth_dev_count_total();
809 struct rte_devargs da;
812 memset(&da, 0, sizeof(da));
814 if ((devargs == NULL) || (port_id == NULL)) {
820 if (rte_devargs_parse(&da, devargs))
823 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
827 /* no point looking at the port count if no port exists */
828 if (!rte_eth_dev_count_total()) {
829 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
834 /* if nothing happened, there is a bug here, since some driver told us
835 * it did attach a device, but did not create a port.
836 * FIXME: race condition in case of plug-out of another device
838 if (current == rte_eth_dev_count_total()) {
843 *port_id = eth_dev_last_created_port;
851 /* detach the device, then store the name of the device */
853 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
855 struct rte_device *dev;
860 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
862 dev_flags = rte_eth_devices[port_id].data->dev_flags;
863 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
865 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
869 dev = rte_eth_devices[port_id].device;
873 bus = rte_bus_find_by_device(dev);
877 ret = rte_eal_hotplug_remove(bus->name, dev->name);
881 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
886 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
888 uint16_t old_nb_queues = dev->data->nb_rx_queues;
892 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
893 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
894 sizeof(dev->data->rx_queues[0]) * nb_queues,
895 RTE_CACHE_LINE_SIZE);
896 if (dev->data->rx_queues == NULL) {
897 dev->data->nb_rx_queues = 0;
900 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
903 rxq = dev->data->rx_queues;
905 for (i = nb_queues; i < old_nb_queues; i++)
906 (*dev->dev_ops->rx_queue_release)(rxq[i]);
907 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
908 RTE_CACHE_LINE_SIZE);
911 if (nb_queues > old_nb_queues) {
912 uint16_t new_qs = nb_queues - old_nb_queues;
914 memset(rxq + old_nb_queues, 0,
915 sizeof(rxq[0]) * new_qs);
918 dev->data->rx_queues = rxq;
920 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
923 rxq = dev->data->rx_queues;
925 for (i = nb_queues; i < old_nb_queues; i++)
926 (*dev->dev_ops->rx_queue_release)(rxq[i]);
928 rte_free(dev->data->rx_queues);
929 dev->data->rx_queues = NULL;
931 dev->data->nb_rx_queues = nb_queues;
936 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
938 struct rte_eth_dev *dev;
940 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
942 dev = &rte_eth_devices[port_id];
943 if (!dev->data->dev_started) {
945 "Port %u must be started before start any queue\n",
950 if (rx_queue_id >= dev->data->nb_rx_queues) {
951 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
955 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
957 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
959 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
960 rx_queue_id, port_id);
964 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
970 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
972 struct rte_eth_dev *dev;
974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
976 dev = &rte_eth_devices[port_id];
977 if (rx_queue_id >= dev->data->nb_rx_queues) {
978 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
984 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
986 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
987 rx_queue_id, port_id);
991 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
996 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
998 struct rte_eth_dev *dev;
1000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1002 dev = &rte_eth_devices[port_id];
1003 if (!dev->data->dev_started) {
1005 "Port %u must be started before start any queue\n",
1010 if (tx_queue_id >= dev->data->nb_tx_queues) {
1011 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1017 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1018 RTE_ETHDEV_LOG(INFO,
1019 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1020 tx_queue_id, port_id);
1024 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1028 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1030 struct rte_eth_dev *dev;
1032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1034 dev = &rte_eth_devices[port_id];
1035 if (tx_queue_id >= dev->data->nb_tx_queues) {
1036 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1042 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1043 RTE_ETHDEV_LOG(INFO,
1044 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1045 tx_queue_id, port_id);
1049 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1054 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1056 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1060 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1061 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1062 sizeof(dev->data->tx_queues[0]) * nb_queues,
1063 RTE_CACHE_LINE_SIZE);
1064 if (dev->data->tx_queues == NULL) {
1065 dev->data->nb_tx_queues = 0;
1068 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1069 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1071 txq = dev->data->tx_queues;
1073 for (i = nb_queues; i < old_nb_queues; i++)
1074 (*dev->dev_ops->tx_queue_release)(txq[i]);
1075 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1076 RTE_CACHE_LINE_SIZE);
1079 if (nb_queues > old_nb_queues) {
1080 uint16_t new_qs = nb_queues - old_nb_queues;
1082 memset(txq + old_nb_queues, 0,
1083 sizeof(txq[0]) * new_qs);
1086 dev->data->tx_queues = txq;
1088 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1089 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1091 txq = dev->data->tx_queues;
1093 for (i = nb_queues; i < old_nb_queues; i++)
1094 (*dev->dev_ops->tx_queue_release)(txq[i]);
1096 rte_free(dev->data->tx_queues);
1097 dev->data->tx_queues = NULL;
1099 dev->data->nb_tx_queues = nb_queues;
1104 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1107 case ETH_SPEED_NUM_10M:
1108 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1109 case ETH_SPEED_NUM_100M:
1110 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1111 case ETH_SPEED_NUM_1G:
1112 return ETH_LINK_SPEED_1G;
1113 case ETH_SPEED_NUM_2_5G:
1114 return ETH_LINK_SPEED_2_5G;
1115 case ETH_SPEED_NUM_5G:
1116 return ETH_LINK_SPEED_5G;
1117 case ETH_SPEED_NUM_10G:
1118 return ETH_LINK_SPEED_10G;
1119 case ETH_SPEED_NUM_20G:
1120 return ETH_LINK_SPEED_20G;
1121 case ETH_SPEED_NUM_25G:
1122 return ETH_LINK_SPEED_25G;
1123 case ETH_SPEED_NUM_40G:
1124 return ETH_LINK_SPEED_40G;
1125 case ETH_SPEED_NUM_50G:
1126 return ETH_LINK_SPEED_50G;
1127 case ETH_SPEED_NUM_56G:
1128 return ETH_LINK_SPEED_56G;
1129 case ETH_SPEED_NUM_100G:
1130 return ETH_LINK_SPEED_100G;
1136 const char * __rte_experimental
1137 rte_eth_dev_rx_offload_name(uint64_t offload)
1139 const char *name = "UNKNOWN";
1142 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1143 if (offload == rte_rx_offload_names[i].offload) {
1144 name = rte_rx_offload_names[i].name;
1152 const char * __rte_experimental
1153 rte_eth_dev_tx_offload_name(uint64_t offload)
1155 const char *name = "UNKNOWN";
1158 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1159 if (offload == rte_tx_offload_names[i].offload) {
1160 name = rte_tx_offload_names[i].name;
1169 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1170 const struct rte_eth_conf *dev_conf)
1172 struct rte_eth_dev *dev;
1173 struct rte_eth_dev_info dev_info;
1174 struct rte_eth_conf local_conf = *dev_conf;
1177 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1179 dev = &rte_eth_devices[port_id];
1181 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1184 rte_eth_dev_info_get(port_id, &dev_info);
1186 /* If number of queues specified by application for both Rx and Tx is
1187 * zero, use driver preferred values. This cannot be done individually
1188 * as it is valid for either Tx or Rx (but not both) to be zero.
1189 * If driver does not provide any preferred valued, fall back on
1192 if (nb_rx_q == 0 && nb_tx_q == 0) {
1193 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1195 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1196 nb_tx_q = dev_info.default_txportconf.nb_queues;
1198 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1201 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1203 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1204 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1208 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1210 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1211 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1215 if (dev->data->dev_started) {
1217 "Port %u must be stopped to allow configuration\n",
1222 /* Copy the dev_conf parameter into the dev structure */
1223 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1226 * Check that the numbers of RX and TX queues are not greater
1227 * than the maximum number of RX and TX queues supported by the
1228 * configured device.
1230 if (nb_rx_q > dev_info.max_rx_queues) {
1231 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1232 port_id, nb_rx_q, dev_info.max_rx_queues);
1236 if (nb_tx_q > dev_info.max_tx_queues) {
1237 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1238 port_id, nb_tx_q, dev_info.max_tx_queues);
1242 /* Check that the device supports requested interrupts */
1243 if ((dev_conf->intr_conf.lsc == 1) &&
1244 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1245 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1246 dev->device->driver->name);
1249 if ((dev_conf->intr_conf.rmv == 1) &&
1250 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1251 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1252 dev->device->driver->name);
1257 * If jumbo frames are enabled, check that the maximum RX packet
1258 * length is supported by the configured device.
1260 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1261 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1263 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1264 port_id, dev_conf->rxmode.max_rx_pkt_len,
1265 dev_info.max_rx_pktlen);
1267 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1269 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1270 port_id, dev_conf->rxmode.max_rx_pkt_len,
1271 (unsigned)ETHER_MIN_LEN);
1275 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1276 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1277 /* Use default value */
1278 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1282 /* Any requested offloading must be within its device capabilities */
1283 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1284 local_conf.rxmode.offloads) {
1286 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1287 "capabilities 0x%"PRIx64" in %s()\n",
1288 port_id, local_conf.rxmode.offloads,
1289 dev_info.rx_offload_capa,
1293 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1294 local_conf.txmode.offloads) {
1296 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1297 "capabilities 0x%"PRIx64" in %s()\n",
1298 port_id, local_conf.txmode.offloads,
1299 dev_info.tx_offload_capa,
1304 /* Check that device supports requested rss hash functions. */
1305 if ((dev_info.flow_type_rss_offloads |
1306 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1307 dev_info.flow_type_rss_offloads) {
1309 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1310 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1311 dev_info.flow_type_rss_offloads);
1316 * Setup new number of RX/TX queues and reconfigure device.
1318 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1321 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1326 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1329 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1331 rte_eth_dev_rx_queue_config(dev, 0);
1335 diag = (*dev->dev_ops->dev_configure)(dev);
1337 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1339 rte_eth_dev_rx_queue_config(dev, 0);
1340 rte_eth_dev_tx_queue_config(dev, 0);
1341 return eth_err(port_id, diag);
1344 /* Initialize Rx profiling if enabled at compilation time. */
1345 diag = __rte_eth_dev_profile_init(port_id, dev);
1347 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1349 rte_eth_dev_rx_queue_config(dev, 0);
1350 rte_eth_dev_tx_queue_config(dev, 0);
1351 return eth_err(port_id, diag);
1358 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1360 if (dev->data->dev_started) {
1361 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1362 dev->data->port_id);
1366 rte_eth_dev_rx_queue_config(dev, 0);
1367 rte_eth_dev_tx_queue_config(dev, 0);
1369 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1373 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1374 struct rte_eth_dev_info *dev_info)
1376 struct ether_addr *addr;
1381 /* replay MAC address configuration including default MAC */
1382 addr = &dev->data->mac_addrs[0];
1383 if (*dev->dev_ops->mac_addr_set != NULL)
1384 (*dev->dev_ops->mac_addr_set)(dev, addr);
1385 else if (*dev->dev_ops->mac_addr_add != NULL)
1386 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1388 if (*dev->dev_ops->mac_addr_add != NULL) {
1389 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1390 addr = &dev->data->mac_addrs[i];
1392 /* skip zero address */
1393 if (is_zero_ether_addr(addr))
1397 pool_mask = dev->data->mac_pool_sel[i];
1400 if (pool_mask & 1ULL)
1401 (*dev->dev_ops->mac_addr_add)(dev,
1405 } while (pool_mask);
1411 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1412 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1414 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1415 rte_eth_dev_mac_restore(dev, dev_info);
1417 /* replay promiscuous configuration */
1418 if (rte_eth_promiscuous_get(port_id) == 1)
1419 rte_eth_promiscuous_enable(port_id);
1420 else if (rte_eth_promiscuous_get(port_id) == 0)
1421 rte_eth_promiscuous_disable(port_id);
1423 /* replay all multicast configuration */
1424 if (rte_eth_allmulticast_get(port_id) == 1)
1425 rte_eth_allmulticast_enable(port_id);
1426 else if (rte_eth_allmulticast_get(port_id) == 0)
1427 rte_eth_allmulticast_disable(port_id);
1431 rte_eth_dev_start(uint16_t port_id)
1433 struct rte_eth_dev *dev;
1434 struct rte_eth_dev_info dev_info;
1437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1439 dev = &rte_eth_devices[port_id];
1441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1443 if (dev->data->dev_started != 0) {
1444 RTE_ETHDEV_LOG(INFO,
1445 "Device with port_id=%"PRIu16" already started\n",
1450 rte_eth_dev_info_get(port_id, &dev_info);
1452 /* Lets restore MAC now if device does not support live change */
1453 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1454 rte_eth_dev_mac_restore(dev, &dev_info);
1456 diag = (*dev->dev_ops->dev_start)(dev);
1458 dev->data->dev_started = 1;
1460 return eth_err(port_id, diag);
1462 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1464 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1466 (*dev->dev_ops->link_update)(dev, 0);
1472 rte_eth_dev_stop(uint16_t port_id)
1474 struct rte_eth_dev *dev;
1476 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1477 dev = &rte_eth_devices[port_id];
1479 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1481 if (dev->data->dev_started == 0) {
1482 RTE_ETHDEV_LOG(INFO,
1483 "Device with port_id=%"PRIu16" already stopped\n",
1488 dev->data->dev_started = 0;
1489 (*dev->dev_ops->dev_stop)(dev);
1493 rte_eth_dev_set_link_up(uint16_t port_id)
1495 struct rte_eth_dev *dev;
1497 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1499 dev = &rte_eth_devices[port_id];
1501 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1502 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1506 rte_eth_dev_set_link_down(uint16_t port_id)
1508 struct rte_eth_dev *dev;
1510 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1512 dev = &rte_eth_devices[port_id];
1514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1515 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1519 rte_eth_dev_close(uint16_t port_id)
1521 struct rte_eth_dev *dev;
1523 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1524 dev = &rte_eth_devices[port_id];
1526 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1527 dev->data->dev_started = 0;
1528 (*dev->dev_ops->dev_close)(dev);
1530 /* check behaviour flag - temporary for PMD migration */
1531 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1532 /* new behaviour: send event + reset state + free all data */
1533 rte_eth_dev_release_port(dev);
1536 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1537 "The driver %s should migrate to the new behaviour.\n",
1538 dev->device->driver->name);
1539 /* old behaviour: only free queue arrays */
1540 dev->data->nb_rx_queues = 0;
1541 rte_free(dev->data->rx_queues);
1542 dev->data->rx_queues = NULL;
1543 dev->data->nb_tx_queues = 0;
1544 rte_free(dev->data->tx_queues);
1545 dev->data->tx_queues = NULL;
1549 rte_eth_dev_reset(uint16_t port_id)
1551 struct rte_eth_dev *dev;
1554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1555 dev = &rte_eth_devices[port_id];
1557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1559 rte_eth_dev_stop(port_id);
1560 ret = dev->dev_ops->dev_reset(dev);
1562 return eth_err(port_id, ret);
1565 int __rte_experimental
1566 rte_eth_dev_is_removed(uint16_t port_id)
1568 struct rte_eth_dev *dev;
1571 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1573 dev = &rte_eth_devices[port_id];
1575 if (dev->state == RTE_ETH_DEV_REMOVED)
1578 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1580 ret = dev->dev_ops->is_removed(dev);
1582 /* Device is physically removed. */
1583 dev->state = RTE_ETH_DEV_REMOVED;
1589 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1590 uint16_t nb_rx_desc, unsigned int socket_id,
1591 const struct rte_eth_rxconf *rx_conf,
1592 struct rte_mempool *mp)
1595 uint32_t mbp_buf_size;
1596 struct rte_eth_dev *dev;
1597 struct rte_eth_dev_info dev_info;
1598 struct rte_eth_rxconf local_conf;
1601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1603 dev = &rte_eth_devices[port_id];
1604 if (rx_queue_id >= dev->data->nb_rx_queues) {
1605 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1613 * Check the size of the mbuf data buffer.
1614 * This value must be provided in the private data of the memory pool.
1615 * First check that the memory pool has a valid private data.
1617 rte_eth_dev_info_get(port_id, &dev_info);
1618 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1619 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1620 mp->name, (int)mp->private_data_size,
1621 (int)sizeof(struct rte_pktmbuf_pool_private));
1624 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1626 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1628 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1629 mp->name, (int)mbp_buf_size,
1630 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1631 (int)RTE_PKTMBUF_HEADROOM,
1632 (int)dev_info.min_rx_bufsize);
1636 /* Use default specified by driver, if nb_rx_desc is zero */
1637 if (nb_rx_desc == 0) {
1638 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1639 /* If driver default is also zero, fall back on EAL default */
1640 if (nb_rx_desc == 0)
1641 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1644 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1645 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1646 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1649 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1650 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1651 dev_info.rx_desc_lim.nb_min,
1652 dev_info.rx_desc_lim.nb_align);
1656 if (dev->data->dev_started &&
1657 !(dev_info.dev_capa &
1658 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1661 if (dev->data->dev_started &&
1662 (dev->data->rx_queue_state[rx_queue_id] !=
1663 RTE_ETH_QUEUE_STATE_STOPPED))
1666 rxq = dev->data->rx_queues;
1667 if (rxq[rx_queue_id]) {
1668 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1670 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1671 rxq[rx_queue_id] = NULL;
1674 if (rx_conf == NULL)
1675 rx_conf = &dev_info.default_rxconf;
1677 local_conf = *rx_conf;
1680 * If an offloading has already been enabled in
1681 * rte_eth_dev_configure(), it has been enabled on all queues,
1682 * so there is no need to enable it in this queue again.
1683 * The local_conf.offloads input to underlying PMD only carries
1684 * those offloadings which are only enabled on this queue and
1685 * not enabled on all queues.
1687 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1690 * New added offloadings for this queue are those not enabled in
1691 * rte_eth_dev_configure() and they must be per-queue type.
1692 * A pure per-port offloading can't be enabled on a queue while
1693 * disabled on another queue. A pure per-port offloading can't
1694 * be enabled for any queue as new added one if it hasn't been
1695 * enabled in rte_eth_dev_configure().
1697 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1698 local_conf.offloads) {
1700 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1701 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1702 port_id, rx_queue_id, local_conf.offloads,
1703 dev_info.rx_queue_offload_capa,
1708 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1709 socket_id, &local_conf, mp);
1711 if (!dev->data->min_rx_buf_size ||
1712 dev->data->min_rx_buf_size > mbp_buf_size)
1713 dev->data->min_rx_buf_size = mbp_buf_size;
1716 return eth_err(port_id, ret);
1720 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1721 uint16_t nb_tx_desc, unsigned int socket_id,
1722 const struct rte_eth_txconf *tx_conf)
1724 struct rte_eth_dev *dev;
1725 struct rte_eth_dev_info dev_info;
1726 struct rte_eth_txconf local_conf;
1729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1731 dev = &rte_eth_devices[port_id];
1732 if (tx_queue_id >= dev->data->nb_tx_queues) {
1733 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1738 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1740 rte_eth_dev_info_get(port_id, &dev_info);
1742 /* Use default specified by driver, if nb_tx_desc is zero */
1743 if (nb_tx_desc == 0) {
1744 nb_tx_desc = dev_info.default_txportconf.ring_size;
1745 /* If driver default is zero, fall back on EAL default */
1746 if (nb_tx_desc == 0)
1747 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1749 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1750 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1751 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1753 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1754 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1755 dev_info.tx_desc_lim.nb_min,
1756 dev_info.tx_desc_lim.nb_align);
1760 if (dev->data->dev_started &&
1761 !(dev_info.dev_capa &
1762 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1765 if (dev->data->dev_started &&
1766 (dev->data->tx_queue_state[tx_queue_id] !=
1767 RTE_ETH_QUEUE_STATE_STOPPED))
1770 txq = dev->data->tx_queues;
1771 if (txq[tx_queue_id]) {
1772 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1774 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1775 txq[tx_queue_id] = NULL;
1778 if (tx_conf == NULL)
1779 tx_conf = &dev_info.default_txconf;
1781 local_conf = *tx_conf;
1784 * If an offloading has already been enabled in
1785 * rte_eth_dev_configure(), it has been enabled on all queues,
1786 * so there is no need to enable it in this queue again.
1787 * The local_conf.offloads input to underlying PMD only carries
1788 * those offloadings which are only enabled on this queue and
1789 * not enabled on all queues.
1791 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1794 * New added offloadings for this queue are those not enabled in
1795 * rte_eth_dev_configure() and they must be per-queue type.
1796 * A pure per-port offloading can't be enabled on a queue while
1797 * disabled on another queue. A pure per-port offloading can't
1798 * be enabled for any queue as new added one if it hasn't been
1799 * enabled in rte_eth_dev_configure().
1801 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1802 local_conf.offloads) {
1804 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1805 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1806 port_id, tx_queue_id, local_conf.offloads,
1807 dev_info.tx_queue_offload_capa,
1812 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1813 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1817 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1818 void *userdata __rte_unused)
1822 for (i = 0; i < unsent; i++)
1823 rte_pktmbuf_free(pkts[i]);
1827 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1830 uint64_t *count = userdata;
1833 for (i = 0; i < unsent; i++)
1834 rte_pktmbuf_free(pkts[i]);
1840 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1841 buffer_tx_error_fn cbfn, void *userdata)
1843 buffer->error_callback = cbfn;
1844 buffer->error_userdata = userdata;
1849 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1856 buffer->size = size;
1857 if (buffer->error_callback == NULL) {
1858 ret = rte_eth_tx_buffer_set_err_callback(
1859 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1866 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1868 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1871 /* Validate Input Data. Bail if not valid or not supported. */
1872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1873 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1875 /* Call driver to free pending mbufs. */
1876 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1878 return eth_err(port_id, ret);
1882 rte_eth_promiscuous_enable(uint16_t port_id)
1884 struct rte_eth_dev *dev;
1886 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1887 dev = &rte_eth_devices[port_id];
1889 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1890 (*dev->dev_ops->promiscuous_enable)(dev);
1891 dev->data->promiscuous = 1;
1895 rte_eth_promiscuous_disable(uint16_t port_id)
1897 struct rte_eth_dev *dev;
1899 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1900 dev = &rte_eth_devices[port_id];
1902 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1903 dev->data->promiscuous = 0;
1904 (*dev->dev_ops->promiscuous_disable)(dev);
1908 rte_eth_promiscuous_get(uint16_t port_id)
1910 struct rte_eth_dev *dev;
1912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1914 dev = &rte_eth_devices[port_id];
1915 return dev->data->promiscuous;
1919 rte_eth_allmulticast_enable(uint16_t port_id)
1921 struct rte_eth_dev *dev;
1923 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1924 dev = &rte_eth_devices[port_id];
1926 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1927 (*dev->dev_ops->allmulticast_enable)(dev);
1928 dev->data->all_multicast = 1;
1932 rte_eth_allmulticast_disable(uint16_t port_id)
1934 struct rte_eth_dev *dev;
1936 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1937 dev = &rte_eth_devices[port_id];
1939 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1940 dev->data->all_multicast = 0;
1941 (*dev->dev_ops->allmulticast_disable)(dev);
1945 rte_eth_allmulticast_get(uint16_t port_id)
1947 struct rte_eth_dev *dev;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1951 dev = &rte_eth_devices[port_id];
1952 return dev->data->all_multicast;
1956 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1958 struct rte_eth_dev *dev;
1960 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1961 dev = &rte_eth_devices[port_id];
1963 if (dev->data->dev_conf.intr_conf.lsc &&
1964 dev->data->dev_started)
1965 rte_eth_linkstatus_get(dev, eth_link);
1967 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1968 (*dev->dev_ops->link_update)(dev, 1);
1969 *eth_link = dev->data->dev_link;
1974 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1976 struct rte_eth_dev *dev;
1978 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1979 dev = &rte_eth_devices[port_id];
1981 if (dev->data->dev_conf.intr_conf.lsc &&
1982 dev->data->dev_started)
1983 rte_eth_linkstatus_get(dev, eth_link);
1985 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1986 (*dev->dev_ops->link_update)(dev, 0);
1987 *eth_link = dev->data->dev_link;
1992 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1994 struct rte_eth_dev *dev;
1996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1998 dev = &rte_eth_devices[port_id];
1999 memset(stats, 0, sizeof(*stats));
2001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2002 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2003 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2007 rte_eth_stats_reset(uint16_t port_id)
2009 struct rte_eth_dev *dev;
2011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2012 dev = &rte_eth_devices[port_id];
2014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2015 (*dev->dev_ops->stats_reset)(dev);
2016 dev->data->rx_mbuf_alloc_failed = 0;
2022 get_xstats_basic_count(struct rte_eth_dev *dev)
2024 uint16_t nb_rxqs, nb_txqs;
2027 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2028 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2030 count = RTE_NB_STATS;
2031 count += nb_rxqs * RTE_NB_RXQ_STATS;
2032 count += nb_txqs * RTE_NB_TXQ_STATS;
2038 get_xstats_count(uint16_t port_id)
2040 struct rte_eth_dev *dev;
2043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2044 dev = &rte_eth_devices[port_id];
2045 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2046 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2049 return eth_err(port_id, count);
2051 if (dev->dev_ops->xstats_get_names != NULL) {
2052 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2054 return eth_err(port_id, count);
2059 count += get_xstats_basic_count(dev);
2065 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2068 int cnt_xstats, idx_xstat;
2070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2073 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2078 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2083 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2084 if (cnt_xstats < 0) {
2085 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2089 /* Get id-name lookup table */
2090 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2092 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2093 port_id, xstats_names, cnt_xstats, NULL)) {
2094 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2098 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2099 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2108 /* retrieve basic stats names */
2110 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2111 struct rte_eth_xstat_name *xstats_names)
2113 int cnt_used_entries = 0;
2114 uint32_t idx, id_queue;
2117 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2118 snprintf(xstats_names[cnt_used_entries].name,
2119 sizeof(xstats_names[0].name),
2120 "%s", rte_stats_strings[idx].name);
2123 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2124 for (id_queue = 0; id_queue < num_q; id_queue++) {
2125 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2126 snprintf(xstats_names[cnt_used_entries].name,
2127 sizeof(xstats_names[0].name),
2129 id_queue, rte_rxq_stats_strings[idx].name);
2134 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2135 for (id_queue = 0; id_queue < num_q; id_queue++) {
2136 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2137 snprintf(xstats_names[cnt_used_entries].name,
2138 sizeof(xstats_names[0].name),
2140 id_queue, rte_txq_stats_strings[idx].name);
2144 return cnt_used_entries;
2147 /* retrieve ethdev extended statistics names */
2149 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2150 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2153 struct rte_eth_xstat_name *xstats_names_copy;
2154 unsigned int no_basic_stat_requested = 1;
2155 unsigned int no_ext_stat_requested = 1;
2156 unsigned int expected_entries;
2157 unsigned int basic_count;
2158 struct rte_eth_dev *dev;
2162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2163 dev = &rte_eth_devices[port_id];
2165 basic_count = get_xstats_basic_count(dev);
2166 ret = get_xstats_count(port_id);
2169 expected_entries = (unsigned int)ret;
2171 /* Return max number of stats if no ids given */
2174 return expected_entries;
2175 else if (xstats_names && size < expected_entries)
2176 return expected_entries;
2179 if (ids && !xstats_names)
2182 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2183 uint64_t ids_copy[size];
2185 for (i = 0; i < size; i++) {
2186 if (ids[i] < basic_count) {
2187 no_basic_stat_requested = 0;
2192 * Convert ids to xstats ids that PMD knows.
2193 * ids known by user are basic + extended stats.
2195 ids_copy[i] = ids[i] - basic_count;
2198 if (no_basic_stat_requested)
2199 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2200 xstats_names, ids_copy, size);
2203 /* Retrieve all stats */
2205 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2207 if (num_stats < 0 || num_stats > (int)expected_entries)
2210 return expected_entries;
2213 xstats_names_copy = calloc(expected_entries,
2214 sizeof(struct rte_eth_xstat_name));
2216 if (!xstats_names_copy) {
2217 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2222 for (i = 0; i < size; i++) {
2223 if (ids[i] >= basic_count) {
2224 no_ext_stat_requested = 0;
2230 /* Fill xstats_names_copy structure */
2231 if (ids && no_ext_stat_requested) {
2232 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2234 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2237 free(xstats_names_copy);
2243 for (i = 0; i < size; i++) {
2244 if (ids[i] >= expected_entries) {
2245 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2246 free(xstats_names_copy);
2249 xstats_names[i] = xstats_names_copy[ids[i]];
2252 free(xstats_names_copy);
2257 rte_eth_xstats_get_names(uint16_t port_id,
2258 struct rte_eth_xstat_name *xstats_names,
2261 struct rte_eth_dev *dev;
2262 int cnt_used_entries;
2263 int cnt_expected_entries;
2264 int cnt_driver_entries;
2266 cnt_expected_entries = get_xstats_count(port_id);
2267 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2268 (int)size < cnt_expected_entries)
2269 return cnt_expected_entries;
2271 /* port_id checked in get_xstats_count() */
2272 dev = &rte_eth_devices[port_id];
2274 cnt_used_entries = rte_eth_basic_stats_get_names(
2277 if (dev->dev_ops->xstats_get_names != NULL) {
2278 /* If there are any driver-specific xstats, append them
2281 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2283 xstats_names + cnt_used_entries,
2284 size - cnt_used_entries);
2285 if (cnt_driver_entries < 0)
2286 return eth_err(port_id, cnt_driver_entries);
2287 cnt_used_entries += cnt_driver_entries;
2290 return cnt_used_entries;
2295 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2297 struct rte_eth_dev *dev;
2298 struct rte_eth_stats eth_stats;
2299 unsigned int count = 0, i, q;
2300 uint64_t val, *stats_ptr;
2301 uint16_t nb_rxqs, nb_txqs;
2304 ret = rte_eth_stats_get(port_id, ð_stats);
2308 dev = &rte_eth_devices[port_id];
2310 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2311 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2314 for (i = 0; i < RTE_NB_STATS; i++) {
2315 stats_ptr = RTE_PTR_ADD(ð_stats,
2316 rte_stats_strings[i].offset);
2318 xstats[count++].value = val;
2322 for (q = 0; q < nb_rxqs; q++) {
2323 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2324 stats_ptr = RTE_PTR_ADD(ð_stats,
2325 rte_rxq_stats_strings[i].offset +
2326 q * sizeof(uint64_t));
2328 xstats[count++].value = val;
2333 for (q = 0; q < nb_txqs; q++) {
2334 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2335 stats_ptr = RTE_PTR_ADD(ð_stats,
2336 rte_txq_stats_strings[i].offset +
2337 q * sizeof(uint64_t));
2339 xstats[count++].value = val;
2345 /* retrieve ethdev extended statistics */
2347 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2348 uint64_t *values, unsigned int size)
2350 unsigned int no_basic_stat_requested = 1;
2351 unsigned int no_ext_stat_requested = 1;
2352 unsigned int num_xstats_filled;
2353 unsigned int basic_count;
2354 uint16_t expected_entries;
2355 struct rte_eth_dev *dev;
2359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2360 ret = get_xstats_count(port_id);
2363 expected_entries = (uint16_t)ret;
2364 struct rte_eth_xstat xstats[expected_entries];
2365 dev = &rte_eth_devices[port_id];
2366 basic_count = get_xstats_basic_count(dev);
2368 /* Return max number of stats if no ids given */
2371 return expected_entries;
2372 else if (values && size < expected_entries)
2373 return expected_entries;
2379 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2380 unsigned int basic_count = get_xstats_basic_count(dev);
2381 uint64_t ids_copy[size];
2383 for (i = 0; i < size; i++) {
2384 if (ids[i] < basic_count) {
2385 no_basic_stat_requested = 0;
2390 * Convert ids to xstats ids that PMD knows.
2391 * ids known by user are basic + extended stats.
2393 ids_copy[i] = ids[i] - basic_count;
2396 if (no_basic_stat_requested)
2397 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2402 for (i = 0; i < size; i++) {
2403 if (ids[i] >= basic_count) {
2404 no_ext_stat_requested = 0;
2410 /* Fill the xstats structure */
2411 if (ids && no_ext_stat_requested)
2412 ret = rte_eth_basic_stats_get(port_id, xstats);
2414 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2418 num_xstats_filled = (unsigned int)ret;
2420 /* Return all stats */
2422 for (i = 0; i < num_xstats_filled; i++)
2423 values[i] = xstats[i].value;
2424 return expected_entries;
2428 for (i = 0; i < size; i++) {
2429 if (ids[i] >= expected_entries) {
2430 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2433 values[i] = xstats[ids[i]].value;
2439 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2442 struct rte_eth_dev *dev;
2443 unsigned int count = 0, i;
2444 signed int xcount = 0;
2445 uint16_t nb_rxqs, nb_txqs;
2448 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2450 dev = &rte_eth_devices[port_id];
2452 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2453 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2455 /* Return generic statistics */
2456 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2457 (nb_txqs * RTE_NB_TXQ_STATS);
2459 /* implemented by the driver */
2460 if (dev->dev_ops->xstats_get != NULL) {
2461 /* Retrieve the xstats from the driver at the end of the
2464 xcount = (*dev->dev_ops->xstats_get)(dev,
2465 xstats ? xstats + count : NULL,
2466 (n > count) ? n - count : 0);
2469 return eth_err(port_id, xcount);
2472 if (n < count + xcount || xstats == NULL)
2473 return count + xcount;
2475 /* now fill the xstats structure */
2476 ret = rte_eth_basic_stats_get(port_id, xstats);
2481 for (i = 0; i < count; i++)
2483 /* add an offset to driver-specific stats */
2484 for ( ; i < count + xcount; i++)
2485 xstats[i].id += count;
2487 return count + xcount;
2490 /* reset ethdev extended statistics */
2492 rte_eth_xstats_reset(uint16_t port_id)
2494 struct rte_eth_dev *dev;
2496 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2497 dev = &rte_eth_devices[port_id];
2499 /* implemented by the driver */
2500 if (dev->dev_ops->xstats_reset != NULL) {
2501 (*dev->dev_ops->xstats_reset)(dev);
2505 /* fallback to default */
2506 rte_eth_stats_reset(port_id);
2510 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2513 struct rte_eth_dev *dev;
2515 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2517 dev = &rte_eth_devices[port_id];
2519 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2521 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2524 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2527 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2530 return (*dev->dev_ops->queue_stats_mapping_set)
2531 (dev, queue_id, stat_idx, is_rx);
2536 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2539 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2540 stat_idx, STAT_QMAP_TX));
2545 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2548 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2549 stat_idx, STAT_QMAP_RX));
2553 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2555 struct rte_eth_dev *dev;
2557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2558 dev = &rte_eth_devices[port_id];
2560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2561 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2562 fw_version, fw_size));
2566 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2568 struct rte_eth_dev *dev;
2569 const struct rte_eth_desc_lim lim = {
2570 .nb_max = UINT16_MAX,
2575 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2576 dev = &rte_eth_devices[port_id];
2578 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2579 dev_info->rx_desc_lim = lim;
2580 dev_info->tx_desc_lim = lim;
2581 dev_info->device = dev->device;
2583 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2584 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2585 dev_info->driver_name = dev->device->driver->name;
2586 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2587 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2589 dev_info->dev_flags = &dev->data->dev_flags;
2593 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2594 uint32_t *ptypes, int num)
2597 struct rte_eth_dev *dev;
2598 const uint32_t *all_ptypes;
2600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2601 dev = &rte_eth_devices[port_id];
2602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2603 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2608 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2609 if (all_ptypes[i] & ptype_mask) {
2611 ptypes[j] = all_ptypes[i];
2619 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2621 struct rte_eth_dev *dev;
2623 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2624 dev = &rte_eth_devices[port_id];
2625 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2630 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2632 struct rte_eth_dev *dev;
2634 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2636 dev = &rte_eth_devices[port_id];
2637 *mtu = dev->data->mtu;
2642 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2645 struct rte_eth_dev *dev;
2647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2648 dev = &rte_eth_devices[port_id];
2649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2651 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2653 dev->data->mtu = mtu;
2655 return eth_err(port_id, ret);
2659 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2661 struct rte_eth_dev *dev;
2664 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2665 dev = &rte_eth_devices[port_id];
2666 if (!(dev->data->dev_conf.rxmode.offloads &
2667 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2668 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2673 if (vlan_id > 4095) {
2674 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2678 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2680 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2682 struct rte_vlan_filter_conf *vfc;
2686 vfc = &dev->data->vlan_filter_conf;
2687 vidx = vlan_id / 64;
2688 vbit = vlan_id % 64;
2691 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2693 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2696 return eth_err(port_id, ret);
2700 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2703 struct rte_eth_dev *dev;
2705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2706 dev = &rte_eth_devices[port_id];
2707 if (rx_queue_id >= dev->data->nb_rx_queues) {
2708 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2713 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2719 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2720 enum rte_vlan_type vlan_type,
2723 struct rte_eth_dev *dev;
2725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2726 dev = &rte_eth_devices[port_id];
2727 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2729 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2734 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2736 struct rte_eth_dev *dev;
2740 uint64_t orig_offloads;
2742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2743 dev = &rte_eth_devices[port_id];
2745 /* save original values in case of failure */
2746 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2748 /*check which option changed by application*/
2749 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2750 org = !!(dev->data->dev_conf.rxmode.offloads &
2751 DEV_RX_OFFLOAD_VLAN_STRIP);
2754 dev->data->dev_conf.rxmode.offloads |=
2755 DEV_RX_OFFLOAD_VLAN_STRIP;
2757 dev->data->dev_conf.rxmode.offloads &=
2758 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2759 mask |= ETH_VLAN_STRIP_MASK;
2762 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2763 org = !!(dev->data->dev_conf.rxmode.offloads &
2764 DEV_RX_OFFLOAD_VLAN_FILTER);
2767 dev->data->dev_conf.rxmode.offloads |=
2768 DEV_RX_OFFLOAD_VLAN_FILTER;
2770 dev->data->dev_conf.rxmode.offloads &=
2771 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2772 mask |= ETH_VLAN_FILTER_MASK;
2775 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2776 org = !!(dev->data->dev_conf.rxmode.offloads &
2777 DEV_RX_OFFLOAD_VLAN_EXTEND);
2780 dev->data->dev_conf.rxmode.offloads |=
2781 DEV_RX_OFFLOAD_VLAN_EXTEND;
2783 dev->data->dev_conf.rxmode.offloads &=
2784 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2785 mask |= ETH_VLAN_EXTEND_MASK;
2792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2793 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2795 /* hit an error restore original values */
2796 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2799 return eth_err(port_id, ret);
2803 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2805 struct rte_eth_dev *dev;
2808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2811 if (dev->data->dev_conf.rxmode.offloads &
2812 DEV_RX_OFFLOAD_VLAN_STRIP)
2813 ret |= ETH_VLAN_STRIP_OFFLOAD;
2815 if (dev->data->dev_conf.rxmode.offloads &
2816 DEV_RX_OFFLOAD_VLAN_FILTER)
2817 ret |= ETH_VLAN_FILTER_OFFLOAD;
2819 if (dev->data->dev_conf.rxmode.offloads &
2820 DEV_RX_OFFLOAD_VLAN_EXTEND)
2821 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2827 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2829 struct rte_eth_dev *dev;
2831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2832 dev = &rte_eth_devices[port_id];
2833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2835 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2839 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2841 struct rte_eth_dev *dev;
2843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2844 dev = &rte_eth_devices[port_id];
2845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2846 memset(fc_conf, 0, sizeof(*fc_conf));
2847 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2851 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2853 struct rte_eth_dev *dev;
2855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2856 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2857 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2861 dev = &rte_eth_devices[port_id];
2862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2863 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2867 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2868 struct rte_eth_pfc_conf *pfc_conf)
2870 struct rte_eth_dev *dev;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2874 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2878 dev = &rte_eth_devices[port_id];
2879 /* High water, low water validation are device specific */
2880 if (*dev->dev_ops->priority_flow_ctrl_set)
2881 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2887 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2895 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2896 for (i = 0; i < num; i++) {
2897 if (reta_conf[i].mask)
2905 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2909 uint16_t i, idx, shift;
2915 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2919 for (i = 0; i < reta_size; i++) {
2920 idx = i / RTE_RETA_GROUP_SIZE;
2921 shift = i % RTE_RETA_GROUP_SIZE;
2922 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2923 (reta_conf[idx].reta[shift] >= max_rxq)) {
2925 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2927 reta_conf[idx].reta[shift], max_rxq);
2936 rte_eth_dev_rss_reta_update(uint16_t port_id,
2937 struct rte_eth_rss_reta_entry64 *reta_conf,
2940 struct rte_eth_dev *dev;
2943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 /* Check mask bits */
2945 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2949 dev = &rte_eth_devices[port_id];
2951 /* Check entry value */
2952 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2953 dev->data->nb_rx_queues);
2957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2958 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2963 rte_eth_dev_rss_reta_query(uint16_t port_id,
2964 struct rte_eth_rss_reta_entry64 *reta_conf,
2967 struct rte_eth_dev *dev;
2970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2972 /* Check mask bits */
2973 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2977 dev = &rte_eth_devices[port_id];
2978 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2979 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2984 rte_eth_dev_rss_hash_update(uint16_t port_id,
2985 struct rte_eth_rss_conf *rss_conf)
2987 struct rte_eth_dev *dev;
2988 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2990 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2991 dev = &rte_eth_devices[port_id];
2992 rte_eth_dev_info_get(port_id, &dev_info);
2993 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2994 dev_info.flow_type_rss_offloads) {
2996 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2997 port_id, rss_conf->rss_hf,
2998 dev_info.flow_type_rss_offloads);
3001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3002 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3007 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3008 struct rte_eth_rss_conf *rss_conf)
3010 struct rte_eth_dev *dev;
3012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3013 dev = &rte_eth_devices[port_id];
3014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3015 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3020 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3021 struct rte_eth_udp_tunnel *udp_tunnel)
3023 struct rte_eth_dev *dev;
3025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3026 if (udp_tunnel == NULL) {
3027 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3031 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3032 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3036 dev = &rte_eth_devices[port_id];
3037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3038 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3043 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3044 struct rte_eth_udp_tunnel *udp_tunnel)
3046 struct rte_eth_dev *dev;
3048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3049 dev = &rte_eth_devices[port_id];
3051 if (udp_tunnel == NULL) {
3052 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3056 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3057 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3062 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3067 rte_eth_led_on(uint16_t port_id)
3069 struct rte_eth_dev *dev;
3071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3072 dev = &rte_eth_devices[port_id];
3073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3074 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3078 rte_eth_led_off(uint16_t port_id)
3080 struct rte_eth_dev *dev;
3082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3083 dev = &rte_eth_devices[port_id];
3084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3085 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3089 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3093 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3095 struct rte_eth_dev_info dev_info;
3096 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3100 rte_eth_dev_info_get(port_id, &dev_info);
3102 for (i = 0; i < dev_info.max_mac_addrs; i++)
3103 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3109 static const struct ether_addr null_mac_addr;
3112 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3115 struct rte_eth_dev *dev;
3120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3121 dev = &rte_eth_devices[port_id];
3122 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3124 if (is_zero_ether_addr(addr)) {
3125 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3129 if (pool >= ETH_64_POOLS) {
3130 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3134 index = get_mac_addr_index(port_id, addr);
3136 index = get_mac_addr_index(port_id, &null_mac_addr);
3138 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3143 pool_mask = dev->data->mac_pool_sel[index];
3145 /* Check if both MAC address and pool is already there, and do nothing */
3146 if (pool_mask & (1ULL << pool))
3151 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3154 /* Update address in NIC data structure */
3155 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3157 /* Update pool bitmap in NIC data structure */
3158 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3161 return eth_err(port_id, ret);
3165 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3167 struct rte_eth_dev *dev;
3170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3171 dev = &rte_eth_devices[port_id];
3172 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3174 index = get_mac_addr_index(port_id, addr);
3177 "Port %u: Cannot remove default MAC address\n",
3180 } else if (index < 0)
3181 return 0; /* Do nothing if address wasn't found */
3184 (*dev->dev_ops->mac_addr_remove)(dev, index);
3186 /* Update address in NIC data structure */
3187 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3189 /* reset pool bitmap */
3190 dev->data->mac_pool_sel[index] = 0;
3196 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3198 struct rte_eth_dev *dev;
3201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3203 if (!is_valid_assigned_ether_addr(addr))
3206 dev = &rte_eth_devices[port_id];
3207 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3209 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3213 /* Update default address in NIC data structure */
3214 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3221 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3225 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3227 struct rte_eth_dev_info dev_info;
3228 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3231 rte_eth_dev_info_get(port_id, &dev_info);
3232 if (!dev->data->hash_mac_addrs)
3235 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3236 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3237 ETHER_ADDR_LEN) == 0)
3244 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3249 struct rte_eth_dev *dev;
3251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3253 dev = &rte_eth_devices[port_id];
3254 if (is_zero_ether_addr(addr)) {
3255 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3260 index = get_hash_mac_addr_index(port_id, addr);
3261 /* Check if it's already there, and do nothing */
3262 if ((index >= 0) && on)
3268 "Port %u: the MAC address was not set in UTA\n",
3273 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3275 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3281 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3282 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3284 /* Update address in NIC data structure */
3286 ether_addr_copy(addr,
3287 &dev->data->hash_mac_addrs[index]);
3289 ether_addr_copy(&null_mac_addr,
3290 &dev->data->hash_mac_addrs[index]);
3293 return eth_err(port_id, ret);
3297 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3299 struct rte_eth_dev *dev;
3301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3303 dev = &rte_eth_devices[port_id];
3305 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3306 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3310 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3313 struct rte_eth_dev *dev;
3314 struct rte_eth_dev_info dev_info;
3315 struct rte_eth_link link;
3317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3319 dev = &rte_eth_devices[port_id];
3320 rte_eth_dev_info_get(port_id, &dev_info);
3321 link = dev->data->dev_link;
3323 if (queue_idx > dev_info.max_tx_queues) {
3325 "Set queue rate limit:port %u: invalid queue id=%u\n",
3326 port_id, queue_idx);
3330 if (tx_rate > link.link_speed) {
3332 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3333 tx_rate, link.link_speed);
3337 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3338 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3339 queue_idx, tx_rate));
3343 rte_eth_mirror_rule_set(uint16_t port_id,
3344 struct rte_eth_mirror_conf *mirror_conf,
3345 uint8_t rule_id, uint8_t on)
3347 struct rte_eth_dev *dev;
3349 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3350 if (mirror_conf->rule_type == 0) {
3351 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3355 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3356 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3361 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3362 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3363 (mirror_conf->pool_mask == 0)) {
3365 "Invalid mirror pool, pool mask can not be 0\n");
3369 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3370 mirror_conf->vlan.vlan_mask == 0) {
3372 "Invalid vlan mask, vlan mask can not be 0\n");
3376 dev = &rte_eth_devices[port_id];
3377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3379 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3380 mirror_conf, rule_id, on));
3384 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3386 struct rte_eth_dev *dev;
3388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3390 dev = &rte_eth_devices[port_id];
3391 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3393 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3397 RTE_INIT(eth_dev_init_cb_lists)
3401 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3402 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3406 rte_eth_dev_callback_register(uint16_t port_id,
3407 enum rte_eth_event_type event,
3408 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3410 struct rte_eth_dev *dev;
3411 struct rte_eth_dev_callback *user_cb;
3412 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3418 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3419 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3423 if (port_id == RTE_ETH_ALL) {
3425 last_port = RTE_MAX_ETHPORTS - 1;
3427 next_port = last_port = port_id;
3430 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3433 dev = &rte_eth_devices[next_port];
3435 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3436 if (user_cb->cb_fn == cb_fn &&
3437 user_cb->cb_arg == cb_arg &&
3438 user_cb->event == event) {
3443 /* create a new callback. */
3444 if (user_cb == NULL) {
3445 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3446 sizeof(struct rte_eth_dev_callback), 0);
3447 if (user_cb != NULL) {
3448 user_cb->cb_fn = cb_fn;
3449 user_cb->cb_arg = cb_arg;
3450 user_cb->event = event;
3451 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3454 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3455 rte_eth_dev_callback_unregister(port_id, event,
3461 } while (++next_port <= last_port);
3463 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3468 rte_eth_dev_callback_unregister(uint16_t port_id,
3469 enum rte_eth_event_type event,
3470 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3473 struct rte_eth_dev *dev;
3474 struct rte_eth_dev_callback *cb, *next;
3475 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3481 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3482 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3486 if (port_id == RTE_ETH_ALL) {
3488 last_port = RTE_MAX_ETHPORTS - 1;
3490 next_port = last_port = port_id;
3493 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3496 dev = &rte_eth_devices[next_port];
3498 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3501 next = TAILQ_NEXT(cb, next);
3503 if (cb->cb_fn != cb_fn || cb->event != event ||
3504 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3508 * if this callback is not executing right now,
3511 if (cb->active == 0) {
3512 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3518 } while (++next_port <= last_port);
3520 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3525 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3526 enum rte_eth_event_type event, void *ret_param)
3528 struct rte_eth_dev_callback *cb_lst;
3529 struct rte_eth_dev_callback dev_cb;
3532 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3533 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3534 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3538 if (ret_param != NULL)
3539 dev_cb.ret_param = ret_param;
3541 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3542 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3543 dev_cb.cb_arg, dev_cb.ret_param);
3544 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3547 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3552 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3557 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3559 dev->state = RTE_ETH_DEV_ATTACHED;
3563 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3566 struct rte_eth_dev *dev;
3567 struct rte_intr_handle *intr_handle;
3571 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3573 dev = &rte_eth_devices[port_id];
3575 if (!dev->intr_handle) {
3576 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3580 intr_handle = dev->intr_handle;
3581 if (!intr_handle->intr_vec) {
3582 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3586 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3587 vec = intr_handle->intr_vec[qid];
3588 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3589 if (rc && rc != -EEXIST) {
3591 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3592 port_id, qid, op, epfd, vec);
3599 int __rte_experimental
3600 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3602 struct rte_intr_handle *intr_handle;
3603 struct rte_eth_dev *dev;
3604 unsigned int efd_idx;
3608 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3610 dev = &rte_eth_devices[port_id];
3612 if (queue_id >= dev->data->nb_rx_queues) {
3613 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3617 if (!dev->intr_handle) {
3618 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3622 intr_handle = dev->intr_handle;
3623 if (!intr_handle->intr_vec) {
3624 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3628 vec = intr_handle->intr_vec[queue_id];
3629 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3630 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3631 fd = intr_handle->efds[efd_idx];
3636 const struct rte_memzone *
3637 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3638 uint16_t queue_id, size_t size, unsigned align,
3641 char z_name[RTE_MEMZONE_NAMESIZE];
3642 const struct rte_memzone *mz;
3644 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3645 dev->data->port_id, queue_id, ring_name);
3647 mz = rte_memzone_lookup(z_name);
3651 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3652 RTE_MEMZONE_IOVA_CONTIG, align);
3655 int __rte_experimental
3656 rte_eth_dev_create(struct rte_device *device, const char *name,
3657 size_t priv_data_size,
3658 ethdev_bus_specific_init ethdev_bus_specific_init,
3659 void *bus_init_params,
3660 ethdev_init_t ethdev_init, void *init_params)
3662 struct rte_eth_dev *ethdev;
3665 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3667 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3668 ethdev = rte_eth_dev_allocate(name);
3672 if (priv_data_size) {
3673 ethdev->data->dev_private = rte_zmalloc_socket(
3674 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3677 if (!ethdev->data->dev_private) {
3678 RTE_LOG(ERR, EAL, "failed to allocate private data");
3684 ethdev = rte_eth_dev_attach_secondary(name);
3686 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3687 "ethdev doesn't exist");
3692 ethdev->device = device;
3694 if (ethdev_bus_specific_init) {
3695 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3698 "ethdev bus specific initialisation failed");
3703 retval = ethdev_init(ethdev, init_params);
3705 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3709 rte_eth_dev_probing_finish(ethdev);
3714 rte_eth_dev_release_port(ethdev);
3718 int __rte_experimental
3719 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3720 ethdev_uninit_t ethdev_uninit)
3724 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3728 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3729 if (ethdev_uninit) {
3730 ret = ethdev_uninit(ethdev);
3735 return rte_eth_dev_release_port(ethdev);
3739 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3740 int epfd, int op, void *data)
3743 struct rte_eth_dev *dev;
3744 struct rte_intr_handle *intr_handle;
3747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3749 dev = &rte_eth_devices[port_id];
3750 if (queue_id >= dev->data->nb_rx_queues) {
3751 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3755 if (!dev->intr_handle) {
3756 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3760 intr_handle = dev->intr_handle;
3761 if (!intr_handle->intr_vec) {
3762 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3766 vec = intr_handle->intr_vec[queue_id];
3767 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3768 if (rc && rc != -EEXIST) {
3770 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3771 port_id, queue_id, op, epfd, vec);
3779 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3782 struct rte_eth_dev *dev;
3784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3786 dev = &rte_eth_devices[port_id];
3788 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3789 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3794 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3797 struct rte_eth_dev *dev;
3799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3801 dev = &rte_eth_devices[port_id];
3803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3804 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3810 rte_eth_dev_filter_supported(uint16_t port_id,
3811 enum rte_filter_type filter_type)
3813 struct rte_eth_dev *dev;
3815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3817 dev = &rte_eth_devices[port_id];
3818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3819 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3820 RTE_ETH_FILTER_NOP, NULL);
3824 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3825 enum rte_filter_op filter_op, void *arg)
3827 struct rte_eth_dev *dev;
3829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3831 dev = &rte_eth_devices[port_id];
3832 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3833 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3837 const struct rte_eth_rxtx_callback *
3838 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3839 rte_rx_callback_fn fn, void *user_param)
3841 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3842 rte_errno = ENOTSUP;
3845 /* check input parameters */
3846 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3847 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3851 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3859 cb->param = user_param;
3861 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3862 /* Add the callbacks in fifo order. */
3863 struct rte_eth_rxtx_callback *tail =
3864 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3867 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3874 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3879 const struct rte_eth_rxtx_callback *
3880 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3881 rte_rx_callback_fn fn, void *user_param)
3883 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3884 rte_errno = ENOTSUP;
3887 /* check input parameters */
3888 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3889 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3894 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3902 cb->param = user_param;
3904 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3905 /* Add the callbacks at fisrt position*/
3906 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3908 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3909 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3914 const struct rte_eth_rxtx_callback *
3915 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3916 rte_tx_callback_fn fn, void *user_param)
3918 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3919 rte_errno = ENOTSUP;
3922 /* check input parameters */
3923 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3924 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3929 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3937 cb->param = user_param;
3939 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3940 /* Add the callbacks in fifo order. */
3941 struct rte_eth_rxtx_callback *tail =
3942 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3945 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3952 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3958 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3959 const struct rte_eth_rxtx_callback *user_cb)
3961 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3964 /* Check input parameters. */
3965 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3966 if (user_cb == NULL ||
3967 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3970 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3971 struct rte_eth_rxtx_callback *cb;
3972 struct rte_eth_rxtx_callback **prev_cb;
3975 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3976 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3977 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3979 if (cb == user_cb) {
3980 /* Remove the user cb from the callback list. */
3981 *prev_cb = cb->next;
3986 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3992 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3993 const struct rte_eth_rxtx_callback *user_cb)
3995 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3998 /* Check input parameters. */
3999 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4000 if (user_cb == NULL ||
4001 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4004 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4006 struct rte_eth_rxtx_callback *cb;
4007 struct rte_eth_rxtx_callback **prev_cb;
4009 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4010 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4011 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4013 if (cb == user_cb) {
4014 /* Remove the user cb from the callback list. */
4015 *prev_cb = cb->next;
4020 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4026 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4027 struct rte_eth_rxq_info *qinfo)
4029 struct rte_eth_dev *dev;
4031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4036 dev = &rte_eth_devices[port_id];
4037 if (queue_id >= dev->data->nb_rx_queues) {
4038 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4044 memset(qinfo, 0, sizeof(*qinfo));
4045 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4050 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4051 struct rte_eth_txq_info *qinfo)
4053 struct rte_eth_dev *dev;
4055 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4060 dev = &rte_eth_devices[port_id];
4061 if (queue_id >= dev->data->nb_tx_queues) {
4062 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4068 memset(qinfo, 0, sizeof(*qinfo));
4069 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4075 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4076 struct ether_addr *mc_addr_set,
4077 uint32_t nb_mc_addr)
4079 struct rte_eth_dev *dev;
4081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4083 dev = &rte_eth_devices[port_id];
4084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4085 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4086 mc_addr_set, nb_mc_addr));
4090 rte_eth_timesync_enable(uint16_t port_id)
4092 struct rte_eth_dev *dev;
4094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4095 dev = &rte_eth_devices[port_id];
4097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4098 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4102 rte_eth_timesync_disable(uint16_t port_id)
4104 struct rte_eth_dev *dev;
4106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4107 dev = &rte_eth_devices[port_id];
4109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4110 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4114 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4117 struct rte_eth_dev *dev;
4119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4120 dev = &rte_eth_devices[port_id];
4122 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4123 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4124 (dev, timestamp, flags));
4128 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4129 struct timespec *timestamp)
4131 struct rte_eth_dev *dev;
4133 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4134 dev = &rte_eth_devices[port_id];
4136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4137 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4142 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4144 struct rte_eth_dev *dev;
4146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4147 dev = &rte_eth_devices[port_id];
4149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4150 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4155 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4157 struct rte_eth_dev *dev;
4159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4160 dev = &rte_eth_devices[port_id];
4162 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4163 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4168 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4170 struct rte_eth_dev *dev;
4172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4173 dev = &rte_eth_devices[port_id];
4175 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4176 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4181 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4183 struct rte_eth_dev *dev;
4185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4187 dev = &rte_eth_devices[port_id];
4188 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4189 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4193 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4195 struct rte_eth_dev *dev;
4197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4199 dev = &rte_eth_devices[port_id];
4200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4201 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4205 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4207 struct rte_eth_dev *dev;
4209 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4211 dev = &rte_eth_devices[port_id];
4212 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4213 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4217 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4219 struct rte_eth_dev *dev;
4221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4223 dev = &rte_eth_devices[port_id];
4224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4225 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4228 int __rte_experimental
4229 rte_eth_dev_get_module_info(uint16_t port_id,
4230 struct rte_eth_dev_module_info *modinfo)
4232 struct rte_eth_dev *dev;
4234 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4236 dev = &rte_eth_devices[port_id];
4237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4238 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4241 int __rte_experimental
4242 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4243 struct rte_dev_eeprom_info *info)
4245 struct rte_eth_dev *dev;
4247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4249 dev = &rte_eth_devices[port_id];
4250 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4251 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4255 rte_eth_dev_get_dcb_info(uint16_t port_id,
4256 struct rte_eth_dcb_info *dcb_info)
4258 struct rte_eth_dev *dev;
4260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4262 dev = &rte_eth_devices[port_id];
4263 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4265 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4266 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4270 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4271 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4273 struct rte_eth_dev *dev;
4275 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4276 if (l2_tunnel == NULL) {
4277 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4281 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4282 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4286 dev = &rte_eth_devices[port_id];
4287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4289 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4294 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4295 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4299 struct rte_eth_dev *dev;
4301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4303 if (l2_tunnel == NULL) {
4304 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4308 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4309 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4314 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4318 dev = &rte_eth_devices[port_id];
4319 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4321 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4322 l2_tunnel, mask, en));
4326 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4327 const struct rte_eth_desc_lim *desc_lim)
4329 if (desc_lim->nb_align != 0)
4330 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4332 if (desc_lim->nb_max != 0)
4333 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4335 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4339 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4340 uint16_t *nb_rx_desc,
4341 uint16_t *nb_tx_desc)
4343 struct rte_eth_dev *dev;
4344 struct rte_eth_dev_info dev_info;
4346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4348 dev = &rte_eth_devices[port_id];
4349 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4351 rte_eth_dev_info_get(port_id, &dev_info);
4353 if (nb_rx_desc != NULL)
4354 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4356 if (nb_tx_desc != NULL)
4357 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4363 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4365 struct rte_eth_dev *dev;
4367 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4372 dev = &rte_eth_devices[port_id];
4374 if (*dev->dev_ops->pool_ops_supported == NULL)
4375 return 1; /* all pools are supported */
4377 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4381 * A set of values to describe the possible states of a switch domain.
4383 enum rte_eth_switch_domain_state {
4384 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4385 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4389 * Array of switch domains available for allocation. Array is sized to
4390 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4391 * ethdev ports in a single process.
4393 struct rte_eth_dev_switch {
4394 enum rte_eth_switch_domain_state state;
4395 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4397 int __rte_experimental
4398 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4402 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4404 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4405 i < RTE_MAX_ETHPORTS; i++) {
4406 if (rte_eth_switch_domains[i].state ==
4407 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4408 rte_eth_switch_domains[i].state =
4409 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4418 int __rte_experimental
4419 rte_eth_switch_domain_free(uint16_t domain_id)
4421 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4422 domain_id >= RTE_MAX_ETHPORTS)
4425 if (rte_eth_switch_domains[domain_id].state !=
4426 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4429 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4434 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4437 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4440 struct rte_kvargs_pair *pair;
4443 arglist->str = strdup(str_in);
4444 if (arglist->str == NULL)
4447 letter = arglist->str;
4450 pair = &arglist->pairs[0];
4453 case 0: /* Initial */
4456 else if (*letter == '\0')
4463 case 1: /* Parsing key */
4464 if (*letter == '=') {
4466 pair->value = letter + 1;
4468 } else if (*letter == ',' || *letter == '\0')
4473 case 2: /* Parsing value */
4476 else if (*letter == ',') {
4479 pair = &arglist->pairs[arglist->count];
4481 } else if (*letter == '\0') {
4484 pair = &arglist->pairs[arglist->count];
4489 case 3: /* Parsing list */
4492 else if (*letter == '\0')
4501 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4509 /* Single element, not a list */
4510 return callback(str, data);
4512 /* Sanity check, then strip the brackets */
4513 str_start = &str[strlen(str) - 1];
4514 if (*str_start != ']') {
4515 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4521 /* Process list elements */
4531 } else if (state == 1) {
4532 if (*str == ',' || *str == '\0') {
4533 if (str > str_start) {
4534 /* Non-empty string fragment */
4536 result = callback(str_start, data);
4549 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4550 const uint16_t max_list)
4552 uint16_t lo, hi, val;
4555 result = sscanf(str, "%hu-%hu", &lo, &hi);
4557 if (*len_list >= max_list)
4559 list[(*len_list)++] = lo;
4560 } else if (result == 2) {
4561 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4563 for (val = lo; val <= hi; val++) {
4564 if (*len_list >= max_list)
4566 list[(*len_list)++] = val;
4575 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4577 struct rte_eth_devargs *eth_da = data;
4579 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4580 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4583 int __rte_experimental
4584 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4586 struct rte_kvargs args;
4587 struct rte_kvargs_pair *pair;
4591 memset(eth_da, 0, sizeof(*eth_da));
4593 result = rte_eth_devargs_tokenise(&args, dargs);
4597 for (i = 0; i < args.count; i++) {
4598 pair = &args.pairs[i];
4599 if (strcmp("representor", pair->key) == 0) {
4600 result = rte_eth_devargs_parse_list(pair->value,
4601 rte_eth_devargs_parse_representor_ports,
4615 RTE_INIT(ethdev_init_log)
4617 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4618 if (rte_eth_dev_logtype >= 0)
4619 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);