1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 #undef RTE_TX_OFFLOAD_BIT2STR
168 * The user application callback description.
170 * It contains callback address to be registered by user application,
171 * the pointer to the parameters for callback, and the event type.
173 struct rte_eth_dev_callback {
174 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
176 void *cb_arg; /**< Parameter for callback */
177 void *ret_param; /**< Return parameter */
178 enum rte_eth_event_type event; /**< Interrupt event type */
179 uint32_t active; /**< Callback is executing */
188 rte_eth_find_next(uint16_t port_id)
190 while (port_id < RTE_MAX_ETHPORTS &&
191 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
192 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
195 if (port_id >= RTE_MAX_ETHPORTS)
196 return RTE_MAX_ETHPORTS;
202 rte_eth_dev_shared_data_prepare(void)
204 const unsigned flags = 0;
205 const struct rte_memzone *mz;
207 rte_spinlock_lock(&rte_eth_shared_data_lock);
209 if (rte_eth_dev_shared_data == NULL) {
210 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
211 /* Allocate port data and ownership shared memory. */
212 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
213 sizeof(*rte_eth_dev_shared_data),
214 rte_socket_id(), flags);
216 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
218 rte_panic("Cannot allocate ethdev shared data\n");
220 rte_eth_dev_shared_data = mz->addr;
221 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
222 rte_eth_dev_shared_data->next_owner_id =
223 RTE_ETH_DEV_NO_OWNER + 1;
224 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
225 memset(rte_eth_dev_shared_data->data, 0,
226 sizeof(rte_eth_dev_shared_data->data));
230 rte_spinlock_unlock(&rte_eth_shared_data_lock);
234 is_allocated(const struct rte_eth_dev *ethdev)
236 return ethdev->data->name[0] != '\0';
239 static struct rte_eth_dev *
240 _rte_eth_dev_allocated(const char *name)
244 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
245 if (rte_eth_devices[i].data != NULL &&
246 strcmp(rte_eth_devices[i].data->name, name) == 0)
247 return &rte_eth_devices[i];
253 rte_eth_dev_allocated(const char *name)
255 struct rte_eth_dev *ethdev;
257 rte_eth_dev_shared_data_prepare();
259 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
261 ethdev = _rte_eth_dev_allocated(name);
263 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
269 rte_eth_dev_find_free_port(void)
273 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
274 /* Using shared name field to find a free port. */
275 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
276 RTE_ASSERT(rte_eth_devices[i].state ==
281 return RTE_MAX_ETHPORTS;
284 static struct rte_eth_dev *
285 eth_dev_get(uint16_t port_id)
287 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
289 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
291 eth_dev_last_created_port = port_id;
297 rte_eth_dev_allocate(const char *name)
300 struct rte_eth_dev *eth_dev = NULL;
302 rte_eth_dev_shared_data_prepare();
304 /* Synchronize port creation between primary and secondary threads. */
305 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
307 if (_rte_eth_dev_allocated(name) != NULL) {
309 "Ethernet device with name %s already allocated\n",
314 port_id = rte_eth_dev_find_free_port();
315 if (port_id == RTE_MAX_ETHPORTS) {
317 "Reached maximum number of Ethernet ports\n");
321 eth_dev = eth_dev_get(port_id);
322 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
323 eth_dev->data->port_id = port_id;
324 eth_dev->data->mtu = ETHER_MTU;
327 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
333 * Attach to a port already registered by the primary process, which
334 * makes sure that the same device would have the same port id both
335 * in the primary and secondary process.
338 rte_eth_dev_attach_secondary(const char *name)
341 struct rte_eth_dev *eth_dev = NULL;
343 rte_eth_dev_shared_data_prepare();
345 /* Synchronize port attachment to primary port creation and release. */
346 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
348 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
349 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
352 if (i == RTE_MAX_ETHPORTS) {
354 "Device %s is not driven by the primary process\n",
357 eth_dev = eth_dev_get(i);
358 RTE_ASSERT(eth_dev->data->port_id == i);
361 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
366 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
371 rte_eth_dev_shared_data_prepare();
373 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
375 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
377 eth_dev->state = RTE_ETH_DEV_UNUSED;
379 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
381 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
387 rte_eth_dev_is_valid_port(uint16_t port_id)
389 if (port_id >= RTE_MAX_ETHPORTS ||
390 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
397 rte_eth_is_valid_owner_id(uint64_t owner_id)
399 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
400 rte_eth_dev_shared_data->next_owner_id <= owner_id)
406 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
408 while (port_id < RTE_MAX_ETHPORTS &&
409 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
410 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
411 rte_eth_devices[port_id].data->owner.id != owner_id))
414 if (port_id >= RTE_MAX_ETHPORTS)
415 return RTE_MAX_ETHPORTS;
420 int __rte_experimental
421 rte_eth_dev_owner_new(uint64_t *owner_id)
423 rte_eth_dev_shared_data_prepare();
425 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
427 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
429 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
434 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
435 const struct rte_eth_dev_owner *new_owner)
437 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
438 struct rte_eth_dev_owner *port_owner;
441 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
442 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
447 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
448 !rte_eth_is_valid_owner_id(old_owner_id)) {
450 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
451 old_owner_id, new_owner->id);
455 port_owner = &rte_eth_devices[port_id].data->owner;
456 if (port_owner->id != old_owner_id) {
458 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
459 port_id, port_owner->name, port_owner->id);
463 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
465 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
466 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
469 port_owner->id = new_owner->id;
471 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
472 port_id, new_owner->name, new_owner->id);
477 int __rte_experimental
478 rte_eth_dev_owner_set(const uint16_t port_id,
479 const struct rte_eth_dev_owner *owner)
483 rte_eth_dev_shared_data_prepare();
485 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
487 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
489 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
493 int __rte_experimental
494 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
496 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
497 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
500 rte_eth_dev_shared_data_prepare();
502 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
504 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
510 void __rte_experimental
511 rte_eth_dev_owner_delete(const uint64_t owner_id)
515 rte_eth_dev_shared_data_prepare();
517 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
519 if (rte_eth_is_valid_owner_id(owner_id)) {
520 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
521 if (rte_eth_devices[port_id].data->owner.id == owner_id)
522 memset(&rte_eth_devices[port_id].data->owner, 0,
523 sizeof(struct rte_eth_dev_owner));
524 RTE_ETHDEV_LOG(NOTICE,
525 "All port owners owned by %016"PRIx64" identifier have removed\n",
529 "Invalid owner id=%016"PRIx64"\n",
533 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
536 int __rte_experimental
537 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
540 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
542 rte_eth_dev_shared_data_prepare();
544 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
546 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
547 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
551 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
554 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
559 rte_eth_dev_socket_id(uint16_t port_id)
561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
562 return rte_eth_devices[port_id].data->numa_node;
566 rte_eth_dev_get_sec_ctx(uint16_t port_id)
568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
569 return rte_eth_devices[port_id].security_ctx;
573 rte_eth_dev_count(void)
575 return rte_eth_dev_count_avail();
579 rte_eth_dev_count_avail(void)
586 RTE_ETH_FOREACH_DEV(p)
592 uint16_t __rte_experimental
593 rte_eth_dev_count_total(void)
595 uint16_t port, count = 0;
597 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
598 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
605 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
612 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
616 /* shouldn't check 'rte_eth_devices[i].data',
617 * because it might be overwritten by VDEV PMD */
618 tmp = rte_eth_dev_shared_data->data[port_id].name;
624 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
629 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
633 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
634 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
635 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
645 eth_err(uint16_t port_id, int ret)
649 if (rte_eth_dev_is_removed(port_id))
654 /* attach the new device, then store port_id of the device */
656 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
658 int current = rte_eth_dev_count_total();
659 struct rte_devargs da;
662 memset(&da, 0, sizeof(da));
664 if ((devargs == NULL) || (port_id == NULL)) {
670 if (rte_devargs_parse(&da, devargs))
673 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
677 /* no point looking at the port count if no port exists */
678 if (!rte_eth_dev_count_total()) {
679 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
684 /* if nothing happened, there is a bug here, since some driver told us
685 * it did attach a device, but did not create a port.
686 * FIXME: race condition in case of plug-out of another device
688 if (current == rte_eth_dev_count_total()) {
693 *port_id = eth_dev_last_created_port;
701 /* detach the device, then store the name of the device */
703 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
705 struct rte_device *dev;
710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
712 dev_flags = rte_eth_devices[port_id].data->dev_flags;
713 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
715 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
719 dev = rte_eth_devices[port_id].device;
723 bus = rte_bus_find_by_device(dev);
727 ret = rte_eal_hotplug_remove(bus->name, dev->name);
731 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
736 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
738 uint16_t old_nb_queues = dev->data->nb_rx_queues;
742 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
743 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
744 sizeof(dev->data->rx_queues[0]) * nb_queues,
745 RTE_CACHE_LINE_SIZE);
746 if (dev->data->rx_queues == NULL) {
747 dev->data->nb_rx_queues = 0;
750 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
751 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
753 rxq = dev->data->rx_queues;
755 for (i = nb_queues; i < old_nb_queues; i++)
756 (*dev->dev_ops->rx_queue_release)(rxq[i]);
757 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
758 RTE_CACHE_LINE_SIZE);
761 if (nb_queues > old_nb_queues) {
762 uint16_t new_qs = nb_queues - old_nb_queues;
764 memset(rxq + old_nb_queues, 0,
765 sizeof(rxq[0]) * new_qs);
768 dev->data->rx_queues = rxq;
770 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
773 rxq = dev->data->rx_queues;
775 for (i = nb_queues; i < old_nb_queues; i++)
776 (*dev->dev_ops->rx_queue_release)(rxq[i]);
778 rte_free(dev->data->rx_queues);
779 dev->data->rx_queues = NULL;
781 dev->data->nb_rx_queues = nb_queues;
786 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
788 struct rte_eth_dev *dev;
790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
792 dev = &rte_eth_devices[port_id];
793 if (!dev->data->dev_started) {
795 "Port %u must be started before start any queue\n",
800 if (rx_queue_id >= dev->data->nb_rx_queues) {
801 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
807 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
809 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
810 rx_queue_id, port_id);
814 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
820 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
822 struct rte_eth_dev *dev;
824 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
826 dev = &rte_eth_devices[port_id];
827 if (rx_queue_id >= dev->data->nb_rx_queues) {
828 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
832 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
834 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
836 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
837 rx_queue_id, port_id);
841 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
846 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
848 struct rte_eth_dev *dev;
850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
852 dev = &rte_eth_devices[port_id];
853 if (!dev->data->dev_started) {
855 "Port %u must be started before start any queue\n",
860 if (tx_queue_id >= dev->data->nb_tx_queues) {
861 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
867 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
869 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
870 tx_queue_id, port_id);
874 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
878 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
880 struct rte_eth_dev *dev;
882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
884 dev = &rte_eth_devices[port_id];
885 if (tx_queue_id >= dev->data->nb_tx_queues) {
886 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
890 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
892 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
894 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
895 tx_queue_id, port_id);
899 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
904 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
906 uint16_t old_nb_queues = dev->data->nb_tx_queues;
910 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
911 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
912 sizeof(dev->data->tx_queues[0]) * nb_queues,
913 RTE_CACHE_LINE_SIZE);
914 if (dev->data->tx_queues == NULL) {
915 dev->data->nb_tx_queues = 0;
918 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
921 txq = dev->data->tx_queues;
923 for (i = nb_queues; i < old_nb_queues; i++)
924 (*dev->dev_ops->tx_queue_release)(txq[i]);
925 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
926 RTE_CACHE_LINE_SIZE);
929 if (nb_queues > old_nb_queues) {
930 uint16_t new_qs = nb_queues - old_nb_queues;
932 memset(txq + old_nb_queues, 0,
933 sizeof(txq[0]) * new_qs);
936 dev->data->tx_queues = txq;
938 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
939 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
941 txq = dev->data->tx_queues;
943 for (i = nb_queues; i < old_nb_queues; i++)
944 (*dev->dev_ops->tx_queue_release)(txq[i]);
946 rte_free(dev->data->tx_queues);
947 dev->data->tx_queues = NULL;
949 dev->data->nb_tx_queues = nb_queues;
954 rte_eth_speed_bitflag(uint32_t speed, int duplex)
957 case ETH_SPEED_NUM_10M:
958 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
959 case ETH_SPEED_NUM_100M:
960 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
961 case ETH_SPEED_NUM_1G:
962 return ETH_LINK_SPEED_1G;
963 case ETH_SPEED_NUM_2_5G:
964 return ETH_LINK_SPEED_2_5G;
965 case ETH_SPEED_NUM_5G:
966 return ETH_LINK_SPEED_5G;
967 case ETH_SPEED_NUM_10G:
968 return ETH_LINK_SPEED_10G;
969 case ETH_SPEED_NUM_20G:
970 return ETH_LINK_SPEED_20G;
971 case ETH_SPEED_NUM_25G:
972 return ETH_LINK_SPEED_25G;
973 case ETH_SPEED_NUM_40G:
974 return ETH_LINK_SPEED_40G;
975 case ETH_SPEED_NUM_50G:
976 return ETH_LINK_SPEED_50G;
977 case ETH_SPEED_NUM_56G:
978 return ETH_LINK_SPEED_56G;
979 case ETH_SPEED_NUM_100G:
980 return ETH_LINK_SPEED_100G;
986 const char * __rte_experimental
987 rte_eth_dev_rx_offload_name(uint64_t offload)
989 const char *name = "UNKNOWN";
992 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
993 if (offload == rte_rx_offload_names[i].offload) {
994 name = rte_rx_offload_names[i].name;
1002 const char * __rte_experimental
1003 rte_eth_dev_tx_offload_name(uint64_t offload)
1005 const char *name = "UNKNOWN";
1008 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1009 if (offload == rte_tx_offload_names[i].offload) {
1010 name = rte_tx_offload_names[i].name;
1019 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1020 const struct rte_eth_conf *dev_conf)
1022 struct rte_eth_dev *dev;
1023 struct rte_eth_dev_info dev_info;
1024 struct rte_eth_conf local_conf = *dev_conf;
1027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1029 dev = &rte_eth_devices[port_id];
1031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1034 rte_eth_dev_info_get(port_id, &dev_info);
1036 /* If number of queues specified by application for both Rx and Tx is
1037 * zero, use driver preferred values. This cannot be done individually
1038 * as it is valid for either Tx or Rx (but not both) to be zero.
1039 * If driver does not provide any preferred valued, fall back on
1042 if (nb_rx_q == 0 && nb_tx_q == 0) {
1043 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1045 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1046 nb_tx_q = dev_info.default_txportconf.nb_queues;
1048 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1051 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1053 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1054 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1058 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1060 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1061 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1065 if (dev->data->dev_started) {
1067 "Port %u must be stopped to allow configuration\n",
1072 /* Copy the dev_conf parameter into the dev structure */
1073 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1076 * Check that the numbers of RX and TX queues are not greater
1077 * than the maximum number of RX and TX queues supported by the
1078 * configured device.
1080 if (nb_rx_q > dev_info.max_rx_queues) {
1081 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1082 port_id, nb_rx_q, dev_info.max_rx_queues);
1086 if (nb_tx_q > dev_info.max_tx_queues) {
1087 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1088 port_id, nb_tx_q, dev_info.max_tx_queues);
1092 /* Check that the device supports requested interrupts */
1093 if ((dev_conf->intr_conf.lsc == 1) &&
1094 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1095 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1096 dev->device->driver->name);
1099 if ((dev_conf->intr_conf.rmv == 1) &&
1100 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1101 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1102 dev->device->driver->name);
1107 * If jumbo frames are enabled, check that the maximum RX packet
1108 * length is supported by the configured device.
1110 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1111 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1113 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1114 port_id, dev_conf->rxmode.max_rx_pkt_len,
1115 dev_info.max_rx_pktlen);
1117 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1119 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1120 port_id, dev_conf->rxmode.max_rx_pkt_len,
1121 (unsigned)ETHER_MIN_LEN);
1125 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1126 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1127 /* Use default value */
1128 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1132 /* Any requested offloading must be within its device capabilities */
1133 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1134 local_conf.rxmode.offloads) {
1136 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1137 "capabilities 0x%"PRIx64" in %s()\n",
1138 port_id, local_conf.rxmode.offloads,
1139 dev_info.rx_offload_capa,
1143 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1144 local_conf.txmode.offloads) {
1146 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1147 "capabilities 0x%"PRIx64" in %s()\n",
1148 port_id, local_conf.txmode.offloads,
1149 dev_info.tx_offload_capa,
1154 /* Check that device supports requested rss hash functions. */
1155 if ((dev_info.flow_type_rss_offloads |
1156 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1157 dev_info.flow_type_rss_offloads) {
1159 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1160 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1161 dev_info.flow_type_rss_offloads);
1166 * Setup new number of RX/TX queues and reconfigure device.
1168 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1171 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1176 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1179 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1181 rte_eth_dev_rx_queue_config(dev, 0);
1185 diag = (*dev->dev_ops->dev_configure)(dev);
1187 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1189 rte_eth_dev_rx_queue_config(dev, 0);
1190 rte_eth_dev_tx_queue_config(dev, 0);
1191 return eth_err(port_id, diag);
1194 /* Initialize Rx profiling if enabled at compilation time. */
1195 diag = __rte_eth_dev_profile_init(port_id, dev);
1197 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1199 rte_eth_dev_rx_queue_config(dev, 0);
1200 rte_eth_dev_tx_queue_config(dev, 0);
1201 return eth_err(port_id, diag);
1208 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1210 if (dev->data->dev_started) {
1211 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1212 dev->data->port_id);
1216 rte_eth_dev_rx_queue_config(dev, 0);
1217 rte_eth_dev_tx_queue_config(dev, 0);
1219 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1223 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1224 struct rte_eth_dev_info *dev_info)
1226 struct ether_addr *addr;
1231 /* replay MAC address configuration including default MAC */
1232 addr = &dev->data->mac_addrs[0];
1233 if (*dev->dev_ops->mac_addr_set != NULL)
1234 (*dev->dev_ops->mac_addr_set)(dev, addr);
1235 else if (*dev->dev_ops->mac_addr_add != NULL)
1236 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1238 if (*dev->dev_ops->mac_addr_add != NULL) {
1239 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1240 addr = &dev->data->mac_addrs[i];
1242 /* skip zero address */
1243 if (is_zero_ether_addr(addr))
1247 pool_mask = dev->data->mac_pool_sel[i];
1250 if (pool_mask & 1ULL)
1251 (*dev->dev_ops->mac_addr_add)(dev,
1255 } while (pool_mask);
1261 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1262 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1264 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1265 rte_eth_dev_mac_restore(dev, dev_info);
1267 /* replay promiscuous configuration */
1268 if (rte_eth_promiscuous_get(port_id) == 1)
1269 rte_eth_promiscuous_enable(port_id);
1270 else if (rte_eth_promiscuous_get(port_id) == 0)
1271 rte_eth_promiscuous_disable(port_id);
1273 /* replay all multicast configuration */
1274 if (rte_eth_allmulticast_get(port_id) == 1)
1275 rte_eth_allmulticast_enable(port_id);
1276 else if (rte_eth_allmulticast_get(port_id) == 0)
1277 rte_eth_allmulticast_disable(port_id);
1281 rte_eth_dev_start(uint16_t port_id)
1283 struct rte_eth_dev *dev;
1284 struct rte_eth_dev_info dev_info;
1287 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1289 dev = &rte_eth_devices[port_id];
1291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1293 if (dev->data->dev_started != 0) {
1294 RTE_ETHDEV_LOG(INFO,
1295 "Device with port_id=%"PRIu16" already started\n",
1300 rte_eth_dev_info_get(port_id, &dev_info);
1302 /* Lets restore MAC now if device does not support live change */
1303 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1304 rte_eth_dev_mac_restore(dev, &dev_info);
1306 diag = (*dev->dev_ops->dev_start)(dev);
1308 dev->data->dev_started = 1;
1310 return eth_err(port_id, diag);
1312 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1314 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1316 (*dev->dev_ops->link_update)(dev, 0);
1322 rte_eth_dev_stop(uint16_t port_id)
1324 struct rte_eth_dev *dev;
1326 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1327 dev = &rte_eth_devices[port_id];
1329 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1331 if (dev->data->dev_started == 0) {
1332 RTE_ETHDEV_LOG(INFO,
1333 "Device with port_id=%"PRIu16" already stopped\n",
1338 dev->data->dev_started = 0;
1339 (*dev->dev_ops->dev_stop)(dev);
1343 rte_eth_dev_set_link_up(uint16_t port_id)
1345 struct rte_eth_dev *dev;
1347 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1349 dev = &rte_eth_devices[port_id];
1351 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1352 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1356 rte_eth_dev_set_link_down(uint16_t port_id)
1358 struct rte_eth_dev *dev;
1360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1362 dev = &rte_eth_devices[port_id];
1364 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1365 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1369 rte_eth_dev_close(uint16_t port_id)
1371 struct rte_eth_dev *dev;
1373 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1374 dev = &rte_eth_devices[port_id];
1376 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1377 dev->data->dev_started = 0;
1378 (*dev->dev_ops->dev_close)(dev);
1380 dev->data->nb_rx_queues = 0;
1381 rte_free(dev->data->rx_queues);
1382 dev->data->rx_queues = NULL;
1383 dev->data->nb_tx_queues = 0;
1384 rte_free(dev->data->tx_queues);
1385 dev->data->tx_queues = NULL;
1389 rte_eth_dev_reset(uint16_t port_id)
1391 struct rte_eth_dev *dev;
1394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1395 dev = &rte_eth_devices[port_id];
1397 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1399 rte_eth_dev_stop(port_id);
1400 ret = dev->dev_ops->dev_reset(dev);
1402 return eth_err(port_id, ret);
1405 int __rte_experimental
1406 rte_eth_dev_is_removed(uint16_t port_id)
1408 struct rte_eth_dev *dev;
1411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1413 dev = &rte_eth_devices[port_id];
1415 if (dev->state == RTE_ETH_DEV_REMOVED)
1418 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1420 ret = dev->dev_ops->is_removed(dev);
1422 /* Device is physically removed. */
1423 dev->state = RTE_ETH_DEV_REMOVED;
1429 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1430 uint16_t nb_rx_desc, unsigned int socket_id,
1431 const struct rte_eth_rxconf *rx_conf,
1432 struct rte_mempool *mp)
1435 uint32_t mbp_buf_size;
1436 struct rte_eth_dev *dev;
1437 struct rte_eth_dev_info dev_info;
1438 struct rte_eth_rxconf local_conf;
1441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1443 dev = &rte_eth_devices[port_id];
1444 if (rx_queue_id >= dev->data->nb_rx_queues) {
1445 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1453 * Check the size of the mbuf data buffer.
1454 * This value must be provided in the private data of the memory pool.
1455 * First check that the memory pool has a valid private data.
1457 rte_eth_dev_info_get(port_id, &dev_info);
1458 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1459 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1460 mp->name, (int)mp->private_data_size,
1461 (int)sizeof(struct rte_pktmbuf_pool_private));
1464 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1466 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1468 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1469 mp->name, (int)mbp_buf_size,
1470 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1471 (int)RTE_PKTMBUF_HEADROOM,
1472 (int)dev_info.min_rx_bufsize);
1476 /* Use default specified by driver, if nb_rx_desc is zero */
1477 if (nb_rx_desc == 0) {
1478 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1479 /* If driver default is also zero, fall back on EAL default */
1480 if (nb_rx_desc == 0)
1481 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1484 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1485 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1486 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1489 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1490 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1491 dev_info.rx_desc_lim.nb_min,
1492 dev_info.rx_desc_lim.nb_align);
1496 if (dev->data->dev_started &&
1497 !(dev_info.dev_capa &
1498 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1501 if (dev->data->dev_started &&
1502 (dev->data->rx_queue_state[rx_queue_id] !=
1503 RTE_ETH_QUEUE_STATE_STOPPED))
1506 rxq = dev->data->rx_queues;
1507 if (rxq[rx_queue_id]) {
1508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1510 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1511 rxq[rx_queue_id] = NULL;
1514 if (rx_conf == NULL)
1515 rx_conf = &dev_info.default_rxconf;
1517 local_conf = *rx_conf;
1520 * If an offloading has already been enabled in
1521 * rte_eth_dev_configure(), it has been enabled on all queues,
1522 * so there is no need to enable it in this queue again.
1523 * The local_conf.offloads input to underlying PMD only carries
1524 * those offloadings which are only enabled on this queue and
1525 * not enabled on all queues.
1527 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1530 * New added offloadings for this queue are those not enabled in
1531 * rte_eth_dev_configure() and they must be per-queue type.
1532 * A pure per-port offloading can't be enabled on a queue while
1533 * disabled on another queue. A pure per-port offloading can't
1534 * be enabled for any queue as new added one if it hasn't been
1535 * enabled in rte_eth_dev_configure().
1537 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1538 local_conf.offloads) {
1540 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1541 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1542 port_id, rx_queue_id, local_conf.offloads,
1543 dev_info.rx_queue_offload_capa,
1548 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1549 socket_id, &local_conf, mp);
1551 if (!dev->data->min_rx_buf_size ||
1552 dev->data->min_rx_buf_size > mbp_buf_size)
1553 dev->data->min_rx_buf_size = mbp_buf_size;
1556 return eth_err(port_id, ret);
1560 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1561 uint16_t nb_tx_desc, unsigned int socket_id,
1562 const struct rte_eth_txconf *tx_conf)
1564 struct rte_eth_dev *dev;
1565 struct rte_eth_dev_info dev_info;
1566 struct rte_eth_txconf local_conf;
1569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1571 dev = &rte_eth_devices[port_id];
1572 if (tx_queue_id >= dev->data->nb_tx_queues) {
1573 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1578 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1580 rte_eth_dev_info_get(port_id, &dev_info);
1582 /* Use default specified by driver, if nb_tx_desc is zero */
1583 if (nb_tx_desc == 0) {
1584 nb_tx_desc = dev_info.default_txportconf.ring_size;
1585 /* If driver default is zero, fall back on EAL default */
1586 if (nb_tx_desc == 0)
1587 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1589 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1590 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1591 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1593 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1594 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1595 dev_info.tx_desc_lim.nb_min,
1596 dev_info.tx_desc_lim.nb_align);
1600 if (dev->data->dev_started &&
1601 !(dev_info.dev_capa &
1602 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1605 if (dev->data->dev_started &&
1606 (dev->data->tx_queue_state[tx_queue_id] !=
1607 RTE_ETH_QUEUE_STATE_STOPPED))
1610 txq = dev->data->tx_queues;
1611 if (txq[tx_queue_id]) {
1612 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1614 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1615 txq[tx_queue_id] = NULL;
1618 if (tx_conf == NULL)
1619 tx_conf = &dev_info.default_txconf;
1621 local_conf = *tx_conf;
1624 * If an offloading has already been enabled in
1625 * rte_eth_dev_configure(), it has been enabled on all queues,
1626 * so there is no need to enable it in this queue again.
1627 * The local_conf.offloads input to underlying PMD only carries
1628 * those offloadings which are only enabled on this queue and
1629 * not enabled on all queues.
1631 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1634 * New added offloadings for this queue are those not enabled in
1635 * rte_eth_dev_configure() and they must be per-queue type.
1636 * A pure per-port offloading can't be enabled on a queue while
1637 * disabled on another queue. A pure per-port offloading can't
1638 * be enabled for any queue as new added one if it hasn't been
1639 * enabled in rte_eth_dev_configure().
1641 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1642 local_conf.offloads) {
1644 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1645 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1646 port_id, tx_queue_id, local_conf.offloads,
1647 dev_info.tx_queue_offload_capa,
1652 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1653 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1657 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1658 void *userdata __rte_unused)
1662 for (i = 0; i < unsent; i++)
1663 rte_pktmbuf_free(pkts[i]);
1667 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1670 uint64_t *count = userdata;
1673 for (i = 0; i < unsent; i++)
1674 rte_pktmbuf_free(pkts[i]);
1680 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1681 buffer_tx_error_fn cbfn, void *userdata)
1683 buffer->error_callback = cbfn;
1684 buffer->error_userdata = userdata;
1689 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1696 buffer->size = size;
1697 if (buffer->error_callback == NULL) {
1698 ret = rte_eth_tx_buffer_set_err_callback(
1699 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1706 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1708 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1711 /* Validate Input Data. Bail if not valid or not supported. */
1712 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1715 /* Call driver to free pending mbufs. */
1716 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1718 return eth_err(port_id, ret);
1722 rte_eth_promiscuous_enable(uint16_t port_id)
1724 struct rte_eth_dev *dev;
1726 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1727 dev = &rte_eth_devices[port_id];
1729 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1730 (*dev->dev_ops->promiscuous_enable)(dev);
1731 dev->data->promiscuous = 1;
1735 rte_eth_promiscuous_disable(uint16_t port_id)
1737 struct rte_eth_dev *dev;
1739 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1740 dev = &rte_eth_devices[port_id];
1742 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1743 dev->data->promiscuous = 0;
1744 (*dev->dev_ops->promiscuous_disable)(dev);
1748 rte_eth_promiscuous_get(uint16_t port_id)
1750 struct rte_eth_dev *dev;
1752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1754 dev = &rte_eth_devices[port_id];
1755 return dev->data->promiscuous;
1759 rte_eth_allmulticast_enable(uint16_t port_id)
1761 struct rte_eth_dev *dev;
1763 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1764 dev = &rte_eth_devices[port_id];
1766 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1767 (*dev->dev_ops->allmulticast_enable)(dev);
1768 dev->data->all_multicast = 1;
1772 rte_eth_allmulticast_disable(uint16_t port_id)
1774 struct rte_eth_dev *dev;
1776 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1777 dev = &rte_eth_devices[port_id];
1779 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1780 dev->data->all_multicast = 0;
1781 (*dev->dev_ops->allmulticast_disable)(dev);
1785 rte_eth_allmulticast_get(uint16_t port_id)
1787 struct rte_eth_dev *dev;
1789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1791 dev = &rte_eth_devices[port_id];
1792 return dev->data->all_multicast;
1796 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1798 struct rte_eth_dev *dev;
1800 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1801 dev = &rte_eth_devices[port_id];
1803 if (dev->data->dev_conf.intr_conf.lsc &&
1804 dev->data->dev_started)
1805 rte_eth_linkstatus_get(dev, eth_link);
1807 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1808 (*dev->dev_ops->link_update)(dev, 1);
1809 *eth_link = dev->data->dev_link;
1814 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1816 struct rte_eth_dev *dev;
1818 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1819 dev = &rte_eth_devices[port_id];
1821 if (dev->data->dev_conf.intr_conf.lsc &&
1822 dev->data->dev_started)
1823 rte_eth_linkstatus_get(dev, eth_link);
1825 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1826 (*dev->dev_ops->link_update)(dev, 0);
1827 *eth_link = dev->data->dev_link;
1832 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1834 struct rte_eth_dev *dev;
1836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1838 dev = &rte_eth_devices[port_id];
1839 memset(stats, 0, sizeof(*stats));
1841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1842 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1843 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1847 rte_eth_stats_reset(uint16_t port_id)
1849 struct rte_eth_dev *dev;
1851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1852 dev = &rte_eth_devices[port_id];
1854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1855 (*dev->dev_ops->stats_reset)(dev);
1856 dev->data->rx_mbuf_alloc_failed = 0;
1862 get_xstats_basic_count(struct rte_eth_dev *dev)
1864 uint16_t nb_rxqs, nb_txqs;
1867 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1868 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1870 count = RTE_NB_STATS;
1871 count += nb_rxqs * RTE_NB_RXQ_STATS;
1872 count += nb_txqs * RTE_NB_TXQ_STATS;
1878 get_xstats_count(uint16_t port_id)
1880 struct rte_eth_dev *dev;
1883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1884 dev = &rte_eth_devices[port_id];
1885 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1886 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1889 return eth_err(port_id, count);
1891 if (dev->dev_ops->xstats_get_names != NULL) {
1892 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1894 return eth_err(port_id, count);
1899 count += get_xstats_basic_count(dev);
1905 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1908 int cnt_xstats, idx_xstat;
1910 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1913 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1918 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1923 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1924 if (cnt_xstats < 0) {
1925 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1929 /* Get id-name lookup table */
1930 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1932 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1933 port_id, xstats_names, cnt_xstats, NULL)) {
1934 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1938 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1939 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1948 /* retrieve basic stats names */
1950 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1951 struct rte_eth_xstat_name *xstats_names)
1953 int cnt_used_entries = 0;
1954 uint32_t idx, id_queue;
1957 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1958 snprintf(xstats_names[cnt_used_entries].name,
1959 sizeof(xstats_names[0].name),
1960 "%s", rte_stats_strings[idx].name);
1963 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1964 for (id_queue = 0; id_queue < num_q; id_queue++) {
1965 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1966 snprintf(xstats_names[cnt_used_entries].name,
1967 sizeof(xstats_names[0].name),
1969 id_queue, rte_rxq_stats_strings[idx].name);
1974 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1975 for (id_queue = 0; id_queue < num_q; id_queue++) {
1976 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1977 snprintf(xstats_names[cnt_used_entries].name,
1978 sizeof(xstats_names[0].name),
1980 id_queue, rte_txq_stats_strings[idx].name);
1984 return cnt_used_entries;
1987 /* retrieve ethdev extended statistics names */
1989 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1990 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1993 struct rte_eth_xstat_name *xstats_names_copy;
1994 unsigned int no_basic_stat_requested = 1;
1995 unsigned int no_ext_stat_requested = 1;
1996 unsigned int expected_entries;
1997 unsigned int basic_count;
1998 struct rte_eth_dev *dev;
2002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2003 dev = &rte_eth_devices[port_id];
2005 basic_count = get_xstats_basic_count(dev);
2006 ret = get_xstats_count(port_id);
2009 expected_entries = (unsigned int)ret;
2011 /* Return max number of stats if no ids given */
2014 return expected_entries;
2015 else if (xstats_names && size < expected_entries)
2016 return expected_entries;
2019 if (ids && !xstats_names)
2022 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2023 uint64_t ids_copy[size];
2025 for (i = 0; i < size; i++) {
2026 if (ids[i] < basic_count) {
2027 no_basic_stat_requested = 0;
2032 * Convert ids to xstats ids that PMD knows.
2033 * ids known by user are basic + extended stats.
2035 ids_copy[i] = ids[i] - basic_count;
2038 if (no_basic_stat_requested)
2039 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2040 xstats_names, ids_copy, size);
2043 /* Retrieve all stats */
2045 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2047 if (num_stats < 0 || num_stats > (int)expected_entries)
2050 return expected_entries;
2053 xstats_names_copy = calloc(expected_entries,
2054 sizeof(struct rte_eth_xstat_name));
2056 if (!xstats_names_copy) {
2057 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2062 for (i = 0; i < size; i++) {
2063 if (ids[i] >= basic_count) {
2064 no_ext_stat_requested = 0;
2070 /* Fill xstats_names_copy structure */
2071 if (ids && no_ext_stat_requested) {
2072 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2074 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2077 free(xstats_names_copy);
2083 for (i = 0; i < size; i++) {
2084 if (ids[i] >= expected_entries) {
2085 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2086 free(xstats_names_copy);
2089 xstats_names[i] = xstats_names_copy[ids[i]];
2092 free(xstats_names_copy);
2097 rte_eth_xstats_get_names(uint16_t port_id,
2098 struct rte_eth_xstat_name *xstats_names,
2101 struct rte_eth_dev *dev;
2102 int cnt_used_entries;
2103 int cnt_expected_entries;
2104 int cnt_driver_entries;
2106 cnt_expected_entries = get_xstats_count(port_id);
2107 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2108 (int)size < cnt_expected_entries)
2109 return cnt_expected_entries;
2111 /* port_id checked in get_xstats_count() */
2112 dev = &rte_eth_devices[port_id];
2114 cnt_used_entries = rte_eth_basic_stats_get_names(
2117 if (dev->dev_ops->xstats_get_names != NULL) {
2118 /* If there are any driver-specific xstats, append them
2121 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2123 xstats_names + cnt_used_entries,
2124 size - cnt_used_entries);
2125 if (cnt_driver_entries < 0)
2126 return eth_err(port_id, cnt_driver_entries);
2127 cnt_used_entries += cnt_driver_entries;
2130 return cnt_used_entries;
2135 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2137 struct rte_eth_dev *dev;
2138 struct rte_eth_stats eth_stats;
2139 unsigned int count = 0, i, q;
2140 uint64_t val, *stats_ptr;
2141 uint16_t nb_rxqs, nb_txqs;
2144 ret = rte_eth_stats_get(port_id, ð_stats);
2148 dev = &rte_eth_devices[port_id];
2150 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2151 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2154 for (i = 0; i < RTE_NB_STATS; i++) {
2155 stats_ptr = RTE_PTR_ADD(ð_stats,
2156 rte_stats_strings[i].offset);
2158 xstats[count++].value = val;
2162 for (q = 0; q < nb_rxqs; q++) {
2163 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2164 stats_ptr = RTE_PTR_ADD(ð_stats,
2165 rte_rxq_stats_strings[i].offset +
2166 q * sizeof(uint64_t));
2168 xstats[count++].value = val;
2173 for (q = 0; q < nb_txqs; q++) {
2174 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2175 stats_ptr = RTE_PTR_ADD(ð_stats,
2176 rte_txq_stats_strings[i].offset +
2177 q * sizeof(uint64_t));
2179 xstats[count++].value = val;
2185 /* retrieve ethdev extended statistics */
2187 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2188 uint64_t *values, unsigned int size)
2190 unsigned int no_basic_stat_requested = 1;
2191 unsigned int no_ext_stat_requested = 1;
2192 unsigned int num_xstats_filled;
2193 unsigned int basic_count;
2194 uint16_t expected_entries;
2195 struct rte_eth_dev *dev;
2199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2200 ret = get_xstats_count(port_id);
2203 expected_entries = (uint16_t)ret;
2204 struct rte_eth_xstat xstats[expected_entries];
2205 dev = &rte_eth_devices[port_id];
2206 basic_count = get_xstats_basic_count(dev);
2208 /* Return max number of stats if no ids given */
2211 return expected_entries;
2212 else if (values && size < expected_entries)
2213 return expected_entries;
2219 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2220 unsigned int basic_count = get_xstats_basic_count(dev);
2221 uint64_t ids_copy[size];
2223 for (i = 0; i < size; i++) {
2224 if (ids[i] < basic_count) {
2225 no_basic_stat_requested = 0;
2230 * Convert ids to xstats ids that PMD knows.
2231 * ids known by user are basic + extended stats.
2233 ids_copy[i] = ids[i] - basic_count;
2236 if (no_basic_stat_requested)
2237 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2242 for (i = 0; i < size; i++) {
2243 if (ids[i] >= basic_count) {
2244 no_ext_stat_requested = 0;
2250 /* Fill the xstats structure */
2251 if (ids && no_ext_stat_requested)
2252 ret = rte_eth_basic_stats_get(port_id, xstats);
2254 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2258 num_xstats_filled = (unsigned int)ret;
2260 /* Return all stats */
2262 for (i = 0; i < num_xstats_filled; i++)
2263 values[i] = xstats[i].value;
2264 return expected_entries;
2268 for (i = 0; i < size; i++) {
2269 if (ids[i] >= expected_entries) {
2270 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2273 values[i] = xstats[ids[i]].value;
2279 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2282 struct rte_eth_dev *dev;
2283 unsigned int count = 0, i;
2284 signed int xcount = 0;
2285 uint16_t nb_rxqs, nb_txqs;
2288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2290 dev = &rte_eth_devices[port_id];
2292 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2293 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2295 /* Return generic statistics */
2296 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2297 (nb_txqs * RTE_NB_TXQ_STATS);
2299 /* implemented by the driver */
2300 if (dev->dev_ops->xstats_get != NULL) {
2301 /* Retrieve the xstats from the driver at the end of the
2304 xcount = (*dev->dev_ops->xstats_get)(dev,
2305 xstats ? xstats + count : NULL,
2306 (n > count) ? n - count : 0);
2309 return eth_err(port_id, xcount);
2312 if (n < count + xcount || xstats == NULL)
2313 return count + xcount;
2315 /* now fill the xstats structure */
2316 ret = rte_eth_basic_stats_get(port_id, xstats);
2321 for (i = 0; i < count; i++)
2323 /* add an offset to driver-specific stats */
2324 for ( ; i < count + xcount; i++)
2325 xstats[i].id += count;
2327 return count + xcount;
2330 /* reset ethdev extended statistics */
2332 rte_eth_xstats_reset(uint16_t port_id)
2334 struct rte_eth_dev *dev;
2336 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2337 dev = &rte_eth_devices[port_id];
2339 /* implemented by the driver */
2340 if (dev->dev_ops->xstats_reset != NULL) {
2341 (*dev->dev_ops->xstats_reset)(dev);
2345 /* fallback to default */
2346 rte_eth_stats_reset(port_id);
2350 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2353 struct rte_eth_dev *dev;
2355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2357 dev = &rte_eth_devices[port_id];
2359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2361 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2364 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2367 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2370 return (*dev->dev_ops->queue_stats_mapping_set)
2371 (dev, queue_id, stat_idx, is_rx);
2376 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2379 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2380 stat_idx, STAT_QMAP_TX));
2385 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2388 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2389 stat_idx, STAT_QMAP_RX));
2393 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2395 struct rte_eth_dev *dev;
2397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2398 dev = &rte_eth_devices[port_id];
2400 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2401 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2402 fw_version, fw_size));
2406 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2408 struct rte_eth_dev *dev;
2409 const struct rte_eth_desc_lim lim = {
2410 .nb_max = UINT16_MAX,
2415 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2416 dev = &rte_eth_devices[port_id];
2418 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2419 dev_info->rx_desc_lim = lim;
2420 dev_info->tx_desc_lim = lim;
2421 dev_info->device = dev->device;
2423 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2424 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2425 dev_info->driver_name = dev->device->driver->name;
2426 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2427 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2429 dev_info->dev_flags = &dev->data->dev_flags;
2433 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2434 uint32_t *ptypes, int num)
2437 struct rte_eth_dev *dev;
2438 const uint32_t *all_ptypes;
2440 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2441 dev = &rte_eth_devices[port_id];
2442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2443 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2448 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2449 if (all_ptypes[i] & ptype_mask) {
2451 ptypes[j] = all_ptypes[i];
2459 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2461 struct rte_eth_dev *dev;
2463 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2464 dev = &rte_eth_devices[port_id];
2465 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2470 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2472 struct rte_eth_dev *dev;
2474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2476 dev = &rte_eth_devices[port_id];
2477 *mtu = dev->data->mtu;
2482 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2485 struct rte_eth_dev *dev;
2487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2488 dev = &rte_eth_devices[port_id];
2489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2491 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2493 dev->data->mtu = mtu;
2495 return eth_err(port_id, ret);
2499 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2501 struct rte_eth_dev *dev;
2504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2505 dev = &rte_eth_devices[port_id];
2506 if (!(dev->data->dev_conf.rxmode.offloads &
2507 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2508 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2513 if (vlan_id > 4095) {
2514 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2518 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2520 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2522 struct rte_vlan_filter_conf *vfc;
2526 vfc = &dev->data->vlan_filter_conf;
2527 vidx = vlan_id / 64;
2528 vbit = vlan_id % 64;
2531 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2533 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2536 return eth_err(port_id, ret);
2540 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2543 struct rte_eth_dev *dev;
2545 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2546 dev = &rte_eth_devices[port_id];
2547 if (rx_queue_id >= dev->data->nb_rx_queues) {
2548 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2553 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2559 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2560 enum rte_vlan_type vlan_type,
2563 struct rte_eth_dev *dev;
2565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2566 dev = &rte_eth_devices[port_id];
2567 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2569 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2574 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2576 struct rte_eth_dev *dev;
2580 uint64_t orig_offloads;
2582 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2583 dev = &rte_eth_devices[port_id];
2585 /* save original values in case of failure */
2586 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2588 /*check which option changed by application*/
2589 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2590 org = !!(dev->data->dev_conf.rxmode.offloads &
2591 DEV_RX_OFFLOAD_VLAN_STRIP);
2594 dev->data->dev_conf.rxmode.offloads |=
2595 DEV_RX_OFFLOAD_VLAN_STRIP;
2597 dev->data->dev_conf.rxmode.offloads &=
2598 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2599 mask |= ETH_VLAN_STRIP_MASK;
2602 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2603 org = !!(dev->data->dev_conf.rxmode.offloads &
2604 DEV_RX_OFFLOAD_VLAN_FILTER);
2607 dev->data->dev_conf.rxmode.offloads |=
2608 DEV_RX_OFFLOAD_VLAN_FILTER;
2610 dev->data->dev_conf.rxmode.offloads &=
2611 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2612 mask |= ETH_VLAN_FILTER_MASK;
2615 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2616 org = !!(dev->data->dev_conf.rxmode.offloads &
2617 DEV_RX_OFFLOAD_VLAN_EXTEND);
2620 dev->data->dev_conf.rxmode.offloads |=
2621 DEV_RX_OFFLOAD_VLAN_EXTEND;
2623 dev->data->dev_conf.rxmode.offloads &=
2624 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2625 mask |= ETH_VLAN_EXTEND_MASK;
2632 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2633 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2635 /* hit an error restore original values */
2636 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2639 return eth_err(port_id, ret);
2643 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2645 struct rte_eth_dev *dev;
2648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2649 dev = &rte_eth_devices[port_id];
2651 if (dev->data->dev_conf.rxmode.offloads &
2652 DEV_RX_OFFLOAD_VLAN_STRIP)
2653 ret |= ETH_VLAN_STRIP_OFFLOAD;
2655 if (dev->data->dev_conf.rxmode.offloads &
2656 DEV_RX_OFFLOAD_VLAN_FILTER)
2657 ret |= ETH_VLAN_FILTER_OFFLOAD;
2659 if (dev->data->dev_conf.rxmode.offloads &
2660 DEV_RX_OFFLOAD_VLAN_EXTEND)
2661 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2667 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2669 struct rte_eth_dev *dev;
2671 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2672 dev = &rte_eth_devices[port_id];
2673 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2675 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2679 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2681 struct rte_eth_dev *dev;
2683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2684 dev = &rte_eth_devices[port_id];
2685 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2686 memset(fc_conf, 0, sizeof(*fc_conf));
2687 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2691 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2693 struct rte_eth_dev *dev;
2695 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2696 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2697 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2701 dev = &rte_eth_devices[port_id];
2702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2703 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2707 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2708 struct rte_eth_pfc_conf *pfc_conf)
2710 struct rte_eth_dev *dev;
2712 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2713 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2714 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2718 dev = &rte_eth_devices[port_id];
2719 /* High water, low water validation are device specific */
2720 if (*dev->dev_ops->priority_flow_ctrl_set)
2721 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2727 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2735 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2736 for (i = 0; i < num; i++) {
2737 if (reta_conf[i].mask)
2745 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2749 uint16_t i, idx, shift;
2755 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2759 for (i = 0; i < reta_size; i++) {
2760 idx = i / RTE_RETA_GROUP_SIZE;
2761 shift = i % RTE_RETA_GROUP_SIZE;
2762 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2763 (reta_conf[idx].reta[shift] >= max_rxq)) {
2765 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2767 reta_conf[idx].reta[shift], max_rxq);
2776 rte_eth_dev_rss_reta_update(uint16_t port_id,
2777 struct rte_eth_rss_reta_entry64 *reta_conf,
2780 struct rte_eth_dev *dev;
2783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2784 /* Check mask bits */
2785 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2789 dev = &rte_eth_devices[port_id];
2791 /* Check entry value */
2792 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2793 dev->data->nb_rx_queues);
2797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2798 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2803 rte_eth_dev_rss_reta_query(uint16_t port_id,
2804 struct rte_eth_rss_reta_entry64 *reta_conf,
2807 struct rte_eth_dev *dev;
2810 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2812 /* Check mask bits */
2813 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2817 dev = &rte_eth_devices[port_id];
2818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2819 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2824 rte_eth_dev_rss_hash_update(uint16_t port_id,
2825 struct rte_eth_rss_conf *rss_conf)
2827 struct rte_eth_dev *dev;
2828 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2831 dev = &rte_eth_devices[port_id];
2832 rte_eth_dev_info_get(port_id, &dev_info);
2833 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2834 dev_info.flow_type_rss_offloads) {
2836 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2837 port_id, rss_conf->rss_hf,
2838 dev_info.flow_type_rss_offloads);
2841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2842 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2847 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2848 struct rte_eth_rss_conf *rss_conf)
2850 struct rte_eth_dev *dev;
2852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2853 dev = &rte_eth_devices[port_id];
2854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2855 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2860 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2861 struct rte_eth_udp_tunnel *udp_tunnel)
2863 struct rte_eth_dev *dev;
2865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2866 if (udp_tunnel == NULL) {
2867 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2871 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2872 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2876 dev = &rte_eth_devices[port_id];
2877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2878 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2883 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2884 struct rte_eth_udp_tunnel *udp_tunnel)
2886 struct rte_eth_dev *dev;
2888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2889 dev = &rte_eth_devices[port_id];
2891 if (udp_tunnel == NULL) {
2892 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2896 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2897 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2902 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2907 rte_eth_led_on(uint16_t port_id)
2909 struct rte_eth_dev *dev;
2911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2912 dev = &rte_eth_devices[port_id];
2913 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2914 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2918 rte_eth_led_off(uint16_t port_id)
2920 struct rte_eth_dev *dev;
2922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2923 dev = &rte_eth_devices[port_id];
2924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2925 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2929 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2933 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2935 struct rte_eth_dev_info dev_info;
2936 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2940 rte_eth_dev_info_get(port_id, &dev_info);
2942 for (i = 0; i < dev_info.max_mac_addrs; i++)
2943 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2949 static const struct ether_addr null_mac_addr;
2952 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2955 struct rte_eth_dev *dev;
2960 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2961 dev = &rte_eth_devices[port_id];
2962 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2964 if (is_zero_ether_addr(addr)) {
2965 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2969 if (pool >= ETH_64_POOLS) {
2970 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2974 index = get_mac_addr_index(port_id, addr);
2976 index = get_mac_addr_index(port_id, &null_mac_addr);
2978 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2983 pool_mask = dev->data->mac_pool_sel[index];
2985 /* Check if both MAC address and pool is already there, and do nothing */
2986 if (pool_mask & (1ULL << pool))
2991 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2994 /* Update address in NIC data structure */
2995 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2997 /* Update pool bitmap in NIC data structure */
2998 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3001 return eth_err(port_id, ret);
3005 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3007 struct rte_eth_dev *dev;
3010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3011 dev = &rte_eth_devices[port_id];
3012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3014 index = get_mac_addr_index(port_id, addr);
3017 "Port %u: Cannot remove default MAC address\n",
3020 } else if (index < 0)
3021 return 0; /* Do nothing if address wasn't found */
3024 (*dev->dev_ops->mac_addr_remove)(dev, index);
3026 /* Update address in NIC data structure */
3027 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3029 /* reset pool bitmap */
3030 dev->data->mac_pool_sel[index] = 0;
3036 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3038 struct rte_eth_dev *dev;
3041 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3043 if (!is_valid_assigned_ether_addr(addr))
3046 dev = &rte_eth_devices[port_id];
3047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3049 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3053 /* Update default address in NIC data structure */
3054 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3061 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3065 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3067 struct rte_eth_dev_info dev_info;
3068 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3071 rte_eth_dev_info_get(port_id, &dev_info);
3072 if (!dev->data->hash_mac_addrs)
3075 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3076 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3077 ETHER_ADDR_LEN) == 0)
3084 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3089 struct rte_eth_dev *dev;
3091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3093 dev = &rte_eth_devices[port_id];
3094 if (is_zero_ether_addr(addr)) {
3095 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3100 index = get_hash_mac_addr_index(port_id, addr);
3101 /* Check if it's already there, and do nothing */
3102 if ((index >= 0) && on)
3108 "Port %u: the MAC address was not set in UTA\n",
3113 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3115 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3122 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3124 /* Update address in NIC data structure */
3126 ether_addr_copy(addr,
3127 &dev->data->hash_mac_addrs[index]);
3129 ether_addr_copy(&null_mac_addr,
3130 &dev->data->hash_mac_addrs[index]);
3133 return eth_err(port_id, ret);
3137 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3139 struct rte_eth_dev *dev;
3141 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3143 dev = &rte_eth_devices[port_id];
3145 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3146 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3150 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3153 struct rte_eth_dev *dev;
3154 struct rte_eth_dev_info dev_info;
3155 struct rte_eth_link link;
3157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3159 dev = &rte_eth_devices[port_id];
3160 rte_eth_dev_info_get(port_id, &dev_info);
3161 link = dev->data->dev_link;
3163 if (queue_idx > dev_info.max_tx_queues) {
3165 "Set queue rate limit:port %u: invalid queue id=%u\n",
3166 port_id, queue_idx);
3170 if (tx_rate > link.link_speed) {
3172 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3173 tx_rate, link.link_speed);
3177 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3178 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3179 queue_idx, tx_rate));
3183 rte_eth_mirror_rule_set(uint16_t port_id,
3184 struct rte_eth_mirror_conf *mirror_conf,
3185 uint8_t rule_id, uint8_t on)
3187 struct rte_eth_dev *dev;
3189 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3190 if (mirror_conf->rule_type == 0) {
3191 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3195 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3196 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3201 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3202 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3203 (mirror_conf->pool_mask == 0)) {
3205 "Invalid mirror pool, pool mask can not be 0\n");
3209 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3210 mirror_conf->vlan.vlan_mask == 0) {
3212 "Invalid vlan mask, vlan mask can not be 0\n");
3216 dev = &rte_eth_devices[port_id];
3217 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3219 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3220 mirror_conf, rule_id, on));
3224 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3226 struct rte_eth_dev *dev;
3228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3230 dev = &rte_eth_devices[port_id];
3231 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3233 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3237 RTE_INIT(eth_dev_init_cb_lists)
3241 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3242 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3246 rte_eth_dev_callback_register(uint16_t port_id,
3247 enum rte_eth_event_type event,
3248 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3250 struct rte_eth_dev *dev;
3251 struct rte_eth_dev_callback *user_cb;
3252 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3258 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3259 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3263 if (port_id == RTE_ETH_ALL) {
3265 last_port = RTE_MAX_ETHPORTS - 1;
3267 next_port = last_port = port_id;
3270 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3273 dev = &rte_eth_devices[next_port];
3275 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3276 if (user_cb->cb_fn == cb_fn &&
3277 user_cb->cb_arg == cb_arg &&
3278 user_cb->event == event) {
3283 /* create a new callback. */
3284 if (user_cb == NULL) {
3285 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3286 sizeof(struct rte_eth_dev_callback), 0);
3287 if (user_cb != NULL) {
3288 user_cb->cb_fn = cb_fn;
3289 user_cb->cb_arg = cb_arg;
3290 user_cb->event = event;
3291 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3294 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3295 rte_eth_dev_callback_unregister(port_id, event,
3301 } while (++next_port <= last_port);
3303 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3308 rte_eth_dev_callback_unregister(uint16_t port_id,
3309 enum rte_eth_event_type event,
3310 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3313 struct rte_eth_dev *dev;
3314 struct rte_eth_dev_callback *cb, *next;
3315 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3321 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3322 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3326 if (port_id == RTE_ETH_ALL) {
3328 last_port = RTE_MAX_ETHPORTS - 1;
3330 next_port = last_port = port_id;
3333 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3336 dev = &rte_eth_devices[next_port];
3338 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3341 next = TAILQ_NEXT(cb, next);
3343 if (cb->cb_fn != cb_fn || cb->event != event ||
3344 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3348 * if this callback is not executing right now,
3351 if (cb->active == 0) {
3352 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3358 } while (++next_port <= last_port);
3360 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3365 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3366 enum rte_eth_event_type event, void *ret_param)
3368 struct rte_eth_dev_callback *cb_lst;
3369 struct rte_eth_dev_callback dev_cb;
3372 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3373 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3374 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3378 if (ret_param != NULL)
3379 dev_cb.ret_param = ret_param;
3381 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3382 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3383 dev_cb.cb_arg, dev_cb.ret_param);
3384 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3387 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3392 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3397 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3399 dev->state = RTE_ETH_DEV_ATTACHED;
3403 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3406 struct rte_eth_dev *dev;
3407 struct rte_intr_handle *intr_handle;
3411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3413 dev = &rte_eth_devices[port_id];
3415 if (!dev->intr_handle) {
3416 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3420 intr_handle = dev->intr_handle;
3421 if (!intr_handle->intr_vec) {
3422 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3426 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3427 vec = intr_handle->intr_vec[qid];
3428 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3429 if (rc && rc != -EEXIST) {
3431 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3432 port_id, qid, op, epfd, vec);
3439 int __rte_experimental
3440 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3442 struct rte_intr_handle *intr_handle;
3443 struct rte_eth_dev *dev;
3444 unsigned int efd_idx;
3448 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3450 dev = &rte_eth_devices[port_id];
3452 if (queue_id >= dev->data->nb_rx_queues) {
3453 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3457 if (!dev->intr_handle) {
3458 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3462 intr_handle = dev->intr_handle;
3463 if (!intr_handle->intr_vec) {
3464 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3468 vec = intr_handle->intr_vec[queue_id];
3469 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3470 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3471 fd = intr_handle->efds[efd_idx];
3476 const struct rte_memzone *
3477 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3478 uint16_t queue_id, size_t size, unsigned align,
3481 char z_name[RTE_MEMZONE_NAMESIZE];
3482 const struct rte_memzone *mz;
3484 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3485 dev->device->driver->name, ring_name,
3486 dev->data->port_id, queue_id);
3488 mz = rte_memzone_lookup(z_name);
3492 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3493 RTE_MEMZONE_IOVA_CONTIG, align);
3496 int __rte_experimental
3497 rte_eth_dev_create(struct rte_device *device, const char *name,
3498 size_t priv_data_size,
3499 ethdev_bus_specific_init ethdev_bus_specific_init,
3500 void *bus_init_params,
3501 ethdev_init_t ethdev_init, void *init_params)
3503 struct rte_eth_dev *ethdev;
3506 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3508 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3509 ethdev = rte_eth_dev_allocate(name);
3513 if (priv_data_size) {
3514 ethdev->data->dev_private = rte_zmalloc_socket(
3515 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3518 if (!ethdev->data->dev_private) {
3519 RTE_LOG(ERR, EAL, "failed to allocate private data");
3521 goto data_alloc_failed;
3525 ethdev = rte_eth_dev_attach_secondary(name);
3527 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3528 "ethdev doesn't exist");
3533 ethdev->device = device;
3535 if (ethdev_bus_specific_init) {
3536 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3539 "ethdev bus specific initialisation failed");
3544 retval = ethdev_init(ethdev, init_params);
3546 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3550 rte_eth_dev_probing_finish(ethdev);
3554 /* free ports private data if primary process */
3555 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3556 rte_free(ethdev->data->dev_private);
3559 rte_eth_dev_release_port(ethdev);
3564 int __rte_experimental
3565 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3566 ethdev_uninit_t ethdev_uninit)
3570 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3574 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3575 if (ethdev_uninit) {
3576 ret = ethdev_uninit(ethdev);
3581 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3582 rte_free(ethdev->data->dev_private);
3584 ethdev->data->dev_private = NULL;
3586 return rte_eth_dev_release_port(ethdev);
3590 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3591 int epfd, int op, void *data)
3594 struct rte_eth_dev *dev;
3595 struct rte_intr_handle *intr_handle;
3598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3600 dev = &rte_eth_devices[port_id];
3601 if (queue_id >= dev->data->nb_rx_queues) {
3602 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3606 if (!dev->intr_handle) {
3607 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3611 intr_handle = dev->intr_handle;
3612 if (!intr_handle->intr_vec) {
3613 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3617 vec = intr_handle->intr_vec[queue_id];
3618 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3619 if (rc && rc != -EEXIST) {
3621 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3622 port_id, queue_id, op, epfd, vec);
3630 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3633 struct rte_eth_dev *dev;
3635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3637 dev = &rte_eth_devices[port_id];
3639 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3640 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3645 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3648 struct rte_eth_dev *dev;
3650 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3652 dev = &rte_eth_devices[port_id];
3654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3655 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3661 rte_eth_dev_filter_supported(uint16_t port_id,
3662 enum rte_filter_type filter_type)
3664 struct rte_eth_dev *dev;
3666 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3668 dev = &rte_eth_devices[port_id];
3669 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3670 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3671 RTE_ETH_FILTER_NOP, NULL);
3675 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3676 enum rte_filter_op filter_op, void *arg)
3678 struct rte_eth_dev *dev;
3680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3682 dev = &rte_eth_devices[port_id];
3683 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3684 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3688 const struct rte_eth_rxtx_callback *
3689 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3690 rte_rx_callback_fn fn, void *user_param)
3692 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3693 rte_errno = ENOTSUP;
3696 /* check input parameters */
3697 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3698 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3702 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3710 cb->param = user_param;
3712 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3713 /* Add the callbacks in fifo order. */
3714 struct rte_eth_rxtx_callback *tail =
3715 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3718 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3725 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3730 const struct rte_eth_rxtx_callback *
3731 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3732 rte_rx_callback_fn fn, void *user_param)
3734 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3735 rte_errno = ENOTSUP;
3738 /* check input parameters */
3739 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3740 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3745 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3753 cb->param = user_param;
3755 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3756 /* Add the callbacks at fisrt position*/
3757 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3759 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3760 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3765 const struct rte_eth_rxtx_callback *
3766 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3767 rte_tx_callback_fn fn, void *user_param)
3769 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3770 rte_errno = ENOTSUP;
3773 /* check input parameters */
3774 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3775 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3780 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3788 cb->param = user_param;
3790 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3791 /* Add the callbacks in fifo order. */
3792 struct rte_eth_rxtx_callback *tail =
3793 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3796 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3803 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3809 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3810 const struct rte_eth_rxtx_callback *user_cb)
3812 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3815 /* Check input parameters. */
3816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3817 if (user_cb == NULL ||
3818 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3821 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3822 struct rte_eth_rxtx_callback *cb;
3823 struct rte_eth_rxtx_callback **prev_cb;
3826 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3827 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3828 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3830 if (cb == user_cb) {
3831 /* Remove the user cb from the callback list. */
3832 *prev_cb = cb->next;
3837 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3843 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3844 const struct rte_eth_rxtx_callback *user_cb)
3846 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3849 /* Check input parameters. */
3850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3851 if (user_cb == NULL ||
3852 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3855 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3857 struct rte_eth_rxtx_callback *cb;
3858 struct rte_eth_rxtx_callback **prev_cb;
3860 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3861 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3862 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3864 if (cb == user_cb) {
3865 /* Remove the user cb from the callback list. */
3866 *prev_cb = cb->next;
3871 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3877 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3878 struct rte_eth_rxq_info *qinfo)
3880 struct rte_eth_dev *dev;
3882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3887 dev = &rte_eth_devices[port_id];
3888 if (queue_id >= dev->data->nb_rx_queues) {
3889 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3893 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3895 memset(qinfo, 0, sizeof(*qinfo));
3896 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3901 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3902 struct rte_eth_txq_info *qinfo)
3904 struct rte_eth_dev *dev;
3906 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3911 dev = &rte_eth_devices[port_id];
3912 if (queue_id >= dev->data->nb_tx_queues) {
3913 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3919 memset(qinfo, 0, sizeof(*qinfo));
3920 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3926 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3927 struct ether_addr *mc_addr_set,
3928 uint32_t nb_mc_addr)
3930 struct rte_eth_dev *dev;
3932 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3934 dev = &rte_eth_devices[port_id];
3935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3936 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3937 mc_addr_set, nb_mc_addr));
3941 rte_eth_timesync_enable(uint16_t port_id)
3943 struct rte_eth_dev *dev;
3945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3946 dev = &rte_eth_devices[port_id];
3948 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3949 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3953 rte_eth_timesync_disable(uint16_t port_id)
3955 struct rte_eth_dev *dev;
3957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3958 dev = &rte_eth_devices[port_id];
3960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3961 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3965 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3968 struct rte_eth_dev *dev;
3970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3971 dev = &rte_eth_devices[port_id];
3973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3974 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3975 (dev, timestamp, flags));
3979 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3980 struct timespec *timestamp)
3982 struct rte_eth_dev *dev;
3984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3985 dev = &rte_eth_devices[port_id];
3987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3988 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3993 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3995 struct rte_eth_dev *dev;
3997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3998 dev = &rte_eth_devices[port_id];
4000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4001 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4006 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4008 struct rte_eth_dev *dev;
4010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4011 dev = &rte_eth_devices[port_id];
4013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4014 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4019 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4021 struct rte_eth_dev *dev;
4023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4024 dev = &rte_eth_devices[port_id];
4026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4027 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4032 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4034 struct rte_eth_dev *dev;
4036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4038 dev = &rte_eth_devices[port_id];
4039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4040 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4044 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4046 struct rte_eth_dev *dev;
4048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4050 dev = &rte_eth_devices[port_id];
4051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4052 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4056 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4058 struct rte_eth_dev *dev;
4060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4062 dev = &rte_eth_devices[port_id];
4063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4064 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4068 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4070 struct rte_eth_dev *dev;
4072 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4074 dev = &rte_eth_devices[port_id];
4075 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4076 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4079 int __rte_experimental
4080 rte_eth_dev_get_module_info(uint16_t port_id,
4081 struct rte_eth_dev_module_info *modinfo)
4083 struct rte_eth_dev *dev;
4085 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4087 dev = &rte_eth_devices[port_id];
4088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4089 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4092 int __rte_experimental
4093 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4094 struct rte_dev_eeprom_info *info)
4096 struct rte_eth_dev *dev;
4098 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4100 dev = &rte_eth_devices[port_id];
4101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4102 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4106 rte_eth_dev_get_dcb_info(uint16_t port_id,
4107 struct rte_eth_dcb_info *dcb_info)
4109 struct rte_eth_dev *dev;
4111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4113 dev = &rte_eth_devices[port_id];
4114 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4116 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4117 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4121 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4122 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4124 struct rte_eth_dev *dev;
4126 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4127 if (l2_tunnel == NULL) {
4128 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4132 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4133 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4137 dev = &rte_eth_devices[port_id];
4138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4140 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4145 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4146 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4150 struct rte_eth_dev *dev;
4152 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4154 if (l2_tunnel == NULL) {
4155 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4159 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4160 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4165 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4169 dev = &rte_eth_devices[port_id];
4170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4172 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4173 l2_tunnel, mask, en));
4177 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4178 const struct rte_eth_desc_lim *desc_lim)
4180 if (desc_lim->nb_align != 0)
4181 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4183 if (desc_lim->nb_max != 0)
4184 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4186 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4190 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4191 uint16_t *nb_rx_desc,
4192 uint16_t *nb_tx_desc)
4194 struct rte_eth_dev *dev;
4195 struct rte_eth_dev_info dev_info;
4197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4199 dev = &rte_eth_devices[port_id];
4200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4202 rte_eth_dev_info_get(port_id, &dev_info);
4204 if (nb_rx_desc != NULL)
4205 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4207 if (nb_tx_desc != NULL)
4208 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4214 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4216 struct rte_eth_dev *dev;
4218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4223 dev = &rte_eth_devices[port_id];
4225 if (*dev->dev_ops->pool_ops_supported == NULL)
4226 return 1; /* all pools are supported */
4228 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4232 * A set of values to describe the possible states of a switch domain.
4234 enum rte_eth_switch_domain_state {
4235 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4236 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4240 * Array of switch domains available for allocation. Array is sized to
4241 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4242 * ethdev ports in a single process.
4244 struct rte_eth_dev_switch {
4245 enum rte_eth_switch_domain_state state;
4246 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4248 int __rte_experimental
4249 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4253 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4255 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4256 i < RTE_MAX_ETHPORTS; i++) {
4257 if (rte_eth_switch_domains[i].state ==
4258 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4259 rte_eth_switch_domains[i].state =
4260 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4269 int __rte_experimental
4270 rte_eth_switch_domain_free(uint16_t domain_id)
4272 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4273 domain_id >= RTE_MAX_ETHPORTS)
4276 if (rte_eth_switch_domains[domain_id].state !=
4277 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4280 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4285 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4288 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4291 struct rte_kvargs_pair *pair;
4294 arglist->str = strdup(str_in);
4295 if (arglist->str == NULL)
4298 letter = arglist->str;
4301 pair = &arglist->pairs[0];
4304 case 0: /* Initial */
4307 else if (*letter == '\0')
4314 case 1: /* Parsing key */
4315 if (*letter == '=') {
4317 pair->value = letter + 1;
4319 } else if (*letter == ',' || *letter == '\0')
4324 case 2: /* Parsing value */
4327 else if (*letter == ',') {
4330 pair = &arglist->pairs[arglist->count];
4332 } else if (*letter == '\0') {
4335 pair = &arglist->pairs[arglist->count];
4340 case 3: /* Parsing list */
4343 else if (*letter == '\0')
4352 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4360 /* Single element, not a list */
4361 return callback(str, data);
4363 /* Sanity check, then strip the brackets */
4364 str_start = &str[strlen(str) - 1];
4365 if (*str_start != ']') {
4366 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4372 /* Process list elements */
4382 } else if (state == 1) {
4383 if (*str == ',' || *str == '\0') {
4384 if (str > str_start) {
4385 /* Non-empty string fragment */
4387 result = callback(str_start, data);
4400 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4401 const uint16_t max_list)
4403 uint16_t lo, hi, val;
4406 result = sscanf(str, "%hu-%hu", &lo, &hi);
4408 if (*len_list >= max_list)
4410 list[(*len_list)++] = lo;
4411 } else if (result == 2) {
4412 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4414 for (val = lo; val <= hi; val++) {
4415 if (*len_list >= max_list)
4417 list[(*len_list)++] = val;
4426 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4428 struct rte_eth_devargs *eth_da = data;
4430 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4431 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4434 int __rte_experimental
4435 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4437 struct rte_kvargs args;
4438 struct rte_kvargs_pair *pair;
4442 memset(eth_da, 0, sizeof(*eth_da));
4444 result = rte_eth_devargs_tokenise(&args, dargs);
4448 for (i = 0; i < args.count; i++) {
4449 pair = &args.pairs[i];
4450 if (strcmp("representor", pair->key) == 0) {
4451 result = rte_eth_devargs_parse_list(pair->value,
4452 rte_eth_devargs_parse_representor_ports,
4466 RTE_INIT(ethdev_init_log)
4468 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4469 if (rte_eth_dev_logtype >= 0)
4470 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);