1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
132 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
135 #undef RTE_RX_OFFLOAD_BIT2STR
137 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
138 { DEV_TX_OFFLOAD_##_name, #_name }
140 static const struct {
143 } rte_tx_offload_names[] = {
144 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
145 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
152 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
153 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
158 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
159 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
160 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
161 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 * Macro to iterate over all valid ports for internal usage.
344 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347 for (port_id = rte_eth_find_next(0); \
348 port_id < RTE_MAX_ETHPORTS; \
349 port_id = rte_eth_find_next(port_id + 1))
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
354 port_id = rte_eth_find_next(port_id);
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].device != parent)
357 port_id = rte_eth_find_next(port_id + 1);
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366 return rte_eth_find_next_of(port_id,
367 rte_eth_devices[ref_port_id].device);
371 rte_eth_dev_shared_data_prepare(void)
373 const unsigned flags = 0;
374 const struct rte_memzone *mz;
376 rte_spinlock_lock(&rte_eth_shared_data_lock);
378 if (rte_eth_dev_shared_data == NULL) {
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 /* Allocate port data and ownership shared memory. */
381 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382 sizeof(*rte_eth_dev_shared_data),
383 rte_socket_id(), flags);
385 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
387 rte_panic("Cannot allocate ethdev shared data\n");
389 rte_eth_dev_shared_data = mz->addr;
390 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391 rte_eth_dev_shared_data->next_owner_id =
392 RTE_ETH_DEV_NO_OWNER + 1;
393 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394 memset(rte_eth_dev_shared_data->data, 0,
395 sizeof(rte_eth_dev_shared_data->data));
399 rte_spinlock_unlock(&rte_eth_shared_data_lock);
403 is_allocated(const struct rte_eth_dev *ethdev)
405 return ethdev->data->name[0] != '\0';
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
413 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414 if (rte_eth_devices[i].data != NULL &&
415 strcmp(rte_eth_devices[i].data->name, name) == 0)
416 return &rte_eth_devices[i];
422 rte_eth_dev_allocated(const char *name)
424 struct rte_eth_dev *ethdev;
426 rte_eth_dev_shared_data_prepare();
428 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
430 ethdev = _rte_eth_dev_allocated(name);
432 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
438 rte_eth_dev_find_free_port(void)
442 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443 /* Using shared name field to find a free port. */
444 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445 RTE_ASSERT(rte_eth_devices[i].state ==
450 return RTE_MAX_ETHPORTS;
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
456 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
458 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
464 rte_eth_dev_allocate(const char *name)
467 struct rte_eth_dev *eth_dev = NULL;
470 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
472 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
476 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
481 rte_eth_dev_shared_data_prepare();
483 /* Synchronize port creation between primary and secondary threads. */
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 if (_rte_eth_dev_allocated(name) != NULL) {
488 "Ethernet device with name %s already allocated\n",
493 port_id = rte_eth_dev_find_free_port();
494 if (port_id == RTE_MAX_ETHPORTS) {
496 "Reached maximum number of Ethernet ports\n");
500 eth_dev = eth_dev_get(port_id);
501 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502 eth_dev->data->port_id = port_id;
503 eth_dev->data->mtu = RTE_ETHER_MTU;
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 _rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
560 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561 rte_free(eth_dev->data->rx_queues);
562 rte_free(eth_dev->data->tx_queues);
563 rte_free(eth_dev->data->mac_addrs);
564 rte_free(eth_dev->data->hash_mac_addrs);
565 rte_free(eth_dev->data->dev_private);
566 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
569 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
575 rte_eth_dev_is_valid_port(uint16_t port_id)
577 if (port_id >= RTE_MAX_ETHPORTS ||
578 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
587 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588 rte_eth_dev_shared_data->next_owner_id <= owner_id)
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
596 port_id = rte_eth_find_next(port_id);
597 while (port_id < RTE_MAX_ETHPORTS &&
598 rte_eth_devices[port_id].data->owner.id != owner_id)
599 port_id = rte_eth_find_next(port_id + 1);
605 rte_eth_dev_owner_new(uint64_t *owner_id)
607 rte_eth_dev_shared_data_prepare();
609 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
611 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
613 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619 const struct rte_eth_dev_owner *new_owner)
621 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622 struct rte_eth_dev_owner *port_owner;
624 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
630 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631 !rte_eth_is_valid_owner_id(old_owner_id)) {
633 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634 old_owner_id, new_owner->id);
638 port_owner = &rte_eth_devices[port_id].data->owner;
639 if (port_owner->id != old_owner_id) {
641 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642 port_id, port_owner->name, port_owner->id);
646 /* can not truncate (same structure) */
647 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
649 port_owner->id = new_owner->id;
651 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652 port_id, new_owner->name, new_owner->id);
658 rte_eth_dev_owner_set(const uint16_t port_id,
659 const struct rte_eth_dev_owner *owner)
663 rte_eth_dev_shared_data_prepare();
665 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
667 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
669 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
676 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
680 rte_eth_dev_shared_data_prepare();
682 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
684 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
686 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
696 rte_eth_dev_shared_data_prepare();
698 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
700 if (rte_eth_is_valid_owner_id(owner_id)) {
701 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
702 if (rte_eth_devices[port_id].data->owner.id == owner_id)
703 memset(&rte_eth_devices[port_id].data->owner, 0,
704 sizeof(struct rte_eth_dev_owner));
705 RTE_ETHDEV_LOG(NOTICE,
706 "All port owners owned by %016"PRIx64" identifier have removed\n",
710 "Invalid owner id=%016"PRIx64"\n",
715 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
721 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
724 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
726 rte_eth_dev_shared_data_prepare();
728 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
730 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
731 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
735 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
738 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
743 rte_eth_dev_socket_id(uint16_t port_id)
745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
746 return rte_eth_devices[port_id].data->numa_node;
750 rte_eth_dev_get_sec_ctx(uint16_t port_id)
752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
753 return rte_eth_devices[port_id].security_ctx;
757 rte_eth_dev_count_avail(void)
764 RTE_ETH_FOREACH_DEV(p)
771 rte_eth_dev_count_total(void)
773 uint16_t port, count = 0;
775 RTE_ETH_FOREACH_VALID_DEV(port)
782 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
789 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
793 /* shouldn't check 'rte_eth_devices[i].data',
794 * because it might be overwritten by VDEV PMD */
795 tmp = rte_eth_dev_shared_data->data[port_id].name;
801 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
806 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
810 RTE_ETH_FOREACH_VALID_DEV(pid)
811 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
820 eth_err(uint16_t port_id, int ret)
824 if (rte_eth_dev_is_removed(port_id))
830 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
832 uint16_t old_nb_queues = dev->data->nb_rx_queues;
836 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
837 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
838 sizeof(dev->data->rx_queues[0]) * nb_queues,
839 RTE_CACHE_LINE_SIZE);
840 if (dev->data->rx_queues == NULL) {
841 dev->data->nb_rx_queues = 0;
844 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
847 rxq = dev->data->rx_queues;
849 for (i = nb_queues; i < old_nb_queues; i++)
850 (*dev->dev_ops->rx_queue_release)(rxq[i]);
851 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
852 RTE_CACHE_LINE_SIZE);
855 if (nb_queues > old_nb_queues) {
856 uint16_t new_qs = nb_queues - old_nb_queues;
858 memset(rxq + old_nb_queues, 0,
859 sizeof(rxq[0]) * new_qs);
862 dev->data->rx_queues = rxq;
864 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
867 rxq = dev->data->rx_queues;
869 for (i = nb_queues; i < old_nb_queues; i++)
870 (*dev->dev_ops->rx_queue_release)(rxq[i]);
872 rte_free(dev->data->rx_queues);
873 dev->data->rx_queues = NULL;
875 dev->data->nb_rx_queues = nb_queues;
880 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
882 struct rte_eth_dev *dev;
884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
886 dev = &rte_eth_devices[port_id];
887 if (!dev->data->dev_started) {
889 "Port %u must be started before start any queue\n",
894 if (rx_queue_id >= dev->data->nb_rx_queues) {
895 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
901 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
903 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
904 rx_queue_id, port_id);
908 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
910 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
911 rx_queue_id, port_id);
915 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
921 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
923 struct rte_eth_dev *dev;
925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
927 dev = &rte_eth_devices[port_id];
928 if (rx_queue_id >= dev->data->nb_rx_queues) {
929 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
935 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
937 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
938 rx_queue_id, port_id);
942 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
944 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
945 rx_queue_id, port_id);
949 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
954 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
956 struct rte_eth_dev *dev;
958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
960 dev = &rte_eth_devices[port_id];
961 if (!dev->data->dev_started) {
963 "Port %u must be started before start any queue\n",
968 if (tx_queue_id >= dev->data->nb_tx_queues) {
969 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
975 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
977 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
978 tx_queue_id, port_id);
982 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
984 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
985 tx_queue_id, port_id);
989 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
993 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
995 struct rte_eth_dev *dev;
997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
999 dev = &rte_eth_devices[port_id];
1000 if (tx_queue_id >= dev->data->nb_tx_queues) {
1001 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1007 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1008 RTE_ETHDEV_LOG(INFO,
1009 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1010 tx_queue_id, port_id);
1014 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1015 RTE_ETHDEV_LOG(INFO,
1016 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1017 tx_queue_id, port_id);
1021 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1026 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1028 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1032 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1033 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1034 sizeof(dev->data->tx_queues[0]) * nb_queues,
1035 RTE_CACHE_LINE_SIZE);
1036 if (dev->data->tx_queues == NULL) {
1037 dev->data->nb_tx_queues = 0;
1040 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1043 txq = dev->data->tx_queues;
1045 for (i = nb_queues; i < old_nb_queues; i++)
1046 (*dev->dev_ops->tx_queue_release)(txq[i]);
1047 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1048 RTE_CACHE_LINE_SIZE);
1051 if (nb_queues > old_nb_queues) {
1052 uint16_t new_qs = nb_queues - old_nb_queues;
1054 memset(txq + old_nb_queues, 0,
1055 sizeof(txq[0]) * new_qs);
1058 dev->data->tx_queues = txq;
1060 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1063 txq = dev->data->tx_queues;
1065 for (i = nb_queues; i < old_nb_queues; i++)
1066 (*dev->dev_ops->tx_queue_release)(txq[i]);
1068 rte_free(dev->data->tx_queues);
1069 dev->data->tx_queues = NULL;
1071 dev->data->nb_tx_queues = nb_queues;
1076 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1079 case ETH_SPEED_NUM_10M:
1080 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1081 case ETH_SPEED_NUM_100M:
1082 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1083 case ETH_SPEED_NUM_1G:
1084 return ETH_LINK_SPEED_1G;
1085 case ETH_SPEED_NUM_2_5G:
1086 return ETH_LINK_SPEED_2_5G;
1087 case ETH_SPEED_NUM_5G:
1088 return ETH_LINK_SPEED_5G;
1089 case ETH_SPEED_NUM_10G:
1090 return ETH_LINK_SPEED_10G;
1091 case ETH_SPEED_NUM_20G:
1092 return ETH_LINK_SPEED_20G;
1093 case ETH_SPEED_NUM_25G:
1094 return ETH_LINK_SPEED_25G;
1095 case ETH_SPEED_NUM_40G:
1096 return ETH_LINK_SPEED_40G;
1097 case ETH_SPEED_NUM_50G:
1098 return ETH_LINK_SPEED_50G;
1099 case ETH_SPEED_NUM_56G:
1100 return ETH_LINK_SPEED_56G;
1101 case ETH_SPEED_NUM_100G:
1102 return ETH_LINK_SPEED_100G;
1109 rte_eth_dev_rx_offload_name(uint64_t offload)
1111 const char *name = "UNKNOWN";
1114 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1115 if (offload == rte_rx_offload_names[i].offload) {
1116 name = rte_rx_offload_names[i].name;
1125 rte_eth_dev_tx_offload_name(uint64_t offload)
1127 const char *name = "UNKNOWN";
1130 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1131 if (offload == rte_tx_offload_names[i].offload) {
1132 name = rte_tx_offload_names[i].name;
1141 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1142 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1146 if (dev_info_size == 0) {
1147 if (config_size != max_rx_pkt_len) {
1148 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1149 " %u != %u is not allowed\n",
1150 port_id, config_size, max_rx_pkt_len);
1153 } else if (config_size > dev_info_size) {
1154 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1155 "> max allowed value %u\n", port_id, config_size,
1158 } else if (config_size < RTE_ETHER_MIN_LEN) {
1159 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1160 "< min allowed value %u\n", port_id, config_size,
1161 (unsigned int)RTE_ETHER_MIN_LEN);
1168 * Validate offloads that are requested through rte_eth_dev_configure against
1169 * the offloads successfuly set by the ethernet device.
1172 * The port identifier of the Ethernet device.
1173 * @param req_offloads
1174 * The offloads that have been requested through `rte_eth_dev_configure`.
1175 * @param set_offloads
1176 * The offloads successfuly set by the ethernet device.
1177 * @param offload_type
1178 * The offload type i.e. Rx/Tx string.
1179 * @param offload_name
1180 * The function that prints the offload name.
1182 * - (0) if validation successful.
1183 * - (-EINVAL) if requested offload has been silently disabled.
1187 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1188 uint64_t set_offloads, const char *offload_type,
1189 const char *(*offload_name)(uint64_t))
1191 uint64_t offloads_diff = req_offloads ^ set_offloads;
1195 while (offloads_diff != 0) {
1196 /* Check if any offload is requested but not enabled. */
1197 offload = 1ULL << __builtin_ctzll(offloads_diff);
1198 if (offload & req_offloads) {
1200 "Port %u failed to enable %s offload %s\n",
1201 port_id, offload_type, offload_name(offload));
1205 /* Chech if offload couldn't be disabled. */
1206 if (offload & set_offloads) {
1207 RTE_ETHDEV_LOG(DEBUG,
1208 "Port %u %s offload %s is not requested but enabled\n",
1209 port_id, offload_type, offload_name(offload));
1212 offloads_diff &= ~offload;
1219 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1220 const struct rte_eth_conf *dev_conf)
1222 struct rte_eth_dev *dev;
1223 struct rte_eth_dev_info dev_info;
1224 struct rte_eth_conf orig_conf;
1228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1230 dev = &rte_eth_devices[port_id];
1232 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1234 if (dev->data->dev_started) {
1236 "Port %u must be stopped to allow configuration\n",
1241 /* Store original config, as rollback required on failure */
1242 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1245 * Copy the dev_conf parameter into the dev structure.
1246 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1248 if (dev_conf != &dev->data->dev_conf)
1249 memcpy(&dev->data->dev_conf, dev_conf,
1250 sizeof(dev->data->dev_conf));
1252 ret = rte_eth_dev_info_get(port_id, &dev_info);
1256 /* If number of queues specified by application for both Rx and Tx is
1257 * zero, use driver preferred values. This cannot be done individually
1258 * as it is valid for either Tx or Rx (but not both) to be zero.
1259 * If driver does not provide any preferred valued, fall back on
1262 if (nb_rx_q == 0 && nb_tx_q == 0) {
1263 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1265 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1266 nb_tx_q = dev_info.default_txportconf.nb_queues;
1268 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1271 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1273 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1274 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1279 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1281 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1282 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1288 * Check that the numbers of RX and TX queues are not greater
1289 * than the maximum number of RX and TX queues supported by the
1290 * configured device.
1292 if (nb_rx_q > dev_info.max_rx_queues) {
1293 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1294 port_id, nb_rx_q, dev_info.max_rx_queues);
1299 if (nb_tx_q > dev_info.max_tx_queues) {
1300 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1301 port_id, nb_tx_q, dev_info.max_tx_queues);
1306 /* Check that the device supports requested interrupts */
1307 if ((dev_conf->intr_conf.lsc == 1) &&
1308 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1309 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1310 dev->device->driver->name);
1314 if ((dev_conf->intr_conf.rmv == 1) &&
1315 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1316 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1317 dev->device->driver->name);
1323 * If jumbo frames are enabled, check that the maximum RX packet
1324 * length is supported by the configured device.
1326 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1327 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1329 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1330 port_id, dev_conf->rxmode.max_rx_pkt_len,
1331 dev_info.max_rx_pktlen);
1334 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1336 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1337 port_id, dev_conf->rxmode.max_rx_pkt_len,
1338 (unsigned int)RTE_ETHER_MIN_LEN);
1343 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1344 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1345 /* Use default value */
1346 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1351 * If LRO is enabled, check that the maximum aggregated packet
1352 * size is supported by the configured device.
1354 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1355 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1356 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1357 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1358 ret = check_lro_pkt_size(port_id,
1359 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1360 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1361 dev_info.max_lro_pkt_size);
1366 /* Any requested offloading must be within its device capabilities */
1367 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1368 dev_conf->rxmode.offloads) {
1370 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1371 "capabilities 0x%"PRIx64" in %s()\n",
1372 port_id, dev_conf->rxmode.offloads,
1373 dev_info.rx_offload_capa,
1378 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1379 dev_conf->txmode.offloads) {
1381 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1382 "capabilities 0x%"PRIx64" in %s()\n",
1383 port_id, dev_conf->txmode.offloads,
1384 dev_info.tx_offload_capa,
1390 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1391 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1393 /* Check that device supports requested rss hash functions. */
1394 if ((dev_info.flow_type_rss_offloads |
1395 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1396 dev_info.flow_type_rss_offloads) {
1398 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1399 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1400 dev_info.flow_type_rss_offloads);
1405 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1406 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1407 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1409 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1411 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1417 * Setup new number of RX/TX queues and reconfigure device.
1419 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1422 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1428 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1431 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1433 rte_eth_dev_rx_queue_config(dev, 0);
1438 diag = (*dev->dev_ops->dev_configure)(dev);
1440 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1442 ret = eth_err(port_id, diag);
1446 /* Initialize Rx profiling if enabled at compilation time. */
1447 diag = __rte_eth_dev_profile_init(port_id, dev);
1449 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1451 ret = eth_err(port_id, diag);
1455 /* Validate Rx offloads. */
1456 diag = validate_offloads(port_id,
1457 dev_conf->rxmode.offloads,
1458 dev->data->dev_conf.rxmode.offloads, "Rx",
1459 rte_eth_dev_rx_offload_name);
1465 /* Validate Tx offloads. */
1466 diag = validate_offloads(port_id,
1467 dev_conf->txmode.offloads,
1468 dev->data->dev_conf.txmode.offloads, "Tx",
1469 rte_eth_dev_tx_offload_name);
1477 rte_eth_dev_rx_queue_config(dev, 0);
1478 rte_eth_dev_tx_queue_config(dev, 0);
1480 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1486 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1488 if (dev->data->dev_started) {
1489 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1490 dev->data->port_id);
1494 rte_eth_dev_rx_queue_config(dev, 0);
1495 rte_eth_dev_tx_queue_config(dev, 0);
1497 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1501 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1502 struct rte_eth_dev_info *dev_info)
1504 struct rte_ether_addr *addr;
1509 /* replay MAC address configuration including default MAC */
1510 addr = &dev->data->mac_addrs[0];
1511 if (*dev->dev_ops->mac_addr_set != NULL)
1512 (*dev->dev_ops->mac_addr_set)(dev, addr);
1513 else if (*dev->dev_ops->mac_addr_add != NULL)
1514 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1516 if (*dev->dev_ops->mac_addr_add != NULL) {
1517 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1518 addr = &dev->data->mac_addrs[i];
1520 /* skip zero address */
1521 if (rte_is_zero_ether_addr(addr))
1525 pool_mask = dev->data->mac_pool_sel[i];
1528 if (pool_mask & 1ULL)
1529 (*dev->dev_ops->mac_addr_add)(dev,
1533 } while (pool_mask);
1539 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1540 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1544 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1545 rte_eth_dev_mac_restore(dev, dev_info);
1547 /* replay promiscuous configuration */
1549 * use callbacks directly since we don't need port_id check and
1550 * would like to bypass the same value set
1552 if (rte_eth_promiscuous_get(port_id) == 1 &&
1553 *dev->dev_ops->promiscuous_enable != NULL) {
1554 ret = eth_err(port_id,
1555 (*dev->dev_ops->promiscuous_enable)(dev));
1556 if (ret != 0 && ret != -ENOTSUP) {
1558 "Failed to enable promiscuous mode for device (port %u): %s\n",
1559 port_id, rte_strerror(-ret));
1562 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1563 *dev->dev_ops->promiscuous_disable != NULL) {
1564 ret = eth_err(port_id,
1565 (*dev->dev_ops->promiscuous_disable)(dev));
1566 if (ret != 0 && ret != -ENOTSUP) {
1568 "Failed to disable promiscuous mode for device (port %u): %s\n",
1569 port_id, rte_strerror(-ret));
1574 /* replay all multicast configuration */
1576 * use callbacks directly since we don't need port_id check and
1577 * would like to bypass the same value set
1579 if (rte_eth_allmulticast_get(port_id) == 1 &&
1580 *dev->dev_ops->allmulticast_enable != NULL) {
1581 ret = eth_err(port_id,
1582 (*dev->dev_ops->allmulticast_enable)(dev));
1583 if (ret != 0 && ret != -ENOTSUP) {
1585 "Failed to enable allmulticast mode for device (port %u): %s\n",
1586 port_id, rte_strerror(-ret));
1589 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1590 *dev->dev_ops->allmulticast_disable != NULL) {
1591 ret = eth_err(port_id,
1592 (*dev->dev_ops->allmulticast_disable)(dev));
1593 if (ret != 0 && ret != -ENOTSUP) {
1595 "Failed to disable allmulticast mode for device (port %u): %s\n",
1596 port_id, rte_strerror(-ret));
1605 rte_eth_dev_start(uint16_t port_id)
1607 struct rte_eth_dev *dev;
1608 struct rte_eth_dev_info dev_info;
1612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1614 dev = &rte_eth_devices[port_id];
1616 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1618 if (dev->data->dev_started != 0) {
1619 RTE_ETHDEV_LOG(INFO,
1620 "Device with port_id=%"PRIu16" already started\n",
1625 ret = rte_eth_dev_info_get(port_id, &dev_info);
1629 /* Lets restore MAC now if device does not support live change */
1630 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1631 rte_eth_dev_mac_restore(dev, &dev_info);
1633 diag = (*dev->dev_ops->dev_start)(dev);
1635 dev->data->dev_started = 1;
1637 return eth_err(port_id, diag);
1639 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1642 "Error during restoring configuration for device (port %u): %s\n",
1643 port_id, rte_strerror(-ret));
1644 rte_eth_dev_stop(port_id);
1648 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1650 (*dev->dev_ops->link_update)(dev, 0);
1656 rte_eth_dev_stop(uint16_t port_id)
1658 struct rte_eth_dev *dev;
1660 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1661 dev = &rte_eth_devices[port_id];
1663 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1665 if (dev->data->dev_started == 0) {
1666 RTE_ETHDEV_LOG(INFO,
1667 "Device with port_id=%"PRIu16" already stopped\n",
1672 dev->data->dev_started = 0;
1673 (*dev->dev_ops->dev_stop)(dev);
1677 rte_eth_dev_set_link_up(uint16_t port_id)
1679 struct rte_eth_dev *dev;
1681 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1683 dev = &rte_eth_devices[port_id];
1685 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1686 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1690 rte_eth_dev_set_link_down(uint16_t port_id)
1692 struct rte_eth_dev *dev;
1694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1696 dev = &rte_eth_devices[port_id];
1698 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1699 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1703 rte_eth_dev_close(uint16_t port_id)
1705 struct rte_eth_dev *dev;
1707 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1708 dev = &rte_eth_devices[port_id];
1710 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1711 dev->data->dev_started = 0;
1712 (*dev->dev_ops->dev_close)(dev);
1714 /* check behaviour flag - temporary for PMD migration */
1715 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1716 /* new behaviour: send event + reset state + free all data */
1717 rte_eth_dev_release_port(dev);
1720 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1721 "The driver %s should migrate to the new behaviour.\n",
1722 dev->device->driver->name);
1723 /* old behaviour: only free queue arrays */
1724 dev->data->nb_rx_queues = 0;
1725 rte_free(dev->data->rx_queues);
1726 dev->data->rx_queues = NULL;
1727 dev->data->nb_tx_queues = 0;
1728 rte_free(dev->data->tx_queues);
1729 dev->data->tx_queues = NULL;
1733 rte_eth_dev_reset(uint16_t port_id)
1735 struct rte_eth_dev *dev;
1738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1739 dev = &rte_eth_devices[port_id];
1741 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1743 rte_eth_dev_stop(port_id);
1744 ret = dev->dev_ops->dev_reset(dev);
1746 return eth_err(port_id, ret);
1750 rte_eth_dev_is_removed(uint16_t port_id)
1752 struct rte_eth_dev *dev;
1755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1757 dev = &rte_eth_devices[port_id];
1759 if (dev->state == RTE_ETH_DEV_REMOVED)
1762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1764 ret = dev->dev_ops->is_removed(dev);
1766 /* Device is physically removed. */
1767 dev->state = RTE_ETH_DEV_REMOVED;
1773 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1774 uint16_t nb_rx_desc, unsigned int socket_id,
1775 const struct rte_eth_rxconf *rx_conf,
1776 struct rte_mempool *mp)
1779 uint32_t mbp_buf_size;
1780 struct rte_eth_dev *dev;
1781 struct rte_eth_dev_info dev_info;
1782 struct rte_eth_rxconf local_conf;
1785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1787 dev = &rte_eth_devices[port_id];
1788 if (rx_queue_id >= dev->data->nb_rx_queues) {
1789 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1794 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1798 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1801 * Check the size of the mbuf data buffer.
1802 * This value must be provided in the private data of the memory pool.
1803 * First check that the memory pool has a valid private data.
1805 ret = rte_eth_dev_info_get(port_id, &dev_info);
1809 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1810 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1811 mp->name, (int)mp->private_data_size,
1812 (int)sizeof(struct rte_pktmbuf_pool_private));
1815 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1817 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1819 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1820 mp->name, (int)mbp_buf_size,
1821 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1822 (int)RTE_PKTMBUF_HEADROOM,
1823 (int)dev_info.min_rx_bufsize);
1827 /* Use default specified by driver, if nb_rx_desc is zero */
1828 if (nb_rx_desc == 0) {
1829 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1830 /* If driver default is also zero, fall back on EAL default */
1831 if (nb_rx_desc == 0)
1832 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1835 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1836 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1837 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1840 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1841 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1842 dev_info.rx_desc_lim.nb_min,
1843 dev_info.rx_desc_lim.nb_align);
1847 if (dev->data->dev_started &&
1848 !(dev_info.dev_capa &
1849 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1852 if (dev->data->dev_started &&
1853 (dev->data->rx_queue_state[rx_queue_id] !=
1854 RTE_ETH_QUEUE_STATE_STOPPED))
1857 rxq = dev->data->rx_queues;
1858 if (rxq[rx_queue_id]) {
1859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1861 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1862 rxq[rx_queue_id] = NULL;
1865 if (rx_conf == NULL)
1866 rx_conf = &dev_info.default_rxconf;
1868 local_conf = *rx_conf;
1871 * If an offloading has already been enabled in
1872 * rte_eth_dev_configure(), it has been enabled on all queues,
1873 * so there is no need to enable it in this queue again.
1874 * The local_conf.offloads input to underlying PMD only carries
1875 * those offloadings which are only enabled on this queue and
1876 * not enabled on all queues.
1878 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1881 * New added offloadings for this queue are those not enabled in
1882 * rte_eth_dev_configure() and they must be per-queue type.
1883 * A pure per-port offloading can't be enabled on a queue while
1884 * disabled on another queue. A pure per-port offloading can't
1885 * be enabled for any queue as new added one if it hasn't been
1886 * enabled in rte_eth_dev_configure().
1888 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1889 local_conf.offloads) {
1891 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1892 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1893 port_id, rx_queue_id, local_conf.offloads,
1894 dev_info.rx_queue_offload_capa,
1900 * If LRO is enabled, check that the maximum aggregated packet
1901 * size is supported by the configured device.
1903 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1904 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1905 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1906 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1907 int ret = check_lro_pkt_size(port_id,
1908 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1909 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1910 dev_info.max_lro_pkt_size);
1915 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1916 socket_id, &local_conf, mp);
1918 if (!dev->data->min_rx_buf_size ||
1919 dev->data->min_rx_buf_size > mbp_buf_size)
1920 dev->data->min_rx_buf_size = mbp_buf_size;
1923 return eth_err(port_id, ret);
1927 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1928 uint16_t nb_rx_desc,
1929 const struct rte_eth_hairpin_conf *conf)
1932 struct rte_eth_dev *dev;
1933 struct rte_eth_hairpin_cap cap;
1938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1940 dev = &rte_eth_devices[port_id];
1941 if (rx_queue_id >= dev->data->nb_rx_queues) {
1942 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1945 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1948 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1950 /* if nb_rx_desc is zero use max number of desc from the driver. */
1951 if (nb_rx_desc == 0)
1952 nb_rx_desc = cap.max_nb_desc;
1953 if (nb_rx_desc > cap.max_nb_desc) {
1955 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1956 nb_rx_desc, cap.max_nb_desc);
1959 if (conf->peer_count > cap.max_rx_2_tx) {
1961 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1962 conf->peer_count, cap.max_rx_2_tx);
1965 if (conf->peer_count == 0) {
1967 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1971 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1972 cap.max_nb_queues != UINT16_MAX; i++) {
1973 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1976 if (count > cap.max_nb_queues) {
1977 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1981 if (dev->data->dev_started)
1983 rxq = dev->data->rx_queues;
1984 if (rxq[rx_queue_id] != NULL) {
1985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1987 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1988 rxq[rx_queue_id] = NULL;
1990 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1993 dev->data->rx_queue_state[rx_queue_id] =
1994 RTE_ETH_QUEUE_STATE_HAIRPIN;
1995 return eth_err(port_id, ret);
1999 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2000 uint16_t nb_tx_desc, unsigned int socket_id,
2001 const struct rte_eth_txconf *tx_conf)
2003 struct rte_eth_dev *dev;
2004 struct rte_eth_dev_info dev_info;
2005 struct rte_eth_txconf local_conf;
2009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2011 dev = &rte_eth_devices[port_id];
2012 if (tx_queue_id >= dev->data->nb_tx_queues) {
2013 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2017 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2019 ret = rte_eth_dev_info_get(port_id, &dev_info);
2023 /* Use default specified by driver, if nb_tx_desc is zero */
2024 if (nb_tx_desc == 0) {
2025 nb_tx_desc = dev_info.default_txportconf.ring_size;
2026 /* If driver default is zero, fall back on EAL default */
2027 if (nb_tx_desc == 0)
2028 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2030 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2031 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2032 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2034 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2035 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2036 dev_info.tx_desc_lim.nb_min,
2037 dev_info.tx_desc_lim.nb_align);
2041 if (dev->data->dev_started &&
2042 !(dev_info.dev_capa &
2043 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2046 if (dev->data->dev_started &&
2047 (dev->data->tx_queue_state[tx_queue_id] !=
2048 RTE_ETH_QUEUE_STATE_STOPPED))
2051 txq = dev->data->tx_queues;
2052 if (txq[tx_queue_id]) {
2053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2055 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2056 txq[tx_queue_id] = NULL;
2059 if (tx_conf == NULL)
2060 tx_conf = &dev_info.default_txconf;
2062 local_conf = *tx_conf;
2065 * If an offloading has already been enabled in
2066 * rte_eth_dev_configure(), it has been enabled on all queues,
2067 * so there is no need to enable it in this queue again.
2068 * The local_conf.offloads input to underlying PMD only carries
2069 * those offloadings which are only enabled on this queue and
2070 * not enabled on all queues.
2072 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2075 * New added offloadings for this queue are those not enabled in
2076 * rte_eth_dev_configure() and they must be per-queue type.
2077 * A pure per-port offloading can't be enabled on a queue while
2078 * disabled on another queue. A pure per-port offloading can't
2079 * be enabled for any queue as new added one if it hasn't been
2080 * enabled in rte_eth_dev_configure().
2082 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2083 local_conf.offloads) {
2085 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2086 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2087 port_id, tx_queue_id, local_conf.offloads,
2088 dev_info.tx_queue_offload_capa,
2093 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2094 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2098 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2099 uint16_t nb_tx_desc,
2100 const struct rte_eth_hairpin_conf *conf)
2102 struct rte_eth_dev *dev;
2103 struct rte_eth_hairpin_cap cap;
2109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2110 dev = &rte_eth_devices[port_id];
2111 if (tx_queue_id >= dev->data->nb_tx_queues) {
2112 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2115 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2120 /* if nb_rx_desc is zero use max number of desc from the driver. */
2121 if (nb_tx_desc == 0)
2122 nb_tx_desc = cap.max_nb_desc;
2123 if (nb_tx_desc > cap.max_nb_desc) {
2125 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2126 nb_tx_desc, cap.max_nb_desc);
2129 if (conf->peer_count > cap.max_tx_2_rx) {
2131 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2132 conf->peer_count, cap.max_tx_2_rx);
2135 if (conf->peer_count == 0) {
2137 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2141 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2142 cap.max_nb_queues != UINT16_MAX; i++) {
2143 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2146 if (count > cap.max_nb_queues) {
2147 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2151 if (dev->data->dev_started)
2153 txq = dev->data->tx_queues;
2154 if (txq[tx_queue_id] != NULL) {
2155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2157 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2158 txq[tx_queue_id] = NULL;
2160 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2161 (dev, tx_queue_id, nb_tx_desc, conf);
2163 dev->data->tx_queue_state[tx_queue_id] =
2164 RTE_ETH_QUEUE_STATE_HAIRPIN;
2165 return eth_err(port_id, ret);
2169 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2170 void *userdata __rte_unused)
2174 for (i = 0; i < unsent; i++)
2175 rte_pktmbuf_free(pkts[i]);
2179 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2182 uint64_t *count = userdata;
2185 for (i = 0; i < unsent; i++)
2186 rte_pktmbuf_free(pkts[i]);
2192 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2193 buffer_tx_error_fn cbfn, void *userdata)
2195 buffer->error_callback = cbfn;
2196 buffer->error_userdata = userdata;
2201 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2208 buffer->size = size;
2209 if (buffer->error_callback == NULL) {
2210 ret = rte_eth_tx_buffer_set_err_callback(
2211 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2218 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2220 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2223 /* Validate Input Data. Bail if not valid or not supported. */
2224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2225 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2227 /* Call driver to free pending mbufs. */
2228 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2230 return eth_err(port_id, ret);
2234 rte_eth_promiscuous_enable(uint16_t port_id)
2236 struct rte_eth_dev *dev;
2239 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2240 dev = &rte_eth_devices[port_id];
2242 if (dev->data->promiscuous == 1)
2245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2247 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2248 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2250 return eth_err(port_id, diag);
2254 rte_eth_promiscuous_disable(uint16_t port_id)
2256 struct rte_eth_dev *dev;
2259 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2260 dev = &rte_eth_devices[port_id];
2262 if (dev->data->promiscuous == 0)
2265 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2267 dev->data->promiscuous = 0;
2268 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2270 dev->data->promiscuous = 1;
2272 return eth_err(port_id, diag);
2276 rte_eth_promiscuous_get(uint16_t port_id)
2278 struct rte_eth_dev *dev;
2280 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2282 dev = &rte_eth_devices[port_id];
2283 return dev->data->promiscuous;
2287 rte_eth_allmulticast_enable(uint16_t port_id)
2289 struct rte_eth_dev *dev;
2292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2293 dev = &rte_eth_devices[port_id];
2295 if (dev->data->all_multicast == 1)
2298 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2299 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2300 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2302 return eth_err(port_id, diag);
2306 rte_eth_allmulticast_disable(uint16_t port_id)
2308 struct rte_eth_dev *dev;
2311 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2312 dev = &rte_eth_devices[port_id];
2314 if (dev->data->all_multicast == 0)
2317 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2318 dev->data->all_multicast = 0;
2319 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2321 dev->data->all_multicast = 1;
2323 return eth_err(port_id, diag);
2327 rte_eth_allmulticast_get(uint16_t port_id)
2329 struct rte_eth_dev *dev;
2331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2333 dev = &rte_eth_devices[port_id];
2334 return dev->data->all_multicast;
2338 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2340 struct rte_eth_dev *dev;
2342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2343 dev = &rte_eth_devices[port_id];
2345 if (dev->data->dev_conf.intr_conf.lsc &&
2346 dev->data->dev_started)
2347 rte_eth_linkstatus_get(dev, eth_link);
2349 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2350 (*dev->dev_ops->link_update)(dev, 1);
2351 *eth_link = dev->data->dev_link;
2358 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2360 struct rte_eth_dev *dev;
2362 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2363 dev = &rte_eth_devices[port_id];
2365 if (dev->data->dev_conf.intr_conf.lsc &&
2366 dev->data->dev_started)
2367 rte_eth_linkstatus_get(dev, eth_link);
2369 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2370 (*dev->dev_ops->link_update)(dev, 0);
2371 *eth_link = dev->data->dev_link;
2378 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2380 struct rte_eth_dev *dev;
2382 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2384 dev = &rte_eth_devices[port_id];
2385 memset(stats, 0, sizeof(*stats));
2387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2388 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2389 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2393 rte_eth_stats_reset(uint16_t port_id)
2395 struct rte_eth_dev *dev;
2398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2399 dev = &rte_eth_devices[port_id];
2401 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2402 ret = (*dev->dev_ops->stats_reset)(dev);
2404 return eth_err(port_id, ret);
2406 dev->data->rx_mbuf_alloc_failed = 0;
2412 get_xstats_basic_count(struct rte_eth_dev *dev)
2414 uint16_t nb_rxqs, nb_txqs;
2417 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2418 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2420 count = RTE_NB_STATS;
2421 count += nb_rxqs * RTE_NB_RXQ_STATS;
2422 count += nb_txqs * RTE_NB_TXQ_STATS;
2428 get_xstats_count(uint16_t port_id)
2430 struct rte_eth_dev *dev;
2433 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2434 dev = &rte_eth_devices[port_id];
2435 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2436 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2439 return eth_err(port_id, count);
2441 if (dev->dev_ops->xstats_get_names != NULL) {
2442 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2444 return eth_err(port_id, count);
2449 count += get_xstats_basic_count(dev);
2455 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2458 int cnt_xstats, idx_xstat;
2460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2463 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2468 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2473 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2474 if (cnt_xstats < 0) {
2475 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2479 /* Get id-name lookup table */
2480 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2482 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2483 port_id, xstats_names, cnt_xstats, NULL)) {
2484 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2488 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2489 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2498 /* retrieve basic stats names */
2500 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2501 struct rte_eth_xstat_name *xstats_names)
2503 int cnt_used_entries = 0;
2504 uint32_t idx, id_queue;
2507 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2508 strlcpy(xstats_names[cnt_used_entries].name,
2509 rte_stats_strings[idx].name,
2510 sizeof(xstats_names[0].name));
2513 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2514 for (id_queue = 0; id_queue < num_q; id_queue++) {
2515 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2516 snprintf(xstats_names[cnt_used_entries].name,
2517 sizeof(xstats_names[0].name),
2519 id_queue, rte_rxq_stats_strings[idx].name);
2524 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2525 for (id_queue = 0; id_queue < num_q; id_queue++) {
2526 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2527 snprintf(xstats_names[cnt_used_entries].name,
2528 sizeof(xstats_names[0].name),
2530 id_queue, rte_txq_stats_strings[idx].name);
2534 return cnt_used_entries;
2537 /* retrieve ethdev extended statistics names */
2539 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2540 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2543 struct rte_eth_xstat_name *xstats_names_copy;
2544 unsigned int no_basic_stat_requested = 1;
2545 unsigned int no_ext_stat_requested = 1;
2546 unsigned int expected_entries;
2547 unsigned int basic_count;
2548 struct rte_eth_dev *dev;
2552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2553 dev = &rte_eth_devices[port_id];
2555 basic_count = get_xstats_basic_count(dev);
2556 ret = get_xstats_count(port_id);
2559 expected_entries = (unsigned int)ret;
2561 /* Return max number of stats if no ids given */
2564 return expected_entries;
2565 else if (xstats_names && size < expected_entries)
2566 return expected_entries;
2569 if (ids && !xstats_names)
2572 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2573 uint64_t ids_copy[size];
2575 for (i = 0; i < size; i++) {
2576 if (ids[i] < basic_count) {
2577 no_basic_stat_requested = 0;
2582 * Convert ids to xstats ids that PMD knows.
2583 * ids known by user are basic + extended stats.
2585 ids_copy[i] = ids[i] - basic_count;
2588 if (no_basic_stat_requested)
2589 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2590 xstats_names, ids_copy, size);
2593 /* Retrieve all stats */
2595 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2597 if (num_stats < 0 || num_stats > (int)expected_entries)
2600 return expected_entries;
2603 xstats_names_copy = calloc(expected_entries,
2604 sizeof(struct rte_eth_xstat_name));
2606 if (!xstats_names_copy) {
2607 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2612 for (i = 0; i < size; i++) {
2613 if (ids[i] >= basic_count) {
2614 no_ext_stat_requested = 0;
2620 /* Fill xstats_names_copy structure */
2621 if (ids && no_ext_stat_requested) {
2622 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2624 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2627 free(xstats_names_copy);
2633 for (i = 0; i < size; i++) {
2634 if (ids[i] >= expected_entries) {
2635 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2636 free(xstats_names_copy);
2639 xstats_names[i] = xstats_names_copy[ids[i]];
2642 free(xstats_names_copy);
2647 rte_eth_xstats_get_names(uint16_t port_id,
2648 struct rte_eth_xstat_name *xstats_names,
2651 struct rte_eth_dev *dev;
2652 int cnt_used_entries;
2653 int cnt_expected_entries;
2654 int cnt_driver_entries;
2656 cnt_expected_entries = get_xstats_count(port_id);
2657 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2658 (int)size < cnt_expected_entries)
2659 return cnt_expected_entries;
2661 /* port_id checked in get_xstats_count() */
2662 dev = &rte_eth_devices[port_id];
2664 cnt_used_entries = rte_eth_basic_stats_get_names(
2667 if (dev->dev_ops->xstats_get_names != NULL) {
2668 /* If there are any driver-specific xstats, append them
2671 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2673 xstats_names + cnt_used_entries,
2674 size - cnt_used_entries);
2675 if (cnt_driver_entries < 0)
2676 return eth_err(port_id, cnt_driver_entries);
2677 cnt_used_entries += cnt_driver_entries;
2680 return cnt_used_entries;
2685 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2687 struct rte_eth_dev *dev;
2688 struct rte_eth_stats eth_stats;
2689 unsigned int count = 0, i, q;
2690 uint64_t val, *stats_ptr;
2691 uint16_t nb_rxqs, nb_txqs;
2694 ret = rte_eth_stats_get(port_id, ð_stats);
2698 dev = &rte_eth_devices[port_id];
2700 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2701 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2704 for (i = 0; i < RTE_NB_STATS; i++) {
2705 stats_ptr = RTE_PTR_ADD(ð_stats,
2706 rte_stats_strings[i].offset);
2708 xstats[count++].value = val;
2712 for (q = 0; q < nb_rxqs; q++) {
2713 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2714 stats_ptr = RTE_PTR_ADD(ð_stats,
2715 rte_rxq_stats_strings[i].offset +
2716 q * sizeof(uint64_t));
2718 xstats[count++].value = val;
2723 for (q = 0; q < nb_txqs; q++) {
2724 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2725 stats_ptr = RTE_PTR_ADD(ð_stats,
2726 rte_txq_stats_strings[i].offset +
2727 q * sizeof(uint64_t));
2729 xstats[count++].value = val;
2735 /* retrieve ethdev extended statistics */
2737 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2738 uint64_t *values, unsigned int size)
2740 unsigned int no_basic_stat_requested = 1;
2741 unsigned int no_ext_stat_requested = 1;
2742 unsigned int num_xstats_filled;
2743 unsigned int basic_count;
2744 uint16_t expected_entries;
2745 struct rte_eth_dev *dev;
2749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2750 ret = get_xstats_count(port_id);
2753 expected_entries = (uint16_t)ret;
2754 struct rte_eth_xstat xstats[expected_entries];
2755 dev = &rte_eth_devices[port_id];
2756 basic_count = get_xstats_basic_count(dev);
2758 /* Return max number of stats if no ids given */
2761 return expected_entries;
2762 else if (values && size < expected_entries)
2763 return expected_entries;
2769 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2770 unsigned int basic_count = get_xstats_basic_count(dev);
2771 uint64_t ids_copy[size];
2773 for (i = 0; i < size; i++) {
2774 if (ids[i] < basic_count) {
2775 no_basic_stat_requested = 0;
2780 * Convert ids to xstats ids that PMD knows.
2781 * ids known by user are basic + extended stats.
2783 ids_copy[i] = ids[i] - basic_count;
2786 if (no_basic_stat_requested)
2787 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2792 for (i = 0; i < size; i++) {
2793 if (ids[i] >= basic_count) {
2794 no_ext_stat_requested = 0;
2800 /* Fill the xstats structure */
2801 if (ids && no_ext_stat_requested)
2802 ret = rte_eth_basic_stats_get(port_id, xstats);
2804 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2808 num_xstats_filled = (unsigned int)ret;
2810 /* Return all stats */
2812 for (i = 0; i < num_xstats_filled; i++)
2813 values[i] = xstats[i].value;
2814 return expected_entries;
2818 for (i = 0; i < size; i++) {
2819 if (ids[i] >= expected_entries) {
2820 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2823 values[i] = xstats[ids[i]].value;
2829 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2832 struct rte_eth_dev *dev;
2833 unsigned int count = 0, i;
2834 signed int xcount = 0;
2835 uint16_t nb_rxqs, nb_txqs;
2838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2840 dev = &rte_eth_devices[port_id];
2842 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2843 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2845 /* Return generic statistics */
2846 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2847 (nb_txqs * RTE_NB_TXQ_STATS);
2849 /* implemented by the driver */
2850 if (dev->dev_ops->xstats_get != NULL) {
2851 /* Retrieve the xstats from the driver at the end of the
2854 xcount = (*dev->dev_ops->xstats_get)(dev,
2855 xstats ? xstats + count : NULL,
2856 (n > count) ? n - count : 0);
2859 return eth_err(port_id, xcount);
2862 if (n < count + xcount || xstats == NULL)
2863 return count + xcount;
2865 /* now fill the xstats structure */
2866 ret = rte_eth_basic_stats_get(port_id, xstats);
2871 for (i = 0; i < count; i++)
2873 /* add an offset to driver-specific stats */
2874 for ( ; i < count + xcount; i++)
2875 xstats[i].id += count;
2877 return count + xcount;
2880 /* reset ethdev extended statistics */
2882 rte_eth_xstats_reset(uint16_t port_id)
2884 struct rte_eth_dev *dev;
2886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2887 dev = &rte_eth_devices[port_id];
2889 /* implemented by the driver */
2890 if (dev->dev_ops->xstats_reset != NULL)
2891 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2893 /* fallback to default */
2894 return rte_eth_stats_reset(port_id);
2898 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2901 struct rte_eth_dev *dev;
2903 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2905 dev = &rte_eth_devices[port_id];
2907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2909 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2912 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2915 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2918 return (*dev->dev_ops->queue_stats_mapping_set)
2919 (dev, queue_id, stat_idx, is_rx);
2924 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2927 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2928 stat_idx, STAT_QMAP_TX));
2933 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2936 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2937 stat_idx, STAT_QMAP_RX));
2941 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2943 struct rte_eth_dev *dev;
2945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2946 dev = &rte_eth_devices[port_id];
2948 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2949 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2950 fw_version, fw_size));
2954 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2956 struct rte_eth_dev *dev;
2957 const struct rte_eth_desc_lim lim = {
2958 .nb_max = UINT16_MAX,
2961 .nb_seg_max = UINT16_MAX,
2962 .nb_mtu_seg_max = UINT16_MAX,
2967 * Init dev_info before port_id check since caller does not have
2968 * return status and does not know if get is successful or not.
2970 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2971 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2973 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2974 dev = &rte_eth_devices[port_id];
2976 dev_info->rx_desc_lim = lim;
2977 dev_info->tx_desc_lim = lim;
2978 dev_info->device = dev->device;
2979 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2980 dev_info->max_mtu = UINT16_MAX;
2982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2983 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2985 /* Cleanup already filled in device information */
2986 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2987 return eth_err(port_id, diag);
2990 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
2991 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
2992 RTE_MAX_QUEUES_PER_PORT);
2993 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
2994 RTE_MAX_QUEUES_PER_PORT);
2996 dev_info->driver_name = dev->device->driver->name;
2997 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2998 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3000 dev_info->dev_flags = &dev->data->dev_flags;
3006 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3007 uint32_t *ptypes, int num)
3010 struct rte_eth_dev *dev;
3011 const uint32_t *all_ptypes;
3013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3014 dev = &rte_eth_devices[port_id];
3015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3016 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3021 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3022 if (all_ptypes[i] & ptype_mask) {
3024 ptypes[j] = all_ptypes[i];
3032 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3033 uint32_t *set_ptypes, unsigned int num)
3035 const uint32_t valid_ptype_masks[] = {
3039 RTE_PTYPE_TUNNEL_MASK,
3040 RTE_PTYPE_INNER_L2_MASK,
3041 RTE_PTYPE_INNER_L3_MASK,
3042 RTE_PTYPE_INNER_L4_MASK,
3044 const uint32_t *all_ptypes;
3045 struct rte_eth_dev *dev;
3046 uint32_t unused_mask;
3050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3051 dev = &rte_eth_devices[port_id];
3053 if (num > 0 && set_ptypes == NULL)
3056 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3057 *dev->dev_ops->dev_ptypes_set == NULL) {
3062 if (ptype_mask == 0) {
3063 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3068 unused_mask = ptype_mask;
3069 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3070 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3071 if (mask && mask != valid_ptype_masks[i]) {
3075 unused_mask &= ~valid_ptype_masks[i];
3083 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3084 if (all_ptypes == NULL) {
3090 * Accommodate as many set_ptypes as possible. If the supplied
3091 * set_ptypes array is insufficient fill it partially.
3093 for (i = 0, j = 0; set_ptypes != NULL &&
3094 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3095 if (ptype_mask & all_ptypes[i]) {
3097 set_ptypes[j] = all_ptypes[i];
3105 if (set_ptypes != NULL && j < num)
3106 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3108 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3112 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3118 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3120 struct rte_eth_dev *dev;
3122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3123 dev = &rte_eth_devices[port_id];
3124 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3130 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3132 struct rte_eth_dev *dev;
3134 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3136 dev = &rte_eth_devices[port_id];
3137 *mtu = dev->data->mtu;
3142 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3145 struct rte_eth_dev_info dev_info;
3146 struct rte_eth_dev *dev;
3148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3149 dev = &rte_eth_devices[port_id];
3150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3153 * Check if the device supports dev_infos_get, if it does not
3154 * skip min_mtu/max_mtu validation here as this requires values
3155 * that are populated within the call to rte_eth_dev_info_get()
3156 * which relies on dev->dev_ops->dev_infos_get.
3158 if (*dev->dev_ops->dev_infos_get != NULL) {
3159 ret = rte_eth_dev_info_get(port_id, &dev_info);
3163 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3167 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3169 dev->data->mtu = mtu;
3171 return eth_err(port_id, ret);
3175 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3177 struct rte_eth_dev *dev;
3180 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3181 dev = &rte_eth_devices[port_id];
3182 if (!(dev->data->dev_conf.rxmode.offloads &
3183 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3184 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3189 if (vlan_id > 4095) {
3190 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3196 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3198 struct rte_vlan_filter_conf *vfc;
3202 vfc = &dev->data->vlan_filter_conf;
3203 vidx = vlan_id / 64;
3204 vbit = vlan_id % 64;
3207 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3209 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3212 return eth_err(port_id, ret);
3216 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3219 struct rte_eth_dev *dev;
3221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3222 dev = &rte_eth_devices[port_id];
3223 if (rx_queue_id >= dev->data->nb_rx_queues) {
3224 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3228 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3229 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3235 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3236 enum rte_vlan_type vlan_type,
3239 struct rte_eth_dev *dev;
3241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3242 dev = &rte_eth_devices[port_id];
3243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3245 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3250 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3252 struct rte_eth_dev *dev;
3256 uint64_t orig_offloads;
3257 uint64_t dev_offloads;
3259 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3260 dev = &rte_eth_devices[port_id];
3262 /* save original values in case of failure */
3263 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3264 dev_offloads = orig_offloads;
3266 /*check which option changed by application*/
3267 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3268 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3271 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3273 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3274 mask |= ETH_VLAN_STRIP_MASK;
3277 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3278 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3281 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3283 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3284 mask |= ETH_VLAN_FILTER_MASK;
3287 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3288 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3291 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3293 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3294 mask |= ETH_VLAN_EXTEND_MASK;
3297 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3298 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3301 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3303 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3304 mask |= ETH_QINQ_STRIP_MASK;
3311 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3312 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3313 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3315 /* hit an error restore original values */
3316 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3319 return eth_err(port_id, ret);
3323 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3325 struct rte_eth_dev *dev;
3326 uint64_t *dev_offloads;
3329 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3330 dev = &rte_eth_devices[port_id];
3331 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3333 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3334 ret |= ETH_VLAN_STRIP_OFFLOAD;
3336 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3337 ret |= ETH_VLAN_FILTER_OFFLOAD;
3339 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3340 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3342 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3343 ret |= ETH_QINQ_STRIP_OFFLOAD;
3349 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3351 struct rte_eth_dev *dev;
3353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3354 dev = &rte_eth_devices[port_id];
3355 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3357 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3361 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3363 struct rte_eth_dev *dev;
3365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3366 dev = &rte_eth_devices[port_id];
3367 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3368 memset(fc_conf, 0, sizeof(*fc_conf));
3369 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3373 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3375 struct rte_eth_dev *dev;
3377 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3378 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3379 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3383 dev = &rte_eth_devices[port_id];
3384 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3385 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3389 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3390 struct rte_eth_pfc_conf *pfc_conf)
3392 struct rte_eth_dev *dev;
3394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3395 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3396 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3400 dev = &rte_eth_devices[port_id];
3401 /* High water, low water validation are device specific */
3402 if (*dev->dev_ops->priority_flow_ctrl_set)
3403 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3409 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3417 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3418 for (i = 0; i < num; i++) {
3419 if (reta_conf[i].mask)
3427 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3431 uint16_t i, idx, shift;
3437 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3441 for (i = 0; i < reta_size; i++) {
3442 idx = i / RTE_RETA_GROUP_SIZE;
3443 shift = i % RTE_RETA_GROUP_SIZE;
3444 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3445 (reta_conf[idx].reta[shift] >= max_rxq)) {
3447 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3449 reta_conf[idx].reta[shift], max_rxq);
3458 rte_eth_dev_rss_reta_update(uint16_t port_id,
3459 struct rte_eth_rss_reta_entry64 *reta_conf,
3462 struct rte_eth_dev *dev;
3465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3466 /* Check mask bits */
3467 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3471 dev = &rte_eth_devices[port_id];
3473 /* Check entry value */
3474 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3475 dev->data->nb_rx_queues);
3479 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3480 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3485 rte_eth_dev_rss_reta_query(uint16_t port_id,
3486 struct rte_eth_rss_reta_entry64 *reta_conf,
3489 struct rte_eth_dev *dev;
3492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3494 /* Check mask bits */
3495 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3499 dev = &rte_eth_devices[port_id];
3500 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3501 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3506 rte_eth_dev_rss_hash_update(uint16_t port_id,
3507 struct rte_eth_rss_conf *rss_conf)
3509 struct rte_eth_dev *dev;
3510 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3513 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3515 ret = rte_eth_dev_info_get(port_id, &dev_info);
3519 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3521 dev = &rte_eth_devices[port_id];
3522 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3523 dev_info.flow_type_rss_offloads) {
3525 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3526 port_id, rss_conf->rss_hf,
3527 dev_info.flow_type_rss_offloads);
3530 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3531 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3536 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3537 struct rte_eth_rss_conf *rss_conf)
3539 struct rte_eth_dev *dev;
3541 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3542 dev = &rte_eth_devices[port_id];
3543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3544 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3549 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3550 struct rte_eth_udp_tunnel *udp_tunnel)
3552 struct rte_eth_dev *dev;
3554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3555 if (udp_tunnel == NULL) {
3556 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3560 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3561 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3565 dev = &rte_eth_devices[port_id];
3566 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3567 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3572 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3573 struct rte_eth_udp_tunnel *udp_tunnel)
3575 struct rte_eth_dev *dev;
3577 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3578 dev = &rte_eth_devices[port_id];
3580 if (udp_tunnel == NULL) {
3581 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3585 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3586 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3590 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3591 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3596 rte_eth_led_on(uint16_t port_id)
3598 struct rte_eth_dev *dev;
3600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3601 dev = &rte_eth_devices[port_id];
3602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3603 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3607 rte_eth_led_off(uint16_t port_id)
3609 struct rte_eth_dev *dev;
3611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3612 dev = &rte_eth_devices[port_id];
3613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3614 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3618 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3622 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3624 struct rte_eth_dev_info dev_info;
3625 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3629 ret = rte_eth_dev_info_get(port_id, &dev_info);
3633 for (i = 0; i < dev_info.max_mac_addrs; i++)
3634 if (memcmp(addr, &dev->data->mac_addrs[i],
3635 RTE_ETHER_ADDR_LEN) == 0)
3641 static const struct rte_ether_addr null_mac_addr;
3644 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3647 struct rte_eth_dev *dev;
3652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3653 dev = &rte_eth_devices[port_id];
3654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3656 if (rte_is_zero_ether_addr(addr)) {
3657 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3661 if (pool >= ETH_64_POOLS) {
3662 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3666 index = get_mac_addr_index(port_id, addr);
3668 index = get_mac_addr_index(port_id, &null_mac_addr);
3670 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3675 pool_mask = dev->data->mac_pool_sel[index];
3677 /* Check if both MAC address and pool is already there, and do nothing */
3678 if (pool_mask & (1ULL << pool))
3683 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3686 /* Update address in NIC data structure */
3687 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3689 /* Update pool bitmap in NIC data structure */
3690 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3693 return eth_err(port_id, ret);
3697 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3699 struct rte_eth_dev *dev;
3702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3703 dev = &rte_eth_devices[port_id];
3704 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3706 index = get_mac_addr_index(port_id, addr);
3709 "Port %u: Cannot remove default MAC address\n",
3712 } else if (index < 0)
3713 return 0; /* Do nothing if address wasn't found */
3716 (*dev->dev_ops->mac_addr_remove)(dev, index);
3718 /* Update address in NIC data structure */
3719 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3721 /* reset pool bitmap */
3722 dev->data->mac_pool_sel[index] = 0;
3728 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3730 struct rte_eth_dev *dev;
3733 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3735 if (!rte_is_valid_assigned_ether_addr(addr))
3738 dev = &rte_eth_devices[port_id];
3739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3741 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3745 /* Update default address in NIC data structure */
3746 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3753 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3757 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3759 struct rte_eth_dev_info dev_info;
3760 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3764 ret = rte_eth_dev_info_get(port_id, &dev_info);
3768 if (!dev->data->hash_mac_addrs)
3771 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3772 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3773 RTE_ETHER_ADDR_LEN) == 0)
3780 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3785 struct rte_eth_dev *dev;
3787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3789 dev = &rte_eth_devices[port_id];
3790 if (rte_is_zero_ether_addr(addr)) {
3791 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3796 index = get_hash_mac_addr_index(port_id, addr);
3797 /* Check if it's already there, and do nothing */
3798 if ((index >= 0) && on)
3804 "Port %u: the MAC address was not set in UTA\n",
3809 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3811 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3818 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3820 /* Update address in NIC data structure */
3822 rte_ether_addr_copy(addr,
3823 &dev->data->hash_mac_addrs[index]);
3825 rte_ether_addr_copy(&null_mac_addr,
3826 &dev->data->hash_mac_addrs[index]);
3829 return eth_err(port_id, ret);
3833 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3835 struct rte_eth_dev *dev;
3837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3839 dev = &rte_eth_devices[port_id];
3841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3842 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3846 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3849 struct rte_eth_dev *dev;
3850 struct rte_eth_dev_info dev_info;
3851 struct rte_eth_link link;
3854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3856 ret = rte_eth_dev_info_get(port_id, &dev_info);
3860 dev = &rte_eth_devices[port_id];
3861 link = dev->data->dev_link;
3863 if (queue_idx > dev_info.max_tx_queues) {
3865 "Set queue rate limit:port %u: invalid queue id=%u\n",
3866 port_id, queue_idx);
3870 if (tx_rate > link.link_speed) {
3872 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3873 tx_rate, link.link_speed);
3877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3878 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3879 queue_idx, tx_rate));
3883 rte_eth_mirror_rule_set(uint16_t port_id,
3884 struct rte_eth_mirror_conf *mirror_conf,
3885 uint8_t rule_id, uint8_t on)
3887 struct rte_eth_dev *dev;
3889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3890 if (mirror_conf->rule_type == 0) {
3891 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3895 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3896 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3901 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3902 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3903 (mirror_conf->pool_mask == 0)) {
3905 "Invalid mirror pool, pool mask can not be 0\n");
3909 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3910 mirror_conf->vlan.vlan_mask == 0) {
3912 "Invalid vlan mask, vlan mask can not be 0\n");
3916 dev = &rte_eth_devices[port_id];
3917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3919 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3920 mirror_conf, rule_id, on));
3924 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3926 struct rte_eth_dev *dev;
3928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3930 dev = &rte_eth_devices[port_id];
3931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3933 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3937 RTE_INIT(eth_dev_init_cb_lists)
3941 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3942 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3946 rte_eth_dev_callback_register(uint16_t port_id,
3947 enum rte_eth_event_type event,
3948 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3950 struct rte_eth_dev *dev;
3951 struct rte_eth_dev_callback *user_cb;
3952 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3958 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3959 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3963 if (port_id == RTE_ETH_ALL) {
3965 last_port = RTE_MAX_ETHPORTS - 1;
3967 next_port = last_port = port_id;
3970 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3973 dev = &rte_eth_devices[next_port];
3975 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3976 if (user_cb->cb_fn == cb_fn &&
3977 user_cb->cb_arg == cb_arg &&
3978 user_cb->event == event) {
3983 /* create a new callback. */
3984 if (user_cb == NULL) {
3985 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3986 sizeof(struct rte_eth_dev_callback), 0);
3987 if (user_cb != NULL) {
3988 user_cb->cb_fn = cb_fn;
3989 user_cb->cb_arg = cb_arg;
3990 user_cb->event = event;
3991 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3994 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3995 rte_eth_dev_callback_unregister(port_id, event,
4001 } while (++next_port <= last_port);
4003 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4008 rte_eth_dev_callback_unregister(uint16_t port_id,
4009 enum rte_eth_event_type event,
4010 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4013 struct rte_eth_dev *dev;
4014 struct rte_eth_dev_callback *cb, *next;
4015 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4021 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4022 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4026 if (port_id == RTE_ETH_ALL) {
4028 last_port = RTE_MAX_ETHPORTS - 1;
4030 next_port = last_port = port_id;
4033 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4036 dev = &rte_eth_devices[next_port];
4038 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4041 next = TAILQ_NEXT(cb, next);
4043 if (cb->cb_fn != cb_fn || cb->event != event ||
4044 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4048 * if this callback is not executing right now,
4051 if (cb->active == 0) {
4052 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4058 } while (++next_port <= last_port);
4060 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4065 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4066 enum rte_eth_event_type event, void *ret_param)
4068 struct rte_eth_dev_callback *cb_lst;
4069 struct rte_eth_dev_callback dev_cb;
4072 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4073 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4074 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4078 if (ret_param != NULL)
4079 dev_cb.ret_param = ret_param;
4081 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4082 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4083 dev_cb.cb_arg, dev_cb.ret_param);
4084 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4087 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4092 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4097 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4099 dev->state = RTE_ETH_DEV_ATTACHED;
4103 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4106 struct rte_eth_dev *dev;
4107 struct rte_intr_handle *intr_handle;
4111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4113 dev = &rte_eth_devices[port_id];
4115 if (!dev->intr_handle) {
4116 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4120 intr_handle = dev->intr_handle;
4121 if (!intr_handle->intr_vec) {
4122 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4126 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4127 vec = intr_handle->intr_vec[qid];
4128 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4129 if (rc && rc != -EEXIST) {
4131 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4132 port_id, qid, op, epfd, vec);
4140 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4142 struct rte_intr_handle *intr_handle;
4143 struct rte_eth_dev *dev;
4144 unsigned int efd_idx;
4148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4150 dev = &rte_eth_devices[port_id];
4152 if (queue_id >= dev->data->nb_rx_queues) {
4153 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4157 if (!dev->intr_handle) {
4158 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4162 intr_handle = dev->intr_handle;
4163 if (!intr_handle->intr_vec) {
4164 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4168 vec = intr_handle->intr_vec[queue_id];
4169 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4170 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4171 fd = intr_handle->efds[efd_idx];
4176 const struct rte_memzone *
4177 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4178 uint16_t queue_id, size_t size, unsigned align,
4181 char z_name[RTE_MEMZONE_NAMESIZE];
4182 const struct rte_memzone *mz;
4185 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4186 dev->data->port_id, queue_id, ring_name);
4187 if (rc >= RTE_MEMZONE_NAMESIZE) {
4188 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4189 rte_errno = ENAMETOOLONG;
4193 mz = rte_memzone_lookup(z_name);
4197 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4198 RTE_MEMZONE_IOVA_CONTIG, align);
4202 rte_eth_dev_create(struct rte_device *device, const char *name,
4203 size_t priv_data_size,
4204 ethdev_bus_specific_init ethdev_bus_specific_init,
4205 void *bus_init_params,
4206 ethdev_init_t ethdev_init, void *init_params)
4208 struct rte_eth_dev *ethdev;
4211 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4213 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4214 ethdev = rte_eth_dev_allocate(name);
4218 if (priv_data_size) {
4219 ethdev->data->dev_private = rte_zmalloc_socket(
4220 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4223 if (!ethdev->data->dev_private) {
4224 RTE_LOG(ERR, EAL, "failed to allocate private data");
4230 ethdev = rte_eth_dev_attach_secondary(name);
4232 RTE_LOG(ERR, EAL, "secondary process attach failed, "
4233 "ethdev doesn't exist");
4238 ethdev->device = device;
4240 if (ethdev_bus_specific_init) {
4241 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4244 "ethdev bus specific initialisation failed");
4249 retval = ethdev_init(ethdev, init_params);
4251 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
4255 rte_eth_dev_probing_finish(ethdev);
4260 rte_eth_dev_release_port(ethdev);
4265 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4266 ethdev_uninit_t ethdev_uninit)
4270 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4274 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4276 ret = ethdev_uninit(ethdev);
4280 return rte_eth_dev_release_port(ethdev);
4284 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4285 int epfd, int op, void *data)
4288 struct rte_eth_dev *dev;
4289 struct rte_intr_handle *intr_handle;
4292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4294 dev = &rte_eth_devices[port_id];
4295 if (queue_id >= dev->data->nb_rx_queues) {
4296 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4300 if (!dev->intr_handle) {
4301 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4305 intr_handle = dev->intr_handle;
4306 if (!intr_handle->intr_vec) {
4307 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4311 vec = intr_handle->intr_vec[queue_id];
4312 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4313 if (rc && rc != -EEXIST) {
4315 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4316 port_id, queue_id, op, epfd, vec);
4324 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4327 struct rte_eth_dev *dev;
4329 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4331 dev = &rte_eth_devices[port_id];
4333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4334 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4339 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4342 struct rte_eth_dev *dev;
4344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4346 dev = &rte_eth_devices[port_id];
4348 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4349 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4355 rte_eth_dev_filter_supported(uint16_t port_id,
4356 enum rte_filter_type filter_type)
4358 struct rte_eth_dev *dev;
4360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4362 dev = &rte_eth_devices[port_id];
4363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4364 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4365 RTE_ETH_FILTER_NOP, NULL);
4369 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4370 enum rte_filter_op filter_op, void *arg)
4372 struct rte_eth_dev *dev;
4374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4376 dev = &rte_eth_devices[port_id];
4377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4378 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4382 const struct rte_eth_rxtx_callback *
4383 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4384 rte_rx_callback_fn fn, void *user_param)
4386 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4387 rte_errno = ENOTSUP;
4390 struct rte_eth_dev *dev;
4392 /* check input parameters */
4393 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4394 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4398 dev = &rte_eth_devices[port_id];
4399 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4403 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4411 cb->param = user_param;
4413 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4414 /* Add the callbacks in fifo order. */
4415 struct rte_eth_rxtx_callback *tail =
4416 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4419 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4426 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4431 const struct rte_eth_rxtx_callback *
4432 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4433 rte_rx_callback_fn fn, void *user_param)
4435 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4436 rte_errno = ENOTSUP;
4439 /* check input parameters */
4440 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4441 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4446 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4454 cb->param = user_param;
4456 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4457 /* Add the callbacks at fisrt position*/
4458 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4460 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4461 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4466 const struct rte_eth_rxtx_callback *
4467 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4468 rte_tx_callback_fn fn, void *user_param)
4470 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4471 rte_errno = ENOTSUP;
4474 struct rte_eth_dev *dev;
4476 /* check input parameters */
4477 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4478 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4483 dev = &rte_eth_devices[port_id];
4484 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4489 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4497 cb->param = user_param;
4499 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4500 /* Add the callbacks in fifo order. */
4501 struct rte_eth_rxtx_callback *tail =
4502 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4505 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4512 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4518 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4519 const struct rte_eth_rxtx_callback *user_cb)
4521 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4524 /* Check input parameters. */
4525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4526 if (user_cb == NULL ||
4527 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4530 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4531 struct rte_eth_rxtx_callback *cb;
4532 struct rte_eth_rxtx_callback **prev_cb;
4535 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4536 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4537 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4539 if (cb == user_cb) {
4540 /* Remove the user cb from the callback list. */
4541 *prev_cb = cb->next;
4546 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4552 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4553 const struct rte_eth_rxtx_callback *user_cb)
4555 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4558 /* Check input parameters. */
4559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4560 if (user_cb == NULL ||
4561 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4564 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4566 struct rte_eth_rxtx_callback *cb;
4567 struct rte_eth_rxtx_callback **prev_cb;
4569 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4570 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4571 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4573 if (cb == user_cb) {
4574 /* Remove the user cb from the callback list. */
4575 *prev_cb = cb->next;
4580 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4586 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4587 struct rte_eth_rxq_info *qinfo)
4589 struct rte_eth_dev *dev;
4591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4596 dev = &rte_eth_devices[port_id];
4597 if (queue_id >= dev->data->nb_rx_queues) {
4598 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4602 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4603 RTE_ETHDEV_LOG(INFO,
4604 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4611 memset(qinfo, 0, sizeof(*qinfo));
4612 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4617 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4618 struct rte_eth_txq_info *qinfo)
4620 struct rte_eth_dev *dev;
4622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4627 dev = &rte_eth_devices[port_id];
4628 if (queue_id >= dev->data->nb_tx_queues) {
4629 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4633 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4634 RTE_ETHDEV_LOG(INFO,
4635 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4640 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4642 memset(qinfo, 0, sizeof(*qinfo));
4643 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4649 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4650 struct rte_eth_burst_mode *mode)
4652 struct rte_eth_dev *dev;
4654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4659 dev = &rte_eth_devices[port_id];
4661 if (queue_id >= dev->data->nb_rx_queues) {
4662 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4667 memset(mode, 0, sizeof(*mode));
4668 return eth_err(port_id,
4669 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4673 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4674 struct rte_eth_burst_mode *mode)
4676 struct rte_eth_dev *dev;
4678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4683 dev = &rte_eth_devices[port_id];
4685 if (queue_id >= dev->data->nb_tx_queues) {
4686 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4691 memset(mode, 0, sizeof(*mode));
4692 return eth_err(port_id,
4693 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4697 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4698 struct rte_ether_addr *mc_addr_set,
4699 uint32_t nb_mc_addr)
4701 struct rte_eth_dev *dev;
4703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4705 dev = &rte_eth_devices[port_id];
4706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4707 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4708 mc_addr_set, nb_mc_addr));
4712 rte_eth_timesync_enable(uint16_t port_id)
4714 struct rte_eth_dev *dev;
4716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4717 dev = &rte_eth_devices[port_id];
4719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4720 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4724 rte_eth_timesync_disable(uint16_t port_id)
4726 struct rte_eth_dev *dev;
4728 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4729 dev = &rte_eth_devices[port_id];
4731 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4732 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4736 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4739 struct rte_eth_dev *dev;
4741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4742 dev = &rte_eth_devices[port_id];
4744 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4745 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4746 (dev, timestamp, flags));
4750 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4751 struct timespec *timestamp)
4753 struct rte_eth_dev *dev;
4755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4756 dev = &rte_eth_devices[port_id];
4758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4759 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4764 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4766 struct rte_eth_dev *dev;
4768 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4769 dev = &rte_eth_devices[port_id];
4771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4772 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4777 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4779 struct rte_eth_dev *dev;
4781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4782 dev = &rte_eth_devices[port_id];
4784 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4785 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4790 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4792 struct rte_eth_dev *dev;
4794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4795 dev = &rte_eth_devices[port_id];
4797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4798 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4803 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4805 struct rte_eth_dev *dev;
4807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4808 dev = &rte_eth_devices[port_id];
4810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4811 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4815 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4817 struct rte_eth_dev *dev;
4819 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4821 dev = &rte_eth_devices[port_id];
4822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4823 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4827 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4829 struct rte_eth_dev *dev;
4831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4833 dev = &rte_eth_devices[port_id];
4834 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4835 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4839 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4841 struct rte_eth_dev *dev;
4843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4845 dev = &rte_eth_devices[port_id];
4846 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4847 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4851 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4853 struct rte_eth_dev *dev;
4855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4857 dev = &rte_eth_devices[port_id];
4858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4859 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4863 rte_eth_dev_get_module_info(uint16_t port_id,
4864 struct rte_eth_dev_module_info *modinfo)
4866 struct rte_eth_dev *dev;
4868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4870 dev = &rte_eth_devices[port_id];
4871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4872 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4876 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4877 struct rte_dev_eeprom_info *info)
4879 struct rte_eth_dev *dev;
4881 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4883 dev = &rte_eth_devices[port_id];
4884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4885 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4889 rte_eth_dev_get_dcb_info(uint16_t port_id,
4890 struct rte_eth_dcb_info *dcb_info)
4892 struct rte_eth_dev *dev;
4894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4896 dev = &rte_eth_devices[port_id];
4897 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4900 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4904 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4905 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4907 struct rte_eth_dev *dev;
4909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4910 if (l2_tunnel == NULL) {
4911 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4915 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4916 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4920 dev = &rte_eth_devices[port_id];
4921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4923 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4928 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4929 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4933 struct rte_eth_dev *dev;
4935 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4937 if (l2_tunnel == NULL) {
4938 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4942 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4943 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4948 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4952 dev = &rte_eth_devices[port_id];
4953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4955 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4956 l2_tunnel, mask, en));
4960 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4961 const struct rte_eth_desc_lim *desc_lim)
4963 if (desc_lim->nb_align != 0)
4964 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4966 if (desc_lim->nb_max != 0)
4967 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4969 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4973 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4974 uint16_t *nb_rx_desc,
4975 uint16_t *nb_tx_desc)
4977 struct rte_eth_dev_info dev_info;
4980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4982 ret = rte_eth_dev_info_get(port_id, &dev_info);
4986 if (nb_rx_desc != NULL)
4987 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4989 if (nb_tx_desc != NULL)
4990 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4996 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
4997 struct rte_eth_hairpin_cap *cap)
4999 struct rte_eth_dev *dev;
5001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5003 dev = &rte_eth_devices[port_id];
5004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5005 memset(cap, 0, sizeof(*cap));
5006 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5010 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5012 if (dev->data->rx_queue_state[queue_id] ==
5013 RTE_ETH_QUEUE_STATE_HAIRPIN)
5019 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5021 if (dev->data->tx_queue_state[queue_id] ==
5022 RTE_ETH_QUEUE_STATE_HAIRPIN)
5028 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5030 struct rte_eth_dev *dev;
5032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5037 dev = &rte_eth_devices[port_id];
5039 if (*dev->dev_ops->pool_ops_supported == NULL)
5040 return 1; /* all pools are supported */
5042 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5046 * A set of values to describe the possible states of a switch domain.
5048 enum rte_eth_switch_domain_state {
5049 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5050 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5054 * Array of switch domains available for allocation. Array is sized to
5055 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5056 * ethdev ports in a single process.
5058 static struct rte_eth_dev_switch {
5059 enum rte_eth_switch_domain_state state;
5060 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5063 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5067 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5069 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5070 if (rte_eth_switch_domains[i].state ==
5071 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5072 rte_eth_switch_domains[i].state =
5073 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5083 rte_eth_switch_domain_free(uint16_t domain_id)
5085 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5086 domain_id >= RTE_MAX_ETHPORTS)
5089 if (rte_eth_switch_domains[domain_id].state !=
5090 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5093 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5099 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5102 struct rte_kvargs_pair *pair;
5105 arglist->str = strdup(str_in);
5106 if (arglist->str == NULL)
5109 letter = arglist->str;
5112 pair = &arglist->pairs[0];
5115 case 0: /* Initial */
5118 else if (*letter == '\0')
5125 case 1: /* Parsing key */
5126 if (*letter == '=') {
5128 pair->value = letter + 1;
5130 } else if (*letter == ',' || *letter == '\0')
5135 case 2: /* Parsing value */
5138 else if (*letter == ',') {
5141 pair = &arglist->pairs[arglist->count];
5143 } else if (*letter == '\0') {
5146 pair = &arglist->pairs[arglist->count];
5151 case 3: /* Parsing list */
5154 else if (*letter == '\0')
5163 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5165 struct rte_kvargs args;
5166 struct rte_kvargs_pair *pair;
5170 memset(eth_da, 0, sizeof(*eth_da));
5172 result = rte_eth_devargs_tokenise(&args, dargs);
5176 for (i = 0; i < args.count; i++) {
5177 pair = &args.pairs[i];
5178 if (strcmp("representor", pair->key) == 0) {
5179 result = rte_eth_devargs_parse_list(pair->value,
5180 rte_eth_devargs_parse_representor_ports,
5194 RTE_INIT(ethdev_init_log)
5196 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
5197 if (rte_eth_dev_logtype >= 0)
5198 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);