1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 static int ethdev_logtype;
47 #define ethdev_log(level, fmt, ...) \
48 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
50 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
51 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 static uint16_t eth_dev_last_created_port;
54 /* spinlock for eth device callbacks */
55 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove rx callbacks */
58 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for add/remove tx callbacks */
61 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
63 /* spinlock for shared data allocation */
64 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66 /* store statistics names and its offset in stats structure */
67 struct rte_eth_xstats_name_off {
68 char name[RTE_ETH_XSTATS_NAME_SIZE];
72 /* Shared memory between primary and secondary processes. */
74 uint64_t next_owner_id;
75 rte_spinlock_t ownership_lock;
76 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
77 } *rte_eth_dev_shared_data;
79 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
80 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
81 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
82 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
83 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
84 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
85 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
86 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
87 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
91 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
93 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
94 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
95 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
96 {"errors", offsetof(struct rte_eth_stats, q_errors)},
99 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
100 sizeof(rte_rxq_stats_strings[0]))
102 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
103 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
104 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
106 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
107 sizeof(rte_txq_stats_strings[0]))
109 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
110 { DEV_RX_OFFLOAD_##_name, #_name }
112 static const struct {
115 } rte_rx_offload_names[] = {
116 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
117 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
121 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
123 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
124 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
126 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
127 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
128 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
129 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
130 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
131 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
163 #undef RTE_TX_OFFLOAD_BIT2STR
166 * The user application callback description.
168 * It contains callback address to be registered by user application,
169 * the pointer to the parameters for callback, and the event type.
171 struct rte_eth_dev_callback {
172 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
173 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
174 void *cb_arg; /**< Parameter for callback */
175 void *ret_param; /**< Return parameter */
176 enum rte_eth_event_type event; /**< Interrupt event type */
177 uint32_t active; /**< Callback is executing */
186 rte_eth_find_next(uint16_t port_id)
188 while (port_id < RTE_MAX_ETHPORTS &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
190 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
193 if (port_id >= RTE_MAX_ETHPORTS)
194 return RTE_MAX_ETHPORTS;
200 rte_eth_dev_shared_data_prepare(void)
202 const unsigned flags = 0;
203 const struct rte_memzone *mz;
205 rte_spinlock_lock(&rte_eth_shared_data_lock);
207 if (rte_eth_dev_shared_data == NULL) {
208 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
209 /* Allocate port data and ownership shared memory. */
210 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
211 sizeof(*rte_eth_dev_shared_data),
212 rte_socket_id(), flags);
214 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
216 rte_panic("Cannot allocate ethdev shared data\n");
218 rte_eth_dev_shared_data = mz->addr;
219 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
220 rte_eth_dev_shared_data->next_owner_id =
221 RTE_ETH_DEV_NO_OWNER + 1;
222 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
223 memset(rte_eth_dev_shared_data->data, 0,
224 sizeof(rte_eth_dev_shared_data->data));
228 rte_spinlock_unlock(&rte_eth_shared_data_lock);
232 is_allocated(const struct rte_eth_dev *ethdev)
234 return ethdev->data->name[0] != '\0';
237 static struct rte_eth_dev *
238 _rte_eth_dev_allocated(const char *name)
242 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
243 if (rte_eth_devices[i].data != NULL &&
244 strcmp(rte_eth_devices[i].data->name, name) == 0)
245 return &rte_eth_devices[i];
251 rte_eth_dev_allocated(const char *name)
253 struct rte_eth_dev *ethdev;
255 rte_eth_dev_shared_data_prepare();
257 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
259 ethdev = _rte_eth_dev_allocated(name);
261 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
267 rte_eth_dev_find_free_port(void)
271 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
272 /* Using shared name field to find a free port. */
273 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
274 RTE_ASSERT(rte_eth_devices[i].state ==
279 return RTE_MAX_ETHPORTS;
282 static struct rte_eth_dev *
283 eth_dev_get(uint16_t port_id)
285 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
287 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
289 eth_dev_last_created_port = port_id;
295 rte_eth_dev_allocate(const char *name)
298 struct rte_eth_dev *eth_dev = NULL;
300 rte_eth_dev_shared_data_prepare();
302 /* Synchronize port creation between primary and secondary threads. */
303 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
305 if (_rte_eth_dev_allocated(name) != NULL) {
306 ethdev_log(ERR, "Ethernet device with name %s already allocated",
311 port_id = rte_eth_dev_find_free_port();
312 if (port_id == RTE_MAX_ETHPORTS) {
313 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
317 eth_dev = eth_dev_get(port_id);
318 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
319 eth_dev->data->port_id = port_id;
320 eth_dev->data->mtu = ETHER_MTU;
323 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
329 * Attach to a port already registered by the primary process, which
330 * makes sure that the same device would have the same port id both
331 * in the primary and secondary process.
334 rte_eth_dev_attach_secondary(const char *name)
337 struct rte_eth_dev *eth_dev = NULL;
339 rte_eth_dev_shared_data_prepare();
341 /* Synchronize port attachment to primary port creation and release. */
342 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
344 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
345 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
348 if (i == RTE_MAX_ETHPORTS) {
350 "device %s is not driven by the primary process\n",
353 eth_dev = eth_dev_get(i);
354 RTE_ASSERT(eth_dev->data->port_id == i);
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
362 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
367 rte_eth_dev_shared_data_prepare();
369 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
371 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
373 eth_dev->state = RTE_ETH_DEV_UNUSED;
375 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
377 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
383 rte_eth_dev_is_valid_port(uint16_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
393 rte_eth_is_valid_owner_id(uint64_t owner_id)
395 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
396 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
397 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016"PRIX64".\n", owner_id);
404 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
406 while (port_id < RTE_MAX_ETHPORTS &&
407 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
408 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
409 rte_eth_devices[port_id].data->owner.id != owner_id))
412 if (port_id >= RTE_MAX_ETHPORTS)
413 return RTE_MAX_ETHPORTS;
418 int __rte_experimental
419 rte_eth_dev_owner_new(uint64_t *owner_id)
421 rte_eth_dev_shared_data_prepare();
423 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
425 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
427 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
432 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
433 const struct rte_eth_dev_owner *new_owner)
435 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
436 struct rte_eth_dev_owner *port_owner;
439 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
440 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
444 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
445 !rte_eth_is_valid_owner_id(old_owner_id))
448 port_owner = &rte_eth_devices[port_id].data->owner;
449 if (port_owner->id != old_owner_id) {
450 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
451 " by %s_%016"PRIX64".\n", port_id,
452 port_owner->name, port_owner->id);
456 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
458 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
459 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
462 port_owner->id = new_owner->id;
464 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016"PRIX64".\n", port_id,
465 new_owner->name, new_owner->id);
470 int __rte_experimental
471 rte_eth_dev_owner_set(const uint16_t port_id,
472 const struct rte_eth_dev_owner *owner)
476 rte_eth_dev_shared_data_prepare();
478 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
480 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
482 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
486 int __rte_experimental
487 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
489 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
490 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
493 rte_eth_dev_shared_data_prepare();
495 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
497 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
499 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
503 void __rte_experimental
504 rte_eth_dev_owner_delete(const uint64_t owner_id)
508 rte_eth_dev_shared_data_prepare();
510 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
512 if (rte_eth_is_valid_owner_id(owner_id)) {
513 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
514 if (rte_eth_devices[port_id].data->owner.id == owner_id)
515 memset(&rte_eth_devices[port_id].data->owner, 0,
516 sizeof(struct rte_eth_dev_owner));
517 RTE_PMD_DEBUG_TRACE("All port owners owned by %016"PRIX64
518 " identifier have removed.\n", owner_id);
521 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
524 int __rte_experimental
525 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
528 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
530 rte_eth_dev_shared_data_prepare();
532 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
534 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
535 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
538 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
541 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
546 rte_eth_dev_socket_id(uint16_t port_id)
548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
549 return rte_eth_devices[port_id].data->numa_node;
553 rte_eth_dev_get_sec_ctx(uint16_t port_id)
555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
556 return rte_eth_devices[port_id].security_ctx;
560 rte_eth_dev_count(void)
562 return rte_eth_dev_count_avail();
566 rte_eth_dev_count_avail(void)
573 RTE_ETH_FOREACH_DEV(p)
579 uint16_t __rte_experimental
580 rte_eth_dev_count_total(void)
582 uint16_t port, count = 0;
584 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
585 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
592 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
599 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
603 /* shouldn't check 'rte_eth_devices[i].data',
604 * because it might be overwritten by VDEV PMD */
605 tmp = rte_eth_dev_shared_data->data[port_id].name;
611 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
616 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
620 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
621 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
622 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
632 eth_err(uint16_t port_id, int ret)
636 if (rte_eth_dev_is_removed(port_id))
641 /* attach the new device, then store port_id of the device */
643 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
645 int current = rte_eth_dev_count_total();
646 struct rte_devargs da;
649 memset(&da, 0, sizeof(da));
651 if ((devargs == NULL) || (port_id == NULL)) {
657 if (rte_devargs_parse(&da, "%s", devargs))
660 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
664 /* no point looking at the port count if no port exists */
665 if (!rte_eth_dev_count_total()) {
666 ethdev_log(ERR, "No port found for device (%s)", da.name);
671 /* if nothing happened, there is a bug here, since some driver told us
672 * it did attach a device, but did not create a port.
673 * FIXME: race condition in case of plug-out of another device
675 if (current == rte_eth_dev_count_total()) {
680 *port_id = eth_dev_last_created_port;
688 /* detach the device, then store the name of the device */
690 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
692 struct rte_device *dev;
697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
699 dev_flags = rte_eth_devices[port_id].data->dev_flags;
700 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
702 "Port %" PRIu16 " is bonded, cannot detach", port_id);
706 dev = rte_eth_devices[port_id].device;
710 bus = rte_bus_find_by_device(dev);
714 ret = rte_eal_hotplug_remove(bus->name, dev->name);
718 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
723 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
725 uint16_t old_nb_queues = dev->data->nb_rx_queues;
729 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
730 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
731 sizeof(dev->data->rx_queues[0]) * nb_queues,
732 RTE_CACHE_LINE_SIZE);
733 if (dev->data->rx_queues == NULL) {
734 dev->data->nb_rx_queues = 0;
737 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
738 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
740 rxq = dev->data->rx_queues;
742 for (i = nb_queues; i < old_nb_queues; i++)
743 (*dev->dev_ops->rx_queue_release)(rxq[i]);
744 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
745 RTE_CACHE_LINE_SIZE);
748 if (nb_queues > old_nb_queues) {
749 uint16_t new_qs = nb_queues - old_nb_queues;
751 memset(rxq + old_nb_queues, 0,
752 sizeof(rxq[0]) * new_qs);
755 dev->data->rx_queues = rxq;
757 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
760 rxq = dev->data->rx_queues;
762 for (i = nb_queues; i < old_nb_queues; i++)
763 (*dev->dev_ops->rx_queue_release)(rxq[i]);
765 rte_free(dev->data->rx_queues);
766 dev->data->rx_queues = NULL;
768 dev->data->nb_rx_queues = nb_queues;
773 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
775 struct rte_eth_dev *dev;
777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
779 dev = &rte_eth_devices[port_id];
780 if (!dev->data->dev_started) {
782 "port %d must be started before start any queue\n", port_id);
786 if (rx_queue_id >= dev->data->nb_rx_queues) {
787 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
793 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
794 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
795 " already started\n",
796 rx_queue_id, port_id);
800 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
806 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
808 struct rte_eth_dev *dev;
810 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
812 dev = &rte_eth_devices[port_id];
813 if (rx_queue_id >= dev->data->nb_rx_queues) {
814 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
820 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
821 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
822 " already stopped\n",
823 rx_queue_id, port_id);
827 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
832 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
834 struct rte_eth_dev *dev;
836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
838 dev = &rte_eth_devices[port_id];
839 if (!dev->data->dev_started) {
841 "port %d must be started before start any queue\n", port_id);
845 if (tx_queue_id >= dev->data->nb_tx_queues) {
846 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
852 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
853 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
854 " already started\n",
855 tx_queue_id, port_id);
859 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
865 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
867 struct rte_eth_dev *dev;
869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
871 dev = &rte_eth_devices[port_id];
872 if (tx_queue_id >= dev->data->nb_tx_queues) {
873 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
879 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
880 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
881 " already stopped\n",
882 tx_queue_id, port_id);
886 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
891 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
893 uint16_t old_nb_queues = dev->data->nb_tx_queues;
897 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
898 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
899 sizeof(dev->data->tx_queues[0]) * nb_queues,
900 RTE_CACHE_LINE_SIZE);
901 if (dev->data->tx_queues == NULL) {
902 dev->data->nb_tx_queues = 0;
905 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
908 txq = dev->data->tx_queues;
910 for (i = nb_queues; i < old_nb_queues; i++)
911 (*dev->dev_ops->tx_queue_release)(txq[i]);
912 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
913 RTE_CACHE_LINE_SIZE);
916 if (nb_queues > old_nb_queues) {
917 uint16_t new_qs = nb_queues - old_nb_queues;
919 memset(txq + old_nb_queues, 0,
920 sizeof(txq[0]) * new_qs);
923 dev->data->tx_queues = txq;
925 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
928 txq = dev->data->tx_queues;
930 for (i = nb_queues; i < old_nb_queues; i++)
931 (*dev->dev_ops->tx_queue_release)(txq[i]);
933 rte_free(dev->data->tx_queues);
934 dev->data->tx_queues = NULL;
936 dev->data->nb_tx_queues = nb_queues;
941 rte_eth_speed_bitflag(uint32_t speed, int duplex)
944 case ETH_SPEED_NUM_10M:
945 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
946 case ETH_SPEED_NUM_100M:
947 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
948 case ETH_SPEED_NUM_1G:
949 return ETH_LINK_SPEED_1G;
950 case ETH_SPEED_NUM_2_5G:
951 return ETH_LINK_SPEED_2_5G;
952 case ETH_SPEED_NUM_5G:
953 return ETH_LINK_SPEED_5G;
954 case ETH_SPEED_NUM_10G:
955 return ETH_LINK_SPEED_10G;
956 case ETH_SPEED_NUM_20G:
957 return ETH_LINK_SPEED_20G;
958 case ETH_SPEED_NUM_25G:
959 return ETH_LINK_SPEED_25G;
960 case ETH_SPEED_NUM_40G:
961 return ETH_LINK_SPEED_40G;
962 case ETH_SPEED_NUM_50G:
963 return ETH_LINK_SPEED_50G;
964 case ETH_SPEED_NUM_56G:
965 return ETH_LINK_SPEED_56G;
966 case ETH_SPEED_NUM_100G:
967 return ETH_LINK_SPEED_100G;
974 * A conversion function from rxmode bitfield API.
977 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
978 uint64_t *rx_offloads)
980 uint64_t offloads = 0;
982 if (rxmode->header_split == 1)
983 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
984 if (rxmode->hw_ip_checksum == 1)
985 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
986 if (rxmode->hw_vlan_filter == 1)
987 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
988 if (rxmode->hw_vlan_strip == 1)
989 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
990 if (rxmode->hw_vlan_extend == 1)
991 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
992 if (rxmode->jumbo_frame == 1)
993 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
994 if (rxmode->hw_strip_crc == 1)
995 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
996 if (rxmode->enable_scatter == 1)
997 offloads |= DEV_RX_OFFLOAD_SCATTER;
998 if (rxmode->enable_lro == 1)
999 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
1000 if (rxmode->hw_timestamp == 1)
1001 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
1002 if (rxmode->security == 1)
1003 offloads |= DEV_RX_OFFLOAD_SECURITY;
1005 *rx_offloads = offloads;
1008 const char * __rte_experimental
1009 rte_eth_dev_rx_offload_name(uint64_t offload)
1011 const char *name = "UNKNOWN";
1014 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1015 if (offload == rte_rx_offload_names[i].offload) {
1016 name = rte_rx_offload_names[i].name;
1024 const char * __rte_experimental
1025 rte_eth_dev_tx_offload_name(uint64_t offload)
1027 const char *name = "UNKNOWN";
1030 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1031 if (offload == rte_tx_offload_names[i].offload) {
1032 name = rte_tx_offload_names[i].name;
1041 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1042 const struct rte_eth_conf *dev_conf)
1044 struct rte_eth_dev *dev;
1045 struct rte_eth_dev_info dev_info;
1046 struct rte_eth_conf local_conf = *dev_conf;
1049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1051 dev = &rte_eth_devices[port_id];
1053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1054 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1056 rte_eth_dev_info_get(port_id, &dev_info);
1058 /* If number of queues specified by application for both Rx and Tx is
1059 * zero, use driver preferred values. This cannot be done individually
1060 * as it is valid for either Tx or Rx (but not both) to be zero.
1061 * If driver does not provide any preferred valued, fall back on
1064 if (nb_rx_q == 0 && nb_tx_q == 0) {
1065 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1067 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1068 nb_tx_q = dev_info.default_txportconf.nb_queues;
1070 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1073 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1074 RTE_PMD_DEBUG_TRACE(
1075 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1076 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1080 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1081 RTE_PMD_DEBUG_TRACE(
1082 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1083 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1087 if (dev->data->dev_started) {
1088 RTE_PMD_DEBUG_TRACE(
1089 "port %d must be stopped to allow configuration\n", port_id);
1094 * Convert between the offloads API to enable PMDs to support
1097 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1098 rte_eth_convert_rx_offload_bitfield(
1099 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1101 /* Copy the dev_conf parameter into the dev structure */
1102 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1105 * Check that the numbers of RX and TX queues are not greater
1106 * than the maximum number of RX and TX queues supported by the
1107 * configured device.
1109 if (nb_rx_q > dev_info.max_rx_queues) {
1110 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1111 port_id, nb_rx_q, dev_info.max_rx_queues);
1115 if (nb_tx_q > dev_info.max_tx_queues) {
1116 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1117 port_id, nb_tx_q, dev_info.max_tx_queues);
1121 /* Check that the device supports requested interrupts */
1122 if ((dev_conf->intr_conf.lsc == 1) &&
1123 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1124 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1125 dev->device->driver->name);
1128 if ((dev_conf->intr_conf.rmv == 1) &&
1129 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1130 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1131 dev->device->driver->name);
1136 * If jumbo frames are enabled, check that the maximum RX packet
1137 * length is supported by the configured device.
1139 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1140 if (dev_conf->rxmode.max_rx_pkt_len >
1141 dev_info.max_rx_pktlen) {
1142 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1143 " > max valid value %u\n",
1145 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1146 (unsigned)dev_info.max_rx_pktlen);
1148 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1149 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1150 " < min valid value %u\n",
1152 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1153 (unsigned)ETHER_MIN_LEN);
1157 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1158 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1159 /* Use default value */
1160 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1164 /* Any requested offloading must be within its device capabilities */
1165 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1166 local_conf.rxmode.offloads) {
1167 ethdev_log(ERR, "ethdev port_id=%d requested Rx offloads "
1168 "0x%" PRIx64 " doesn't match Rx offloads "
1169 "capabilities 0x%" PRIx64 " in %s()\n",
1171 local_conf.rxmode.offloads,
1172 dev_info.rx_offload_capa,
1174 /* Will return -EINVAL in the next release */
1176 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1177 local_conf.txmode.offloads) {
1178 ethdev_log(ERR, "ethdev port_id=%d requested Tx offloads "
1179 "0x%" PRIx64 " doesn't match Tx offloads "
1180 "capabilities 0x%" PRIx64 " in %s()\n",
1182 local_conf.txmode.offloads,
1183 dev_info.tx_offload_capa,
1185 /* Will return -EINVAL in the next release */
1188 /* Check that device supports requested rss hash functions. */
1189 if ((dev_info.flow_type_rss_offloads |
1190 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1191 dev_info.flow_type_rss_offloads) {
1192 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1193 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1195 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1196 dev_info.flow_type_rss_offloads);
1200 * Setup new number of RX/TX queues and reconfigure device.
1202 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1204 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1209 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1211 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1213 rte_eth_dev_rx_queue_config(dev, 0);
1217 diag = (*dev->dev_ops->dev_configure)(dev);
1219 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1221 rte_eth_dev_rx_queue_config(dev, 0);
1222 rte_eth_dev_tx_queue_config(dev, 0);
1223 return eth_err(port_id, diag);
1226 /* Initialize Rx profiling if enabled at compilation time. */
1227 diag = __rte_eth_profile_rx_init(port_id, dev);
1229 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1231 rte_eth_dev_rx_queue_config(dev, 0);
1232 rte_eth_dev_tx_queue_config(dev, 0);
1233 return eth_err(port_id, diag);
1240 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1242 if (dev->data->dev_started) {
1243 RTE_PMD_DEBUG_TRACE(
1244 "port %d must be stopped to allow reset\n",
1245 dev->data->port_id);
1249 rte_eth_dev_rx_queue_config(dev, 0);
1250 rte_eth_dev_tx_queue_config(dev, 0);
1252 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1256 rte_eth_dev_config_restore(uint16_t port_id)
1258 struct rte_eth_dev *dev;
1259 struct rte_eth_dev_info dev_info;
1260 struct ether_addr *addr;
1265 dev = &rte_eth_devices[port_id];
1267 rte_eth_dev_info_get(port_id, &dev_info);
1269 /* replay MAC address configuration including default MAC */
1270 addr = &dev->data->mac_addrs[0];
1271 if (*dev->dev_ops->mac_addr_set != NULL)
1272 (*dev->dev_ops->mac_addr_set)(dev, addr);
1273 else if (*dev->dev_ops->mac_addr_add != NULL)
1274 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1276 if (*dev->dev_ops->mac_addr_add != NULL) {
1277 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1278 addr = &dev->data->mac_addrs[i];
1280 /* skip zero address */
1281 if (is_zero_ether_addr(addr))
1285 pool_mask = dev->data->mac_pool_sel[i];
1288 if (pool_mask & 1ULL)
1289 (*dev->dev_ops->mac_addr_add)(dev,
1293 } while (pool_mask);
1297 /* replay promiscuous configuration */
1298 if (rte_eth_promiscuous_get(port_id) == 1)
1299 rte_eth_promiscuous_enable(port_id);
1300 else if (rte_eth_promiscuous_get(port_id) == 0)
1301 rte_eth_promiscuous_disable(port_id);
1303 /* replay all multicast configuration */
1304 if (rte_eth_allmulticast_get(port_id) == 1)
1305 rte_eth_allmulticast_enable(port_id);
1306 else if (rte_eth_allmulticast_get(port_id) == 0)
1307 rte_eth_allmulticast_disable(port_id);
1311 rte_eth_dev_start(uint16_t port_id)
1313 struct rte_eth_dev *dev;
1316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1318 dev = &rte_eth_devices[port_id];
1320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1322 if (dev->data->dev_started != 0) {
1323 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1324 " already started\n",
1329 diag = (*dev->dev_ops->dev_start)(dev);
1331 dev->data->dev_started = 1;
1333 return eth_err(port_id, diag);
1335 rte_eth_dev_config_restore(port_id);
1337 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1339 (*dev->dev_ops->link_update)(dev, 0);
1345 rte_eth_dev_stop(uint16_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1350 dev = &rte_eth_devices[port_id];
1352 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1354 if (dev->data->dev_started == 0) {
1355 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1356 " already stopped\n",
1361 dev->data->dev_started = 0;
1362 (*dev->dev_ops->dev_stop)(dev);
1366 rte_eth_dev_set_link_up(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1375 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1379 rte_eth_dev_set_link_down(uint16_t port_id)
1381 struct rte_eth_dev *dev;
1383 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1385 dev = &rte_eth_devices[port_id];
1387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1388 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1392 rte_eth_dev_close(uint16_t port_id)
1394 struct rte_eth_dev *dev;
1396 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1397 dev = &rte_eth_devices[port_id];
1399 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1400 dev->data->dev_started = 0;
1401 (*dev->dev_ops->dev_close)(dev);
1403 dev->data->nb_rx_queues = 0;
1404 rte_free(dev->data->rx_queues);
1405 dev->data->rx_queues = NULL;
1406 dev->data->nb_tx_queues = 0;
1407 rte_free(dev->data->tx_queues);
1408 dev->data->tx_queues = NULL;
1412 rte_eth_dev_reset(uint16_t port_id)
1414 struct rte_eth_dev *dev;
1417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1418 dev = &rte_eth_devices[port_id];
1420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1422 rte_eth_dev_stop(port_id);
1423 ret = dev->dev_ops->dev_reset(dev);
1425 return eth_err(port_id, ret);
1428 int __rte_experimental
1429 rte_eth_dev_is_removed(uint16_t port_id)
1431 struct rte_eth_dev *dev;
1434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1436 dev = &rte_eth_devices[port_id];
1438 if (dev->state == RTE_ETH_DEV_REMOVED)
1441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1443 ret = dev->dev_ops->is_removed(dev);
1445 /* Device is physically removed. */
1446 dev->state = RTE_ETH_DEV_REMOVED;
1452 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1453 uint16_t nb_rx_desc, unsigned int socket_id,
1454 const struct rte_eth_rxconf *rx_conf,
1455 struct rte_mempool *mp)
1458 uint32_t mbp_buf_size;
1459 struct rte_eth_dev *dev;
1460 struct rte_eth_dev_info dev_info;
1461 struct rte_eth_rxconf local_conf;
1464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1466 dev = &rte_eth_devices[port_id];
1467 if (rx_queue_id >= dev->data->nb_rx_queues) {
1468 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1476 * Check the size of the mbuf data buffer.
1477 * This value must be provided in the private data of the memory pool.
1478 * First check that the memory pool has a valid private data.
1480 rte_eth_dev_info_get(port_id, &dev_info);
1481 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1482 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1483 mp->name, (int) mp->private_data_size,
1484 (int) sizeof(struct rte_pktmbuf_pool_private));
1487 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1489 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1490 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1491 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1495 (int)(RTE_PKTMBUF_HEADROOM +
1496 dev_info.min_rx_bufsize),
1497 (int)RTE_PKTMBUF_HEADROOM,
1498 (int)dev_info.min_rx_bufsize);
1502 /* Use default specified by driver, if nb_rx_desc is zero */
1503 if (nb_rx_desc == 0) {
1504 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1505 /* If driver default is also zero, fall back on EAL default */
1506 if (nb_rx_desc == 0)
1507 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1510 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1511 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1512 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1514 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1515 "should be: <= %hu, = %hu, and a product of %hu\n",
1517 dev_info.rx_desc_lim.nb_max,
1518 dev_info.rx_desc_lim.nb_min,
1519 dev_info.rx_desc_lim.nb_align);
1523 if (dev->data->dev_started &&
1524 !(dev_info.dev_capa &
1525 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1528 if (dev->data->dev_started &&
1529 (dev->data->rx_queue_state[rx_queue_id] !=
1530 RTE_ETH_QUEUE_STATE_STOPPED))
1533 rxq = dev->data->rx_queues;
1534 if (rxq[rx_queue_id]) {
1535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1537 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1538 rxq[rx_queue_id] = NULL;
1541 if (rx_conf == NULL)
1542 rx_conf = &dev_info.default_rxconf;
1544 local_conf = *rx_conf;
1545 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1547 * Reflect port offloads to queue offloads in order for
1548 * offloads to not be discarded.
1550 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1551 &local_conf.offloads);
1555 * If an offloading has already been enabled in
1556 * rte_eth_dev_configure(), it has been enabled on all queues,
1557 * so there is no need to enable it in this queue again.
1558 * The local_conf.offloads input to underlying PMD only carries
1559 * those offloadings which are only enabled on this queue and
1560 * not enabled on all queues.
1562 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1565 * New added offloadings for this queue are those not enabled in
1566 * rte_eth_dev_configure() and they must be per-queue type.
1567 * A pure per-port offloading can't be enabled on a queue while
1568 * disabled on another queue. A pure per-port offloading can't
1569 * be enabled for any queue as new added one if it hasn't been
1570 * enabled in rte_eth_dev_configure().
1572 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1573 local_conf.offloads) {
1574 ethdev_log(ERR, "Ethdev port_id=%d rx_queue_id=%d, new "
1575 "added offloads 0x%" PRIx64 " must be "
1576 "within pre-queue offload capabilities 0x%"
1577 PRIx64 " in %s()\n",
1580 local_conf.offloads,
1581 dev_info.rx_queue_offload_capa,
1583 /* Will return -EINVAL in the next release */
1586 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1587 socket_id, &local_conf, mp);
1589 if (!dev->data->min_rx_buf_size ||
1590 dev->data->min_rx_buf_size > mbp_buf_size)
1591 dev->data->min_rx_buf_size = mbp_buf_size;
1594 return eth_err(port_id, ret);
1598 * Convert from tx offloads to txq_flags.
1601 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1605 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1606 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1607 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1608 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1609 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1610 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1611 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1612 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1613 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1614 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1615 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1616 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1622 * A conversion function from txq_flags API.
1625 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1627 uint64_t offloads = 0;
1629 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1630 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1631 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1632 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1633 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1634 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1635 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1636 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1637 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1638 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1639 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1640 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1641 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1643 *tx_offloads = offloads;
1647 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1648 uint16_t nb_tx_desc, unsigned int socket_id,
1649 const struct rte_eth_txconf *tx_conf)
1651 struct rte_eth_dev *dev;
1652 struct rte_eth_dev_info dev_info;
1653 struct rte_eth_txconf local_conf;
1656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1658 dev = &rte_eth_devices[port_id];
1659 if (tx_queue_id >= dev->data->nb_tx_queues) {
1660 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1667 rte_eth_dev_info_get(port_id, &dev_info);
1669 /* Use default specified by driver, if nb_tx_desc is zero */
1670 if (nb_tx_desc == 0) {
1671 nb_tx_desc = dev_info.default_txportconf.ring_size;
1672 /* If driver default is zero, fall back on EAL default */
1673 if (nb_tx_desc == 0)
1674 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1676 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1677 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1678 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1679 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1680 "should be: <= %hu, = %hu, and a product of %hu\n",
1682 dev_info.tx_desc_lim.nb_max,
1683 dev_info.tx_desc_lim.nb_min,
1684 dev_info.tx_desc_lim.nb_align);
1688 if (dev->data->dev_started &&
1689 !(dev_info.dev_capa &
1690 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1693 if (dev->data->dev_started &&
1694 (dev->data->tx_queue_state[tx_queue_id] !=
1695 RTE_ETH_QUEUE_STATE_STOPPED))
1698 txq = dev->data->tx_queues;
1699 if (txq[tx_queue_id]) {
1700 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1702 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1703 txq[tx_queue_id] = NULL;
1706 if (tx_conf == NULL)
1707 tx_conf = &dev_info.default_txconf;
1710 * Convert between the offloads API to enable PMDs to support
1713 local_conf = *tx_conf;
1714 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1715 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1716 &local_conf.offloads);
1720 * If an offloading has already been enabled in
1721 * rte_eth_dev_configure(), it has been enabled on all queues,
1722 * so there is no need to enable it in this queue again.
1723 * The local_conf.offloads input to underlying PMD only carries
1724 * those offloadings which are only enabled on this queue and
1725 * not enabled on all queues.
1727 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1730 * New added offloadings for this queue are those not enabled in
1731 * rte_eth_dev_configure() and they must be per-queue type.
1732 * A pure per-port offloading can't be enabled on a queue while
1733 * disabled on another queue. A pure per-port offloading can't
1734 * be enabled for any queue as new added one if it hasn't been
1735 * enabled in rte_eth_dev_configure().
1737 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1738 local_conf.offloads) {
1739 ethdev_log(ERR, "Ethdev port_id=%d tx_queue_id=%d, new "
1740 "added offloads 0x%" PRIx64 " must be "
1741 "within pre-queue offload capabilities 0x%"
1742 PRIx64 " in %s()\n",
1745 local_conf.offloads,
1746 dev_info.tx_queue_offload_capa,
1748 /* Will return -EINVAL in the next release */
1751 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1752 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1756 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1757 void *userdata __rte_unused)
1761 for (i = 0; i < unsent; i++)
1762 rte_pktmbuf_free(pkts[i]);
1766 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1769 uint64_t *count = userdata;
1772 for (i = 0; i < unsent; i++)
1773 rte_pktmbuf_free(pkts[i]);
1779 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1780 buffer_tx_error_fn cbfn, void *userdata)
1782 buffer->error_callback = cbfn;
1783 buffer->error_userdata = userdata;
1788 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1795 buffer->size = size;
1796 if (buffer->error_callback == NULL) {
1797 ret = rte_eth_tx_buffer_set_err_callback(
1798 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1805 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1807 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1810 /* Validate Input Data. Bail if not valid or not supported. */
1811 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1812 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1814 /* Call driver to free pending mbufs. */
1815 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1817 return eth_err(port_id, ret);
1821 rte_eth_promiscuous_enable(uint16_t port_id)
1823 struct rte_eth_dev *dev;
1825 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1826 dev = &rte_eth_devices[port_id];
1828 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1829 (*dev->dev_ops->promiscuous_enable)(dev);
1830 dev->data->promiscuous = 1;
1834 rte_eth_promiscuous_disable(uint16_t port_id)
1836 struct rte_eth_dev *dev;
1838 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1839 dev = &rte_eth_devices[port_id];
1841 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1842 dev->data->promiscuous = 0;
1843 (*dev->dev_ops->promiscuous_disable)(dev);
1847 rte_eth_promiscuous_get(uint16_t port_id)
1849 struct rte_eth_dev *dev;
1851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1853 dev = &rte_eth_devices[port_id];
1854 return dev->data->promiscuous;
1858 rte_eth_allmulticast_enable(uint16_t port_id)
1860 struct rte_eth_dev *dev;
1862 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1863 dev = &rte_eth_devices[port_id];
1865 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1866 (*dev->dev_ops->allmulticast_enable)(dev);
1867 dev->data->all_multicast = 1;
1871 rte_eth_allmulticast_disable(uint16_t port_id)
1873 struct rte_eth_dev *dev;
1875 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1876 dev = &rte_eth_devices[port_id];
1878 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1879 dev->data->all_multicast = 0;
1880 (*dev->dev_ops->allmulticast_disable)(dev);
1884 rte_eth_allmulticast_get(uint16_t port_id)
1886 struct rte_eth_dev *dev;
1888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1890 dev = &rte_eth_devices[port_id];
1891 return dev->data->all_multicast;
1895 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1897 struct rte_eth_dev *dev;
1899 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1900 dev = &rte_eth_devices[port_id];
1902 if (dev->data->dev_conf.intr_conf.lsc &&
1903 dev->data->dev_started)
1904 rte_eth_linkstatus_get(dev, eth_link);
1906 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1907 (*dev->dev_ops->link_update)(dev, 1);
1908 *eth_link = dev->data->dev_link;
1913 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1915 struct rte_eth_dev *dev;
1917 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1918 dev = &rte_eth_devices[port_id];
1920 if (dev->data->dev_conf.intr_conf.lsc &&
1921 dev->data->dev_started)
1922 rte_eth_linkstatus_get(dev, eth_link);
1924 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1925 (*dev->dev_ops->link_update)(dev, 0);
1926 *eth_link = dev->data->dev_link;
1931 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1933 struct rte_eth_dev *dev;
1935 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1937 dev = &rte_eth_devices[port_id];
1938 memset(stats, 0, sizeof(*stats));
1940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1941 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1942 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1946 rte_eth_stats_reset(uint16_t port_id)
1948 struct rte_eth_dev *dev;
1950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1951 dev = &rte_eth_devices[port_id];
1953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1954 (*dev->dev_ops->stats_reset)(dev);
1955 dev->data->rx_mbuf_alloc_failed = 0;
1961 get_xstats_basic_count(struct rte_eth_dev *dev)
1963 uint16_t nb_rxqs, nb_txqs;
1966 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1967 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1969 count = RTE_NB_STATS;
1970 count += nb_rxqs * RTE_NB_RXQ_STATS;
1971 count += nb_txqs * RTE_NB_TXQ_STATS;
1977 get_xstats_count(uint16_t port_id)
1979 struct rte_eth_dev *dev;
1982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1983 dev = &rte_eth_devices[port_id];
1984 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1985 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1988 return eth_err(port_id, count);
1990 if (dev->dev_ops->xstats_get_names != NULL) {
1991 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1993 return eth_err(port_id, count);
1998 count += get_xstats_basic_count(dev);
2004 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2007 int cnt_xstats, idx_xstat;
2009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2012 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
2017 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
2022 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2023 if (cnt_xstats < 0) {
2024 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
2028 /* Get id-name lookup table */
2029 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2031 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2032 port_id, xstats_names, cnt_xstats, NULL)) {
2033 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
2037 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2038 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2047 /* retrieve basic stats names */
2049 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2050 struct rte_eth_xstat_name *xstats_names)
2052 int cnt_used_entries = 0;
2053 uint32_t idx, id_queue;
2056 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2057 snprintf(xstats_names[cnt_used_entries].name,
2058 sizeof(xstats_names[0].name),
2059 "%s", rte_stats_strings[idx].name);
2062 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2063 for (id_queue = 0; id_queue < num_q; id_queue++) {
2064 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2065 snprintf(xstats_names[cnt_used_entries].name,
2066 sizeof(xstats_names[0].name),
2068 id_queue, rte_rxq_stats_strings[idx].name);
2073 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2074 for (id_queue = 0; id_queue < num_q; id_queue++) {
2075 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2076 snprintf(xstats_names[cnt_used_entries].name,
2077 sizeof(xstats_names[0].name),
2079 id_queue, rte_txq_stats_strings[idx].name);
2083 return cnt_used_entries;
2086 /* retrieve ethdev extended statistics names */
2088 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2089 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2092 struct rte_eth_xstat_name *xstats_names_copy;
2093 unsigned int no_basic_stat_requested = 1;
2094 unsigned int no_ext_stat_requested = 1;
2095 unsigned int expected_entries;
2096 unsigned int basic_count;
2097 struct rte_eth_dev *dev;
2101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2102 dev = &rte_eth_devices[port_id];
2104 basic_count = get_xstats_basic_count(dev);
2105 ret = get_xstats_count(port_id);
2108 expected_entries = (unsigned int)ret;
2110 /* Return max number of stats if no ids given */
2113 return expected_entries;
2114 else if (xstats_names && size < expected_entries)
2115 return expected_entries;
2118 if (ids && !xstats_names)
2121 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2122 uint64_t ids_copy[size];
2124 for (i = 0; i < size; i++) {
2125 if (ids[i] < basic_count) {
2126 no_basic_stat_requested = 0;
2131 * Convert ids to xstats ids that PMD knows.
2132 * ids known by user are basic + extended stats.
2134 ids_copy[i] = ids[i] - basic_count;
2137 if (no_basic_stat_requested)
2138 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2139 xstats_names, ids_copy, size);
2142 /* Retrieve all stats */
2144 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2146 if (num_stats < 0 || num_stats > (int)expected_entries)
2149 return expected_entries;
2152 xstats_names_copy = calloc(expected_entries,
2153 sizeof(struct rte_eth_xstat_name));
2155 if (!xstats_names_copy) {
2156 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2161 for (i = 0; i < size; i++) {
2162 if (ids[i] >= basic_count) {
2163 no_ext_stat_requested = 0;
2169 /* Fill xstats_names_copy structure */
2170 if (ids && no_ext_stat_requested) {
2171 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2173 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2176 free(xstats_names_copy);
2182 for (i = 0; i < size; i++) {
2183 if (ids[i] >= expected_entries) {
2184 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2185 free(xstats_names_copy);
2188 xstats_names[i] = xstats_names_copy[ids[i]];
2191 free(xstats_names_copy);
2196 rte_eth_xstats_get_names(uint16_t port_id,
2197 struct rte_eth_xstat_name *xstats_names,
2200 struct rte_eth_dev *dev;
2201 int cnt_used_entries;
2202 int cnt_expected_entries;
2203 int cnt_driver_entries;
2205 cnt_expected_entries = get_xstats_count(port_id);
2206 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2207 (int)size < cnt_expected_entries)
2208 return cnt_expected_entries;
2210 /* port_id checked in get_xstats_count() */
2211 dev = &rte_eth_devices[port_id];
2213 cnt_used_entries = rte_eth_basic_stats_get_names(
2216 if (dev->dev_ops->xstats_get_names != NULL) {
2217 /* If there are any driver-specific xstats, append them
2220 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2222 xstats_names + cnt_used_entries,
2223 size - cnt_used_entries);
2224 if (cnt_driver_entries < 0)
2225 return eth_err(port_id, cnt_driver_entries);
2226 cnt_used_entries += cnt_driver_entries;
2229 return cnt_used_entries;
2234 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2236 struct rte_eth_dev *dev;
2237 struct rte_eth_stats eth_stats;
2238 unsigned int count = 0, i, q;
2239 uint64_t val, *stats_ptr;
2240 uint16_t nb_rxqs, nb_txqs;
2243 ret = rte_eth_stats_get(port_id, ð_stats);
2247 dev = &rte_eth_devices[port_id];
2249 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2250 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2253 for (i = 0; i < RTE_NB_STATS; i++) {
2254 stats_ptr = RTE_PTR_ADD(ð_stats,
2255 rte_stats_strings[i].offset);
2257 xstats[count++].value = val;
2261 for (q = 0; q < nb_rxqs; q++) {
2262 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2263 stats_ptr = RTE_PTR_ADD(ð_stats,
2264 rte_rxq_stats_strings[i].offset +
2265 q * sizeof(uint64_t));
2267 xstats[count++].value = val;
2272 for (q = 0; q < nb_txqs; q++) {
2273 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2274 stats_ptr = RTE_PTR_ADD(ð_stats,
2275 rte_txq_stats_strings[i].offset +
2276 q * sizeof(uint64_t));
2278 xstats[count++].value = val;
2284 /* retrieve ethdev extended statistics */
2286 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2287 uint64_t *values, unsigned int size)
2289 unsigned int no_basic_stat_requested = 1;
2290 unsigned int no_ext_stat_requested = 1;
2291 unsigned int num_xstats_filled;
2292 unsigned int basic_count;
2293 uint16_t expected_entries;
2294 struct rte_eth_dev *dev;
2298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2299 ret = get_xstats_count(port_id);
2302 expected_entries = (uint16_t)ret;
2303 struct rte_eth_xstat xstats[expected_entries];
2304 dev = &rte_eth_devices[port_id];
2305 basic_count = get_xstats_basic_count(dev);
2307 /* Return max number of stats if no ids given */
2310 return expected_entries;
2311 else if (values && size < expected_entries)
2312 return expected_entries;
2318 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2319 unsigned int basic_count = get_xstats_basic_count(dev);
2320 uint64_t ids_copy[size];
2322 for (i = 0; i < size; i++) {
2323 if (ids[i] < basic_count) {
2324 no_basic_stat_requested = 0;
2329 * Convert ids to xstats ids that PMD knows.
2330 * ids known by user are basic + extended stats.
2332 ids_copy[i] = ids[i] - basic_count;
2335 if (no_basic_stat_requested)
2336 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2341 for (i = 0; i < size; i++) {
2342 if (ids[i] >= basic_count) {
2343 no_ext_stat_requested = 0;
2349 /* Fill the xstats structure */
2350 if (ids && no_ext_stat_requested)
2351 ret = rte_eth_basic_stats_get(port_id, xstats);
2353 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2357 num_xstats_filled = (unsigned int)ret;
2359 /* Return all stats */
2361 for (i = 0; i < num_xstats_filled; i++)
2362 values[i] = xstats[i].value;
2363 return expected_entries;
2367 for (i = 0; i < size; i++) {
2368 if (ids[i] >= expected_entries) {
2369 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2372 values[i] = xstats[ids[i]].value;
2378 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2381 struct rte_eth_dev *dev;
2382 unsigned int count = 0, i;
2383 signed int xcount = 0;
2384 uint16_t nb_rxqs, nb_txqs;
2387 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2389 dev = &rte_eth_devices[port_id];
2391 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2392 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2394 /* Return generic statistics */
2395 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2396 (nb_txqs * RTE_NB_TXQ_STATS);
2398 /* implemented by the driver */
2399 if (dev->dev_ops->xstats_get != NULL) {
2400 /* Retrieve the xstats from the driver at the end of the
2403 xcount = (*dev->dev_ops->xstats_get)(dev,
2404 xstats ? xstats + count : NULL,
2405 (n > count) ? n - count : 0);
2408 return eth_err(port_id, xcount);
2411 if (n < count + xcount || xstats == NULL)
2412 return count + xcount;
2414 /* now fill the xstats structure */
2415 ret = rte_eth_basic_stats_get(port_id, xstats);
2420 for (i = 0; i < count; i++)
2422 /* add an offset to driver-specific stats */
2423 for ( ; i < count + xcount; i++)
2424 xstats[i].id += count;
2426 return count + xcount;
2429 /* reset ethdev extended statistics */
2431 rte_eth_xstats_reset(uint16_t port_id)
2433 struct rte_eth_dev *dev;
2435 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2436 dev = &rte_eth_devices[port_id];
2438 /* implemented by the driver */
2439 if (dev->dev_ops->xstats_reset != NULL) {
2440 (*dev->dev_ops->xstats_reset)(dev);
2444 /* fallback to default */
2445 rte_eth_stats_reset(port_id);
2449 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2452 struct rte_eth_dev *dev;
2454 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2456 dev = &rte_eth_devices[port_id];
2458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2459 return (*dev->dev_ops->queue_stats_mapping_set)
2460 (dev, queue_id, stat_idx, is_rx);
2465 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2468 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2469 stat_idx, STAT_QMAP_TX));
2474 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2477 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2478 stat_idx, STAT_QMAP_RX));
2482 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2484 struct rte_eth_dev *dev;
2486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2487 dev = &rte_eth_devices[port_id];
2489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2490 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2491 fw_version, fw_size));
2495 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2497 struct rte_eth_dev *dev;
2498 struct rte_eth_txconf *txconf;
2499 const struct rte_eth_desc_lim lim = {
2500 .nb_max = UINT16_MAX,
2505 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2506 dev = &rte_eth_devices[port_id];
2508 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2509 dev_info->rx_desc_lim = lim;
2510 dev_info->tx_desc_lim = lim;
2511 dev_info->device = dev->device;
2513 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2514 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2515 dev_info->driver_name = dev->device->driver->name;
2516 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2517 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2519 dev_info->dev_flags = &dev->data->dev_flags;
2520 txconf = &dev_info->default_txconf;
2521 /* convert offload to txq_flags to support legacy app */
2522 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2526 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2527 uint32_t *ptypes, int num)
2530 struct rte_eth_dev *dev;
2531 const uint32_t *all_ptypes;
2533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2534 dev = &rte_eth_devices[port_id];
2535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2536 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2541 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2542 if (all_ptypes[i] & ptype_mask) {
2544 ptypes[j] = all_ptypes[i];
2552 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2554 struct rte_eth_dev *dev;
2556 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2557 dev = &rte_eth_devices[port_id];
2558 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2563 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2565 struct rte_eth_dev *dev;
2567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2569 dev = &rte_eth_devices[port_id];
2570 *mtu = dev->data->mtu;
2575 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2578 struct rte_eth_dev *dev;
2580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2581 dev = &rte_eth_devices[port_id];
2582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2584 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2586 dev->data->mtu = mtu;
2588 return eth_err(port_id, ret);
2592 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2594 struct rte_eth_dev *dev;
2597 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2598 dev = &rte_eth_devices[port_id];
2599 if (!(dev->data->dev_conf.rxmode.offloads &
2600 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2601 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2605 if (vlan_id > 4095) {
2606 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2607 port_id, (unsigned) vlan_id);
2610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2612 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2614 struct rte_vlan_filter_conf *vfc;
2618 vfc = &dev->data->vlan_filter_conf;
2619 vidx = vlan_id / 64;
2620 vbit = vlan_id % 64;
2623 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2625 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2628 return eth_err(port_id, ret);
2632 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2635 struct rte_eth_dev *dev;
2637 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2638 dev = &rte_eth_devices[port_id];
2639 if (rx_queue_id >= dev->data->nb_rx_queues) {
2640 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2645 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2651 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2652 enum rte_vlan_type vlan_type,
2655 struct rte_eth_dev *dev;
2657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2658 dev = &rte_eth_devices[port_id];
2659 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2661 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2666 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2668 struct rte_eth_dev *dev;
2672 uint64_t orig_offloads;
2674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2675 dev = &rte_eth_devices[port_id];
2677 /* save original values in case of failure */
2678 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2680 /*check which option changed by application*/
2681 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2682 org = !!(dev->data->dev_conf.rxmode.offloads &
2683 DEV_RX_OFFLOAD_VLAN_STRIP);
2686 dev->data->dev_conf.rxmode.offloads |=
2687 DEV_RX_OFFLOAD_VLAN_STRIP;
2689 dev->data->dev_conf.rxmode.offloads &=
2690 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2691 mask |= ETH_VLAN_STRIP_MASK;
2694 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2695 org = !!(dev->data->dev_conf.rxmode.offloads &
2696 DEV_RX_OFFLOAD_VLAN_FILTER);
2699 dev->data->dev_conf.rxmode.offloads |=
2700 DEV_RX_OFFLOAD_VLAN_FILTER;
2702 dev->data->dev_conf.rxmode.offloads &=
2703 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2704 mask |= ETH_VLAN_FILTER_MASK;
2707 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2708 org = !!(dev->data->dev_conf.rxmode.offloads &
2709 DEV_RX_OFFLOAD_VLAN_EXTEND);
2712 dev->data->dev_conf.rxmode.offloads |=
2713 DEV_RX_OFFLOAD_VLAN_EXTEND;
2715 dev->data->dev_conf.rxmode.offloads &=
2716 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2717 mask |= ETH_VLAN_EXTEND_MASK;
2724 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2725 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2727 /* hit an error restore original values */
2728 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2731 return eth_err(port_id, ret);
2735 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2737 struct rte_eth_dev *dev;
2740 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2741 dev = &rte_eth_devices[port_id];
2743 if (dev->data->dev_conf.rxmode.offloads &
2744 DEV_RX_OFFLOAD_VLAN_STRIP)
2745 ret |= ETH_VLAN_STRIP_OFFLOAD;
2747 if (dev->data->dev_conf.rxmode.offloads &
2748 DEV_RX_OFFLOAD_VLAN_FILTER)
2749 ret |= ETH_VLAN_FILTER_OFFLOAD;
2751 if (dev->data->dev_conf.rxmode.offloads &
2752 DEV_RX_OFFLOAD_VLAN_EXTEND)
2753 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2759 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2761 struct rte_eth_dev *dev;
2763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2764 dev = &rte_eth_devices[port_id];
2765 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2767 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2771 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2773 struct rte_eth_dev *dev;
2775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2776 dev = &rte_eth_devices[port_id];
2777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2778 memset(fc_conf, 0, sizeof(*fc_conf));
2779 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2783 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2785 struct rte_eth_dev *dev;
2787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2788 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2789 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2793 dev = &rte_eth_devices[port_id];
2794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2795 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2799 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2800 struct rte_eth_pfc_conf *pfc_conf)
2802 struct rte_eth_dev *dev;
2804 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2805 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2806 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2810 dev = &rte_eth_devices[port_id];
2811 /* High water, low water validation are device specific */
2812 if (*dev->dev_ops->priority_flow_ctrl_set)
2813 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2819 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2827 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2828 for (i = 0; i < num; i++) {
2829 if (reta_conf[i].mask)
2837 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2841 uint16_t i, idx, shift;
2847 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2851 for (i = 0; i < reta_size; i++) {
2852 idx = i / RTE_RETA_GROUP_SIZE;
2853 shift = i % RTE_RETA_GROUP_SIZE;
2854 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2855 (reta_conf[idx].reta[shift] >= max_rxq)) {
2856 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2857 "the maximum rxq index: %u\n", idx, shift,
2858 reta_conf[idx].reta[shift], max_rxq);
2867 rte_eth_dev_rss_reta_update(uint16_t port_id,
2868 struct rte_eth_rss_reta_entry64 *reta_conf,
2871 struct rte_eth_dev *dev;
2874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2875 /* Check mask bits */
2876 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2880 dev = &rte_eth_devices[port_id];
2882 /* Check entry value */
2883 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2884 dev->data->nb_rx_queues);
2888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2889 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2894 rte_eth_dev_rss_reta_query(uint16_t port_id,
2895 struct rte_eth_rss_reta_entry64 *reta_conf,
2898 struct rte_eth_dev *dev;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2903 /* Check mask bits */
2904 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2908 dev = &rte_eth_devices[port_id];
2909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2910 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2915 rte_eth_dev_rss_hash_update(uint16_t port_id,
2916 struct rte_eth_rss_conf *rss_conf)
2918 struct rte_eth_dev *dev;
2919 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2922 dev = &rte_eth_devices[port_id];
2923 rte_eth_dev_info_get(port_id, &dev_info);
2924 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2925 dev_info.flow_type_rss_offloads) {
2926 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2927 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2930 dev_info.flow_type_rss_offloads);
2932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2933 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2938 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2939 struct rte_eth_rss_conf *rss_conf)
2941 struct rte_eth_dev *dev;
2943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 dev = &rte_eth_devices[port_id];
2945 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2946 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2951 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2952 struct rte_eth_udp_tunnel *udp_tunnel)
2954 struct rte_eth_dev *dev;
2956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2957 if (udp_tunnel == NULL) {
2958 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2962 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2963 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2967 dev = &rte_eth_devices[port_id];
2968 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2969 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2974 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2975 struct rte_eth_udp_tunnel *udp_tunnel)
2977 struct rte_eth_dev *dev;
2979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2980 dev = &rte_eth_devices[port_id];
2982 if (udp_tunnel == NULL) {
2983 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2987 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2988 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2993 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2998 rte_eth_led_on(uint16_t port_id)
3000 struct rte_eth_dev *dev;
3002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3003 dev = &rte_eth_devices[port_id];
3004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3005 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3009 rte_eth_led_off(uint16_t port_id)
3011 struct rte_eth_dev *dev;
3013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3014 dev = &rte_eth_devices[port_id];
3015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3016 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3020 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3024 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3026 struct rte_eth_dev_info dev_info;
3027 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3030 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3031 rte_eth_dev_info_get(port_id, &dev_info);
3033 for (i = 0; i < dev_info.max_mac_addrs; i++)
3034 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3040 static const struct ether_addr null_mac_addr;
3043 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3046 struct rte_eth_dev *dev;
3051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3052 dev = &rte_eth_devices[port_id];
3053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3055 if (is_zero_ether_addr(addr)) {
3056 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3060 if (pool >= ETH_64_POOLS) {
3061 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
3065 index = get_mac_addr_index(port_id, addr);
3067 index = get_mac_addr_index(port_id, &null_mac_addr);
3069 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3074 pool_mask = dev->data->mac_pool_sel[index];
3076 /* Check if both MAC address and pool is already there, and do nothing */
3077 if (pool_mask & (1ULL << pool))
3082 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3085 /* Update address in NIC data structure */
3086 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3088 /* Update pool bitmap in NIC data structure */
3089 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3092 return eth_err(port_id, ret);
3096 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3098 struct rte_eth_dev *dev;
3101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3102 dev = &rte_eth_devices[port_id];
3103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3105 index = get_mac_addr_index(port_id, addr);
3107 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
3109 } else if (index < 0)
3110 return 0; /* Do nothing if address wasn't found */
3113 (*dev->dev_ops->mac_addr_remove)(dev, index);
3115 /* Update address in NIC data structure */
3116 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3118 /* reset pool bitmap */
3119 dev->data->mac_pool_sel[index] = 0;
3125 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3127 struct rte_eth_dev *dev;
3130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3132 if (!is_valid_assigned_ether_addr(addr))
3135 dev = &rte_eth_devices[port_id];
3136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3138 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3142 /* Update default address in NIC data structure */
3143 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3150 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3154 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3156 struct rte_eth_dev_info dev_info;
3157 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3160 rte_eth_dev_info_get(port_id, &dev_info);
3161 if (!dev->data->hash_mac_addrs)
3164 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3165 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3166 ETHER_ADDR_LEN) == 0)
3173 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3178 struct rte_eth_dev *dev;
3180 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3182 dev = &rte_eth_devices[port_id];
3183 if (is_zero_ether_addr(addr)) {
3184 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3189 index = get_hash_mac_addr_index(port_id, addr);
3190 /* Check if it's already there, and do nothing */
3191 if ((index >= 0) && on)
3196 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3197 "set in UTA\n", port_id);
3201 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3203 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3209 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3210 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3212 /* Update address in NIC data structure */
3214 ether_addr_copy(addr,
3215 &dev->data->hash_mac_addrs[index]);
3217 ether_addr_copy(&null_mac_addr,
3218 &dev->data->hash_mac_addrs[index]);
3221 return eth_err(port_id, ret);
3225 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3227 struct rte_eth_dev *dev;
3229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3231 dev = &rte_eth_devices[port_id];
3233 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3234 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3238 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3241 struct rte_eth_dev *dev;
3242 struct rte_eth_dev_info dev_info;
3243 struct rte_eth_link link;
3245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3247 dev = &rte_eth_devices[port_id];
3248 rte_eth_dev_info_get(port_id, &dev_info);
3249 link = dev->data->dev_link;
3251 if (queue_idx > dev_info.max_tx_queues) {
3252 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3253 "invalid queue id=%d\n", port_id, queue_idx);
3257 if (tx_rate > link.link_speed) {
3258 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3259 "bigger than link speed= %d\n",
3260 tx_rate, link.link_speed);
3264 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3265 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3266 queue_idx, tx_rate));
3270 rte_eth_mirror_rule_set(uint16_t port_id,
3271 struct rte_eth_mirror_conf *mirror_conf,
3272 uint8_t rule_id, uint8_t on)
3274 struct rte_eth_dev *dev;
3276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3277 if (mirror_conf->rule_type == 0) {
3278 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3282 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3283 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3288 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3289 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3290 (mirror_conf->pool_mask == 0)) {
3291 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3295 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3296 mirror_conf->vlan.vlan_mask == 0) {
3297 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3301 dev = &rte_eth_devices[port_id];
3302 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3304 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3305 mirror_conf, rule_id, on));
3309 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3311 struct rte_eth_dev *dev;
3313 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3315 dev = &rte_eth_devices[port_id];
3316 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3318 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3322 RTE_INIT(eth_dev_init_cb_lists)
3326 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3327 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3331 rte_eth_dev_callback_register(uint16_t port_id,
3332 enum rte_eth_event_type event,
3333 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3335 struct rte_eth_dev *dev;
3336 struct rte_eth_dev_callback *user_cb;
3337 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3343 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3344 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3348 if (port_id == RTE_ETH_ALL) {
3350 last_port = RTE_MAX_ETHPORTS - 1;
3352 next_port = last_port = port_id;
3355 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3358 dev = &rte_eth_devices[next_port];
3360 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3361 if (user_cb->cb_fn == cb_fn &&
3362 user_cb->cb_arg == cb_arg &&
3363 user_cb->event == event) {
3368 /* create a new callback. */
3369 if (user_cb == NULL) {
3370 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3371 sizeof(struct rte_eth_dev_callback), 0);
3372 if (user_cb != NULL) {
3373 user_cb->cb_fn = cb_fn;
3374 user_cb->cb_arg = cb_arg;
3375 user_cb->event = event;
3376 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3379 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3380 rte_eth_dev_callback_unregister(port_id, event,
3386 } while (++next_port <= last_port);
3388 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3393 rte_eth_dev_callback_unregister(uint16_t port_id,
3394 enum rte_eth_event_type event,
3395 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3398 struct rte_eth_dev *dev;
3399 struct rte_eth_dev_callback *cb, *next;
3400 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3406 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3407 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3411 if (port_id == RTE_ETH_ALL) {
3413 last_port = RTE_MAX_ETHPORTS - 1;
3415 next_port = last_port = port_id;
3418 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3421 dev = &rte_eth_devices[next_port];
3423 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3426 next = TAILQ_NEXT(cb, next);
3428 if (cb->cb_fn != cb_fn || cb->event != event ||
3429 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3433 * if this callback is not executing right now,
3436 if (cb->active == 0) {
3437 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3443 } while (++next_port <= last_port);
3445 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3450 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3451 enum rte_eth_event_type event, void *ret_param)
3453 struct rte_eth_dev_callback *cb_lst;
3454 struct rte_eth_dev_callback dev_cb;
3457 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3458 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3459 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3463 if (ret_param != NULL)
3464 dev_cb.ret_param = ret_param;
3466 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3467 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3468 dev_cb.cb_arg, dev_cb.ret_param);
3469 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3472 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3477 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3482 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3484 dev->state = RTE_ETH_DEV_ATTACHED;
3488 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3491 struct rte_eth_dev *dev;
3492 struct rte_intr_handle *intr_handle;
3496 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3498 dev = &rte_eth_devices[port_id];
3500 if (!dev->intr_handle) {
3501 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3505 intr_handle = dev->intr_handle;
3506 if (!intr_handle->intr_vec) {
3507 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3511 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3512 vec = intr_handle->intr_vec[qid];
3513 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3514 if (rc && rc != -EEXIST) {
3515 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3516 " op %d epfd %d vec %u\n",
3517 port_id, qid, op, epfd, vec);
3524 const struct rte_memzone *
3525 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3526 uint16_t queue_id, size_t size, unsigned align,
3529 char z_name[RTE_MEMZONE_NAMESIZE];
3530 const struct rte_memzone *mz;
3532 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3533 dev->device->driver->name, ring_name,
3534 dev->data->port_id, queue_id);
3536 mz = rte_memzone_lookup(z_name);
3540 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3541 RTE_MEMZONE_IOVA_CONTIG, align);
3544 int __rte_experimental
3545 rte_eth_dev_create(struct rte_device *device, const char *name,
3546 size_t priv_data_size,
3547 ethdev_bus_specific_init ethdev_bus_specific_init,
3548 void *bus_init_params,
3549 ethdev_init_t ethdev_init, void *init_params)
3551 struct rte_eth_dev *ethdev;
3554 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3556 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3557 ethdev = rte_eth_dev_allocate(name);
3563 if (priv_data_size) {
3564 ethdev->data->dev_private = rte_zmalloc_socket(
3565 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3568 if (!ethdev->data->dev_private) {
3569 RTE_LOG(ERR, EAL, "failed to allocate private data");
3575 ethdev = rte_eth_dev_attach_secondary(name);
3577 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3578 "ethdev doesn't exist");
3584 ethdev->device = device;
3586 if (ethdev_bus_specific_init) {
3587 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3590 "ethdev bus specific initialisation failed");
3595 retval = ethdev_init(ethdev, init_params);
3597 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3601 rte_eth_dev_probing_finish(ethdev);
3605 /* free ports private data if primary process */
3606 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3607 rte_free(ethdev->data->dev_private);
3609 rte_eth_dev_release_port(ethdev);
3614 int __rte_experimental
3615 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3616 ethdev_uninit_t ethdev_uninit)
3620 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3624 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3625 if (ethdev_uninit) {
3626 ret = ethdev_uninit(ethdev);
3631 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3632 rte_free(ethdev->data->dev_private);
3634 ethdev->data->dev_private = NULL;
3636 return rte_eth_dev_release_port(ethdev);
3640 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3641 int epfd, int op, void *data)
3644 struct rte_eth_dev *dev;
3645 struct rte_intr_handle *intr_handle;
3648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3650 dev = &rte_eth_devices[port_id];
3651 if (queue_id >= dev->data->nb_rx_queues) {
3652 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3656 if (!dev->intr_handle) {
3657 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3661 intr_handle = dev->intr_handle;
3662 if (!intr_handle->intr_vec) {
3663 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3667 vec = intr_handle->intr_vec[queue_id];
3668 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3669 if (rc && rc != -EEXIST) {
3670 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3671 " op %d epfd %d vec %u\n",
3672 port_id, queue_id, op, epfd, vec);
3680 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3683 struct rte_eth_dev *dev;
3685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3687 dev = &rte_eth_devices[port_id];
3689 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3690 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3695 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3698 struct rte_eth_dev *dev;
3700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3702 dev = &rte_eth_devices[port_id];
3704 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3705 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3711 rte_eth_dev_filter_supported(uint16_t port_id,
3712 enum rte_filter_type filter_type)
3714 struct rte_eth_dev *dev;
3716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3718 dev = &rte_eth_devices[port_id];
3719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3720 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3721 RTE_ETH_FILTER_NOP, NULL);
3725 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3726 enum rte_filter_op filter_op, void *arg)
3728 struct rte_eth_dev *dev;
3730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3732 dev = &rte_eth_devices[port_id];
3733 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3734 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3738 const struct rte_eth_rxtx_callback *
3739 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3740 rte_rx_callback_fn fn, void *user_param)
3742 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3743 rte_errno = ENOTSUP;
3746 /* check input parameters */
3747 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3748 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3752 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3760 cb->param = user_param;
3762 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3763 /* Add the callbacks in fifo order. */
3764 struct rte_eth_rxtx_callback *tail =
3765 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3768 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3775 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3780 const struct rte_eth_rxtx_callback *
3781 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3782 rte_rx_callback_fn fn, void *user_param)
3784 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3785 rte_errno = ENOTSUP;
3788 /* check input parameters */
3789 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3790 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3795 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3803 cb->param = user_param;
3805 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3806 /* Add the callbacks at fisrt position*/
3807 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3809 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3810 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3815 const struct rte_eth_rxtx_callback *
3816 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3817 rte_tx_callback_fn fn, void *user_param)
3819 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3820 rte_errno = ENOTSUP;
3823 /* check input parameters */
3824 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3825 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3830 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3838 cb->param = user_param;
3840 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3841 /* Add the callbacks in fifo order. */
3842 struct rte_eth_rxtx_callback *tail =
3843 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3846 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3853 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3859 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3860 const struct rte_eth_rxtx_callback *user_cb)
3862 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3865 /* Check input parameters. */
3866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3867 if (user_cb == NULL ||
3868 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3871 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3872 struct rte_eth_rxtx_callback *cb;
3873 struct rte_eth_rxtx_callback **prev_cb;
3876 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3877 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3878 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3880 if (cb == user_cb) {
3881 /* Remove the user cb from the callback list. */
3882 *prev_cb = cb->next;
3887 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3893 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3894 const struct rte_eth_rxtx_callback *user_cb)
3896 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3899 /* Check input parameters. */
3900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3901 if (user_cb == NULL ||
3902 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3905 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3907 struct rte_eth_rxtx_callback *cb;
3908 struct rte_eth_rxtx_callback **prev_cb;
3910 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3911 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3912 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3914 if (cb == user_cb) {
3915 /* Remove the user cb from the callback list. */
3916 *prev_cb = cb->next;
3921 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3927 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3928 struct rte_eth_rxq_info *qinfo)
3930 struct rte_eth_dev *dev;
3932 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3937 dev = &rte_eth_devices[port_id];
3938 if (queue_id >= dev->data->nb_rx_queues) {
3939 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3943 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3945 memset(qinfo, 0, sizeof(*qinfo));
3946 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3951 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3952 struct rte_eth_txq_info *qinfo)
3954 struct rte_eth_dev *dev;
3955 struct rte_eth_txconf *txconf = &qinfo->conf;
3957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3962 dev = &rte_eth_devices[port_id];
3963 if (queue_id >= dev->data->nb_tx_queues) {
3964 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3968 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3970 memset(qinfo, 0, sizeof(*qinfo));
3971 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3972 /* convert offload to txq_flags to support legacy app */
3973 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3979 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3980 struct ether_addr *mc_addr_set,
3981 uint32_t nb_mc_addr)
3983 struct rte_eth_dev *dev;
3985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3987 dev = &rte_eth_devices[port_id];
3988 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3989 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3990 mc_addr_set, nb_mc_addr));
3994 rte_eth_timesync_enable(uint16_t port_id)
3996 struct rte_eth_dev *dev;
3998 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3999 dev = &rte_eth_devices[port_id];
4001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4002 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4006 rte_eth_timesync_disable(uint16_t port_id)
4008 struct rte_eth_dev *dev;
4010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4011 dev = &rte_eth_devices[port_id];
4013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4014 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4018 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4021 struct rte_eth_dev *dev;
4023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4024 dev = &rte_eth_devices[port_id];
4026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4027 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4028 (dev, timestamp, flags));
4032 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4033 struct timespec *timestamp)
4035 struct rte_eth_dev *dev;
4037 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4038 dev = &rte_eth_devices[port_id];
4040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4041 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4046 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4048 struct rte_eth_dev *dev;
4050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4051 dev = &rte_eth_devices[port_id];
4053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4054 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4059 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4061 struct rte_eth_dev *dev;
4063 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4064 dev = &rte_eth_devices[port_id];
4066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4067 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4072 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4074 struct rte_eth_dev *dev;
4076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4077 dev = &rte_eth_devices[port_id];
4079 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4080 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4085 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4087 struct rte_eth_dev *dev;
4089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4091 dev = &rte_eth_devices[port_id];
4092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4093 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4097 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4099 struct rte_eth_dev *dev;
4101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4103 dev = &rte_eth_devices[port_id];
4104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4105 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4109 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4111 struct rte_eth_dev *dev;
4113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4115 dev = &rte_eth_devices[port_id];
4116 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4117 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4121 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4123 struct rte_eth_dev *dev;
4125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4127 dev = &rte_eth_devices[port_id];
4128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4129 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4132 int __rte_experimental
4133 rte_eth_dev_get_module_info(uint16_t port_id,
4134 struct rte_eth_dev_module_info *modinfo)
4136 struct rte_eth_dev *dev;
4138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4140 dev = &rte_eth_devices[port_id];
4141 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4142 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4145 int __rte_experimental
4146 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4147 struct rte_dev_eeprom_info *info)
4149 struct rte_eth_dev *dev;
4151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4153 dev = &rte_eth_devices[port_id];
4154 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4155 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4159 rte_eth_dev_get_dcb_info(uint16_t port_id,
4160 struct rte_eth_dcb_info *dcb_info)
4162 struct rte_eth_dev *dev;
4164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4166 dev = &rte_eth_devices[port_id];
4167 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4170 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4174 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4175 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4177 struct rte_eth_dev *dev;
4179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4180 if (l2_tunnel == NULL) {
4181 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4185 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4186 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4190 dev = &rte_eth_devices[port_id];
4191 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4193 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4198 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4199 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4203 struct rte_eth_dev *dev;
4205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4207 if (l2_tunnel == NULL) {
4208 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4212 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4213 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4218 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4222 dev = &rte_eth_devices[port_id];
4223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4225 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4226 l2_tunnel, mask, en));
4230 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4231 const struct rte_eth_desc_lim *desc_lim)
4233 if (desc_lim->nb_align != 0)
4234 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4236 if (desc_lim->nb_max != 0)
4237 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4239 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4243 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4244 uint16_t *nb_rx_desc,
4245 uint16_t *nb_tx_desc)
4247 struct rte_eth_dev *dev;
4248 struct rte_eth_dev_info dev_info;
4250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4252 dev = &rte_eth_devices[port_id];
4253 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4255 rte_eth_dev_info_get(port_id, &dev_info);
4257 if (nb_rx_desc != NULL)
4258 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4260 if (nb_tx_desc != NULL)
4261 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4267 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4269 struct rte_eth_dev *dev;
4271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4276 dev = &rte_eth_devices[port_id];
4278 if (*dev->dev_ops->pool_ops_supported == NULL)
4279 return 1; /* all pools are supported */
4281 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4285 * A set of values to describe the possible states of a switch domain.
4287 enum rte_eth_switch_domain_state {
4288 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4289 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4293 * Array of switch domains available for allocation. Array is sized to
4294 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4295 * ethdev ports in a single process.
4297 struct rte_eth_dev_switch {
4298 enum rte_eth_switch_domain_state state;
4299 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4301 int __rte_experimental
4302 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4306 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4308 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4309 i < RTE_MAX_ETHPORTS; i++) {
4310 if (rte_eth_switch_domains[i].state ==
4311 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4312 rte_eth_switch_domains[i].state =
4313 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4322 int __rte_experimental
4323 rte_eth_switch_domain_free(uint16_t domain_id)
4325 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4326 domain_id >= RTE_MAX_ETHPORTS)
4329 if (rte_eth_switch_domains[domain_id].state !=
4330 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4333 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4338 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4341 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4344 struct rte_kvargs_pair *pair;
4347 arglist->str = strdup(str_in);
4348 if (arglist->str == NULL)
4351 letter = arglist->str;
4354 pair = &arglist->pairs[0];
4357 case 0: /* Initial */
4360 else if (*letter == '\0')
4367 case 1: /* Parsing key */
4368 if (*letter == '=') {
4370 pair->value = letter + 1;
4372 } else if (*letter == ',' || *letter == '\0')
4377 case 2: /* Parsing value */
4380 else if (*letter == ',') {
4383 pair = &arglist->pairs[arglist->count];
4385 } else if (*letter == '\0') {
4388 pair = &arglist->pairs[arglist->count];
4393 case 3: /* Parsing list */
4396 else if (*letter == '\0')
4405 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4413 /* Single element, not a list */
4414 return callback(str, data);
4416 /* Sanity check, then strip the brackets */
4417 str_start = &str[strlen(str) - 1];
4418 if (*str_start != ']') {
4419 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4425 /* Process list elements */
4435 } else if (state == 1) {
4436 if (*str == ',' || *str == '\0') {
4437 if (str > str_start) {
4438 /* Non-empty string fragment */
4440 result = callback(str_start, data);
4453 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4454 const uint16_t max_list)
4456 uint16_t lo, hi, val;
4459 result = sscanf(str, "%hu-%hu", &lo, &hi);
4461 if (*len_list >= max_list)
4463 list[(*len_list)++] = lo;
4464 } else if (result == 2) {
4465 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4467 for (val = lo; val <= hi; val++) {
4468 if (*len_list >= max_list)
4470 list[(*len_list)++] = val;
4479 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4481 struct rte_eth_devargs *eth_da = data;
4483 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4484 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4487 int __rte_experimental
4488 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4490 struct rte_kvargs args;
4491 struct rte_kvargs_pair *pair;
4495 memset(eth_da, 0, sizeof(*eth_da));
4497 result = rte_eth_devargs_tokenise(&args, dargs);
4501 for (i = 0; i < args.count; i++) {
4502 pair = &args.pairs[i];
4503 if (strcmp("representor", pair->key) == 0) {
4504 result = rte_eth_devargs_parse_list(pair->value,
4505 rte_eth_devargs_parse_representor_ports,
4519 RTE_INIT(ethdev_init_log);
4521 ethdev_init_log(void)
4523 ethdev_logtype = rte_log_register("lib.ethdev");
4524 if (ethdev_logtype >= 0)
4525 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);