1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs = {.args = NULL};
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
198 memset(iter, 0, sizeof(*iter));
201 * The devargs string may use various syntaxes:
202 * - 0000:08:00.0,representor=[1-3]
203 * - pci:0000:06:00.0,representor=[0,5]
204 * - class=eth,mac=00:11:22:33:44:55
205 * A new syntax is in development (not yet supported):
206 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
210 * Handle pure class filter (i.e. without any bus-level argument),
211 * from future new syntax.
212 * rte_devargs_parse() is not yet supporting the new syntax,
213 * that's why this simple case is temporarily parsed here.
215 #define iter_anybus_str "class=eth,"
216 if (strncmp(devargs_str, iter_anybus_str,
217 strlen(iter_anybus_str)) == 0) {
218 iter->cls_str = devargs_str + strlen(iter_anybus_str);
222 /* Split bus, device and parameters. */
223 ret = rte_devargs_parse(&devargs, devargs_str);
228 * Assume parameters of old syntax can match only at ethdev level.
229 * Extra parameters will be ignored, thanks to "+" prefix.
231 str_size = strlen(devargs.args) + 2;
232 cls_str = malloc(str_size);
233 if (cls_str == NULL) {
237 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
238 if (ret != str_size - 1) {
242 iter->cls_str = cls_str;
243 free(devargs.args); /* allocated by rte_devargs_parse() */
246 iter->bus = devargs.bus;
247 if (iter->bus->dev_iterate == NULL) {
252 /* Convert bus args to new syntax for use with new API dev_iterate. */
253 if (strcmp(iter->bus->name, "vdev") == 0) {
254 bus_param_key = "name";
255 } else if (strcmp(iter->bus->name, "pci") == 0) {
256 bus_param_key = "addr";
261 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
262 bus_str = malloc(str_size);
263 if (bus_str == NULL) {
267 ret = snprintf(bus_str, str_size, "%s=%s",
268 bus_param_key, devargs.name);
269 if (ret != str_size - 1) {
273 iter->bus_str = bus_str;
276 iter->cls = rte_class_find_by_name("eth");
281 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
290 rte_eth_iterator_next(struct rte_dev_iterator *iter)
292 if (iter->cls == NULL) /* invalid ethdev iterator */
293 return RTE_MAX_ETHPORTS;
295 do { /* loop to try all matching rte_device */
296 /* If not pure ethdev filter and */
297 if (iter->bus != NULL &&
298 /* not in middle of rte_eth_dev iteration, */
299 iter->class_device == NULL) {
300 /* get next rte_device to try. */
301 iter->device = iter->bus->dev_iterate(
302 iter->device, iter->bus_str, iter);
303 if (iter->device == NULL)
304 break; /* no more rte_device candidate */
306 /* A device is matching bus part, need to check ethdev part. */
307 iter->class_device = iter->cls->dev_iterate(
308 iter->class_device, iter->cls_str, iter);
309 if (iter->class_device != NULL)
310 return eth_dev_to_id(iter->class_device); /* match */
311 } while (iter->bus != NULL); /* need to try next rte_device */
313 /* No more ethdev port to iterate. */
314 rte_eth_iterator_cleanup(iter);
315 return RTE_MAX_ETHPORTS;
319 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
321 if (iter->bus_str == NULL)
322 return; /* nothing to free in pure class filter */
323 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
324 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
325 memset(iter, 0, sizeof(*iter));
329 rte_eth_find_next(uint16_t port_id)
331 while (port_id < RTE_MAX_ETHPORTS &&
332 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
335 if (port_id >= RTE_MAX_ETHPORTS)
336 return RTE_MAX_ETHPORTS;
342 * Macro to iterate over all valid ports for internal usage.
343 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
345 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
346 for (port_id = rte_eth_find_next(0); \
347 port_id < RTE_MAX_ETHPORTS; \
348 port_id = rte_eth_find_next(port_id + 1))
351 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
353 port_id = rte_eth_find_next(port_id);
354 while (port_id < RTE_MAX_ETHPORTS &&
355 rte_eth_devices[port_id].device != parent)
356 port_id = rte_eth_find_next(port_id + 1);
362 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
364 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
365 return rte_eth_find_next_of(port_id,
366 rte_eth_devices[ref_port_id].device);
370 rte_eth_dev_shared_data_prepare(void)
372 const unsigned flags = 0;
373 const struct rte_memzone *mz;
375 rte_spinlock_lock(&rte_eth_shared_data_lock);
377 if (rte_eth_dev_shared_data == NULL) {
378 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
379 /* Allocate port data and ownership shared memory. */
380 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
381 sizeof(*rte_eth_dev_shared_data),
382 rte_socket_id(), flags);
384 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
386 rte_panic("Cannot allocate ethdev shared data\n");
388 rte_eth_dev_shared_data = mz->addr;
389 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
390 rte_eth_dev_shared_data->next_owner_id =
391 RTE_ETH_DEV_NO_OWNER + 1;
392 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
393 memset(rte_eth_dev_shared_data->data, 0,
394 sizeof(rte_eth_dev_shared_data->data));
398 rte_spinlock_unlock(&rte_eth_shared_data_lock);
402 is_allocated(const struct rte_eth_dev *ethdev)
404 return ethdev->data->name[0] != '\0';
407 static struct rte_eth_dev *
408 _rte_eth_dev_allocated(const char *name)
412 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
413 if (rte_eth_devices[i].data != NULL &&
414 strcmp(rte_eth_devices[i].data->name, name) == 0)
415 return &rte_eth_devices[i];
421 rte_eth_dev_allocated(const char *name)
423 struct rte_eth_dev *ethdev;
425 rte_eth_dev_shared_data_prepare();
427 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
429 ethdev = _rte_eth_dev_allocated(name);
431 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
437 rte_eth_dev_find_free_port(void)
441 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 /* Using shared name field to find a free port. */
443 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
444 RTE_ASSERT(rte_eth_devices[i].state ==
449 return RTE_MAX_ETHPORTS;
452 static struct rte_eth_dev *
453 eth_dev_get(uint16_t port_id)
455 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
457 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
463 rte_eth_dev_allocate(const char *name)
466 struct rte_eth_dev *eth_dev = NULL;
469 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
471 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
475 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
476 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
480 rte_eth_dev_shared_data_prepare();
482 /* Synchronize port creation between primary and secondary threads. */
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 if (_rte_eth_dev_allocated(name) != NULL) {
487 "Ethernet device with name %s already allocated\n",
492 port_id = rte_eth_dev_find_free_port();
493 if (port_id == RTE_MAX_ETHPORTS) {
495 "Reached maximum number of Ethernet ports\n");
499 eth_dev = eth_dev_get(port_id);
500 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
501 eth_dev->data->port_id = port_id;
502 eth_dev->data->mtu = RTE_ETHER_MTU;
505 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
511 * Attach to a port already registered by the primary process, which
512 * makes sure that the same device would have the same port id both
513 * in the primary and secondary process.
516 rte_eth_dev_attach_secondary(const char *name)
519 struct rte_eth_dev *eth_dev = NULL;
521 rte_eth_dev_shared_data_prepare();
523 /* Synchronize port attachment to primary port creation and release. */
524 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
527 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
530 if (i == RTE_MAX_ETHPORTS) {
532 "Device %s is not driven by the primary process\n",
535 eth_dev = eth_dev_get(i);
536 RTE_ASSERT(eth_dev->data->port_id == i);
539 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
544 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
549 rte_eth_dev_shared_data_prepare();
551 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
552 _rte_eth_dev_callback_process(eth_dev,
553 RTE_ETH_EVENT_DESTROY, NULL);
555 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
557 eth_dev->state = RTE_ETH_DEV_UNUSED;
559 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
560 rte_free(eth_dev->data->rx_queues);
561 rte_free(eth_dev->data->tx_queues);
562 rte_free(eth_dev->data->mac_addrs);
563 rte_free(eth_dev->data->hash_mac_addrs);
564 rte_free(eth_dev->data->dev_private);
565 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
568 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
574 rte_eth_dev_is_valid_port(uint16_t port_id)
576 if (port_id >= RTE_MAX_ETHPORTS ||
577 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
584 rte_eth_is_valid_owner_id(uint64_t owner_id)
586 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
587 rte_eth_dev_shared_data->next_owner_id <= owner_id)
593 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
595 port_id = rte_eth_find_next(port_id);
596 while (port_id < RTE_MAX_ETHPORTS &&
597 rte_eth_devices[port_id].data->owner.id != owner_id)
598 port_id = rte_eth_find_next(port_id + 1);
604 rte_eth_dev_owner_new(uint64_t *owner_id)
606 rte_eth_dev_shared_data_prepare();
608 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
610 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
612 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
617 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
618 const struct rte_eth_dev_owner *new_owner)
620 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
621 struct rte_eth_dev_owner *port_owner;
623 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
624 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
629 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
630 !rte_eth_is_valid_owner_id(old_owner_id)) {
632 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
633 old_owner_id, new_owner->id);
637 port_owner = &rte_eth_devices[port_id].data->owner;
638 if (port_owner->id != old_owner_id) {
640 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
641 port_id, port_owner->name, port_owner->id);
645 /* can not truncate (same structure) */
646 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
648 port_owner->id = new_owner->id;
650 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
651 port_id, new_owner->name, new_owner->id);
657 rte_eth_dev_owner_set(const uint16_t port_id,
658 const struct rte_eth_dev_owner *owner)
662 rte_eth_dev_shared_data_prepare();
664 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
666 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
668 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
673 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
675 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
676 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
679 rte_eth_dev_shared_data_prepare();
681 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
683 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
685 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
690 rte_eth_dev_owner_delete(const uint64_t owner_id)
695 rte_eth_dev_shared_data_prepare();
697 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
699 if (rte_eth_is_valid_owner_id(owner_id)) {
700 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
701 if (rte_eth_devices[port_id].data->owner.id == owner_id)
702 memset(&rte_eth_devices[port_id].data->owner, 0,
703 sizeof(struct rte_eth_dev_owner));
704 RTE_ETHDEV_LOG(NOTICE,
705 "All port owners owned by %016"PRIx64" identifier have removed\n",
709 "Invalid owner id=%016"PRIx64"\n",
714 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
720 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
723 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
725 rte_eth_dev_shared_data_prepare();
727 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
729 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
730 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
734 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
737 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
742 rte_eth_dev_socket_id(uint16_t port_id)
744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
745 return rte_eth_devices[port_id].data->numa_node;
749 rte_eth_dev_get_sec_ctx(uint16_t port_id)
751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
752 return rte_eth_devices[port_id].security_ctx;
756 rte_eth_dev_count_avail(void)
763 RTE_ETH_FOREACH_DEV(p)
770 rte_eth_dev_count_total(void)
772 uint16_t port, count = 0;
774 RTE_ETH_FOREACH_VALID_DEV(port)
781 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
788 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
792 /* shouldn't check 'rte_eth_devices[i].data',
793 * because it might be overwritten by VDEV PMD */
794 tmp = rte_eth_dev_shared_data->data[port_id].name;
800 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
805 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
809 RTE_ETH_FOREACH_VALID_DEV(pid)
810 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
819 eth_err(uint16_t port_id, int ret)
823 if (rte_eth_dev_is_removed(port_id))
829 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
831 uint16_t old_nb_queues = dev->data->nb_rx_queues;
835 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
836 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
837 sizeof(dev->data->rx_queues[0]) * nb_queues,
838 RTE_CACHE_LINE_SIZE);
839 if (dev->data->rx_queues == NULL) {
840 dev->data->nb_rx_queues = 0;
843 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
846 rxq = dev->data->rx_queues;
848 for (i = nb_queues; i < old_nb_queues; i++)
849 (*dev->dev_ops->rx_queue_release)(rxq[i]);
850 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
851 RTE_CACHE_LINE_SIZE);
854 if (nb_queues > old_nb_queues) {
855 uint16_t new_qs = nb_queues - old_nb_queues;
857 memset(rxq + old_nb_queues, 0,
858 sizeof(rxq[0]) * new_qs);
861 dev->data->rx_queues = rxq;
863 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
866 rxq = dev->data->rx_queues;
868 for (i = nb_queues; i < old_nb_queues; i++)
869 (*dev->dev_ops->rx_queue_release)(rxq[i]);
871 rte_free(dev->data->rx_queues);
872 dev->data->rx_queues = NULL;
874 dev->data->nb_rx_queues = nb_queues;
879 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
881 struct rte_eth_dev *dev;
883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
885 dev = &rte_eth_devices[port_id];
886 if (!dev->data->dev_started) {
888 "Port %u must be started before start any queue\n",
893 if (rx_queue_id >= dev->data->nb_rx_queues) {
894 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
898 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
900 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
902 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
903 rx_queue_id, port_id);
907 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
909 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
910 rx_queue_id, port_id);
914 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
920 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
922 struct rte_eth_dev *dev;
924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
926 dev = &rte_eth_devices[port_id];
927 if (rx_queue_id >= dev->data->nb_rx_queues) {
928 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
934 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
936 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
937 rx_queue_id, port_id);
941 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
943 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
944 rx_queue_id, port_id);
948 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
953 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
955 struct rte_eth_dev *dev;
957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
959 dev = &rte_eth_devices[port_id];
960 if (!dev->data->dev_started) {
962 "Port %u must be started before start any queue\n",
967 if (tx_queue_id >= dev->data->nb_tx_queues) {
968 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
972 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
974 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
976 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
977 tx_queue_id, port_id);
981 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
983 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
984 tx_queue_id, port_id);
988 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
992 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
994 struct rte_eth_dev *dev;
996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
998 dev = &rte_eth_devices[port_id];
999 if (tx_queue_id >= dev->data->nb_tx_queues) {
1000 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1006 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1007 RTE_ETHDEV_LOG(INFO,
1008 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1009 tx_queue_id, port_id);
1013 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1014 RTE_ETHDEV_LOG(INFO,
1015 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1016 tx_queue_id, port_id);
1020 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1025 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1027 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1031 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1032 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1033 sizeof(dev->data->tx_queues[0]) * nb_queues,
1034 RTE_CACHE_LINE_SIZE);
1035 if (dev->data->tx_queues == NULL) {
1036 dev->data->nb_tx_queues = 0;
1039 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1042 txq = dev->data->tx_queues;
1044 for (i = nb_queues; i < old_nb_queues; i++)
1045 (*dev->dev_ops->tx_queue_release)(txq[i]);
1046 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1047 RTE_CACHE_LINE_SIZE);
1050 if (nb_queues > old_nb_queues) {
1051 uint16_t new_qs = nb_queues - old_nb_queues;
1053 memset(txq + old_nb_queues, 0,
1054 sizeof(txq[0]) * new_qs);
1057 dev->data->tx_queues = txq;
1059 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1062 txq = dev->data->tx_queues;
1064 for (i = nb_queues; i < old_nb_queues; i++)
1065 (*dev->dev_ops->tx_queue_release)(txq[i]);
1067 rte_free(dev->data->tx_queues);
1068 dev->data->tx_queues = NULL;
1070 dev->data->nb_tx_queues = nb_queues;
1075 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1078 case ETH_SPEED_NUM_10M:
1079 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1080 case ETH_SPEED_NUM_100M:
1081 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1082 case ETH_SPEED_NUM_1G:
1083 return ETH_LINK_SPEED_1G;
1084 case ETH_SPEED_NUM_2_5G:
1085 return ETH_LINK_SPEED_2_5G;
1086 case ETH_SPEED_NUM_5G:
1087 return ETH_LINK_SPEED_5G;
1088 case ETH_SPEED_NUM_10G:
1089 return ETH_LINK_SPEED_10G;
1090 case ETH_SPEED_NUM_20G:
1091 return ETH_LINK_SPEED_20G;
1092 case ETH_SPEED_NUM_25G:
1093 return ETH_LINK_SPEED_25G;
1094 case ETH_SPEED_NUM_40G:
1095 return ETH_LINK_SPEED_40G;
1096 case ETH_SPEED_NUM_50G:
1097 return ETH_LINK_SPEED_50G;
1098 case ETH_SPEED_NUM_56G:
1099 return ETH_LINK_SPEED_56G;
1100 case ETH_SPEED_NUM_100G:
1101 return ETH_LINK_SPEED_100G;
1108 rte_eth_dev_rx_offload_name(uint64_t offload)
1110 const char *name = "UNKNOWN";
1113 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1114 if (offload == rte_rx_offload_names[i].offload) {
1115 name = rte_rx_offload_names[i].name;
1124 rte_eth_dev_tx_offload_name(uint64_t offload)
1126 const char *name = "UNKNOWN";
1129 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1130 if (offload == rte_tx_offload_names[i].offload) {
1131 name = rte_tx_offload_names[i].name;
1140 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1141 const struct rte_eth_conf *dev_conf)
1143 struct rte_eth_dev *dev;
1144 struct rte_eth_dev_info dev_info;
1145 struct rte_eth_conf orig_conf;
1149 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1151 dev = &rte_eth_devices[port_id];
1153 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1155 if (dev->data->dev_started) {
1157 "Port %u must be stopped to allow configuration\n",
1162 /* Store original config, as rollback required on failure */
1163 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1166 * Copy the dev_conf parameter into the dev structure.
1167 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1169 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1171 ret = rte_eth_dev_info_get(port_id, &dev_info);
1175 /* If number of queues specified by application for both Rx and Tx is
1176 * zero, use driver preferred values. This cannot be done individually
1177 * as it is valid for either Tx or Rx (but not both) to be zero.
1178 * If driver does not provide any preferred valued, fall back on
1181 if (nb_rx_q == 0 && nb_tx_q == 0) {
1182 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1184 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1185 nb_tx_q = dev_info.default_txportconf.nb_queues;
1187 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1190 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1192 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1193 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1198 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1200 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1201 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1207 * Check that the numbers of RX and TX queues are not greater
1208 * than the maximum number of RX and TX queues supported by the
1209 * configured device.
1211 if (nb_rx_q > dev_info.max_rx_queues) {
1212 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1213 port_id, nb_rx_q, dev_info.max_rx_queues);
1218 if (nb_tx_q > dev_info.max_tx_queues) {
1219 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1220 port_id, nb_tx_q, dev_info.max_tx_queues);
1225 /* Check that the device supports requested interrupts */
1226 if ((dev_conf->intr_conf.lsc == 1) &&
1227 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1228 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1229 dev->device->driver->name);
1233 if ((dev_conf->intr_conf.rmv == 1) &&
1234 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1235 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1236 dev->device->driver->name);
1242 * If jumbo frames are enabled, check that the maximum RX packet
1243 * length is supported by the configured device.
1245 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1246 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1248 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1249 port_id, dev_conf->rxmode.max_rx_pkt_len,
1250 dev_info.max_rx_pktlen);
1253 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1255 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1256 port_id, dev_conf->rxmode.max_rx_pkt_len,
1257 (unsigned int)RTE_ETHER_MIN_LEN);
1262 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1263 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1264 /* Use default value */
1265 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1269 /* Any requested offloading must be within its device capabilities */
1270 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1271 dev_conf->rxmode.offloads) {
1273 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1274 "capabilities 0x%"PRIx64" in %s()\n",
1275 port_id, dev_conf->rxmode.offloads,
1276 dev_info.rx_offload_capa,
1281 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1282 dev_conf->txmode.offloads) {
1284 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1285 "capabilities 0x%"PRIx64" in %s()\n",
1286 port_id, dev_conf->txmode.offloads,
1287 dev_info.tx_offload_capa,
1293 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1294 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1296 /* Check that device supports requested rss hash functions. */
1297 if ((dev_info.flow_type_rss_offloads |
1298 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1299 dev_info.flow_type_rss_offloads) {
1301 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1302 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1303 dev_info.flow_type_rss_offloads);
1309 * Setup new number of RX/TX queues and reconfigure device.
1311 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1314 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1320 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1323 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1325 rte_eth_dev_rx_queue_config(dev, 0);
1330 diag = (*dev->dev_ops->dev_configure)(dev);
1332 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1334 rte_eth_dev_rx_queue_config(dev, 0);
1335 rte_eth_dev_tx_queue_config(dev, 0);
1336 ret = eth_err(port_id, diag);
1340 /* Initialize Rx profiling if enabled at compilation time. */
1341 diag = __rte_eth_dev_profile_init(port_id, dev);
1343 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1345 rte_eth_dev_rx_queue_config(dev, 0);
1346 rte_eth_dev_tx_queue_config(dev, 0);
1347 ret = eth_err(port_id, diag);
1354 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1360 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1362 if (dev->data->dev_started) {
1363 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1364 dev->data->port_id);
1368 rte_eth_dev_rx_queue_config(dev, 0);
1369 rte_eth_dev_tx_queue_config(dev, 0);
1371 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1375 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1376 struct rte_eth_dev_info *dev_info)
1378 struct rte_ether_addr *addr;
1383 /* replay MAC address configuration including default MAC */
1384 addr = &dev->data->mac_addrs[0];
1385 if (*dev->dev_ops->mac_addr_set != NULL)
1386 (*dev->dev_ops->mac_addr_set)(dev, addr);
1387 else if (*dev->dev_ops->mac_addr_add != NULL)
1388 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1390 if (*dev->dev_ops->mac_addr_add != NULL) {
1391 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1392 addr = &dev->data->mac_addrs[i];
1394 /* skip zero address */
1395 if (rte_is_zero_ether_addr(addr))
1399 pool_mask = dev->data->mac_pool_sel[i];
1402 if (pool_mask & 1ULL)
1403 (*dev->dev_ops->mac_addr_add)(dev,
1407 } while (pool_mask);
1413 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1414 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1418 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1419 rte_eth_dev_mac_restore(dev, dev_info);
1421 /* replay promiscuous configuration */
1423 * use callbacks directly since we don't need port_id check and
1424 * would like to bypass the same value set
1426 if (rte_eth_promiscuous_get(port_id) == 1 &&
1427 *dev->dev_ops->promiscuous_enable != NULL) {
1428 ret = eth_err(port_id,
1429 (*dev->dev_ops->promiscuous_enable)(dev));
1430 if (ret != 0 && ret != -ENOTSUP) {
1432 "Failed to enable promiscuous mode for device (port %u): %s\n",
1433 port_id, rte_strerror(-ret));
1436 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1437 *dev->dev_ops->promiscuous_disable != NULL) {
1438 ret = eth_err(port_id,
1439 (*dev->dev_ops->promiscuous_disable)(dev));
1440 if (ret != 0 && ret != -ENOTSUP) {
1442 "Failed to disable promiscuous mode for device (port %u): %s\n",
1443 port_id, rte_strerror(-ret));
1448 /* replay all multicast configuration */
1450 * use callbacks directly since we don't need port_id check and
1451 * would like to bypass the same value set
1453 if (rte_eth_allmulticast_get(port_id) == 1 &&
1454 *dev->dev_ops->allmulticast_enable != NULL) {
1455 ret = eth_err(port_id,
1456 (*dev->dev_ops->allmulticast_enable)(dev));
1457 if (ret != 0 && ret != -ENOTSUP) {
1459 "Failed to enable allmulticast mode for device (port %u): %s\n",
1460 port_id, rte_strerror(-ret));
1463 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1464 *dev->dev_ops->allmulticast_disable != NULL) {
1465 ret = eth_err(port_id,
1466 (*dev->dev_ops->allmulticast_disable)(dev));
1467 if (ret != 0 && ret != -ENOTSUP) {
1469 "Failed to disable allmulticast mode for device (port %u): %s\n",
1470 port_id, rte_strerror(-ret));
1479 rte_eth_dev_start(uint16_t port_id)
1481 struct rte_eth_dev *dev;
1482 struct rte_eth_dev_info dev_info;
1486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1488 dev = &rte_eth_devices[port_id];
1490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1492 if (dev->data->dev_started != 0) {
1493 RTE_ETHDEV_LOG(INFO,
1494 "Device with port_id=%"PRIu16" already started\n",
1499 ret = rte_eth_dev_info_get(port_id, &dev_info);
1503 /* Lets restore MAC now if device does not support live change */
1504 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1505 rte_eth_dev_mac_restore(dev, &dev_info);
1507 diag = (*dev->dev_ops->dev_start)(dev);
1509 dev->data->dev_started = 1;
1511 return eth_err(port_id, diag);
1513 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1516 "Error during restoring configuration for device (port %u): %s\n",
1517 port_id, rte_strerror(-ret));
1518 rte_eth_dev_stop(port_id);
1522 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1524 (*dev->dev_ops->link_update)(dev, 0);
1530 rte_eth_dev_stop(uint16_t port_id)
1532 struct rte_eth_dev *dev;
1534 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1535 dev = &rte_eth_devices[port_id];
1537 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1539 if (dev->data->dev_started == 0) {
1540 RTE_ETHDEV_LOG(INFO,
1541 "Device with port_id=%"PRIu16" already stopped\n",
1546 dev->data->dev_started = 0;
1547 (*dev->dev_ops->dev_stop)(dev);
1551 rte_eth_dev_set_link_up(uint16_t port_id)
1553 struct rte_eth_dev *dev;
1555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1557 dev = &rte_eth_devices[port_id];
1559 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1560 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1564 rte_eth_dev_set_link_down(uint16_t port_id)
1566 struct rte_eth_dev *dev;
1568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1570 dev = &rte_eth_devices[port_id];
1572 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1573 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1577 rte_eth_dev_close(uint16_t port_id)
1579 struct rte_eth_dev *dev;
1581 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1582 dev = &rte_eth_devices[port_id];
1584 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1585 dev->data->dev_started = 0;
1586 (*dev->dev_ops->dev_close)(dev);
1588 /* check behaviour flag - temporary for PMD migration */
1589 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1590 /* new behaviour: send event + reset state + free all data */
1591 rte_eth_dev_release_port(dev);
1594 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1595 "The driver %s should migrate to the new behaviour.\n",
1596 dev->device->driver->name);
1597 /* old behaviour: only free queue arrays */
1598 dev->data->nb_rx_queues = 0;
1599 rte_free(dev->data->rx_queues);
1600 dev->data->rx_queues = NULL;
1601 dev->data->nb_tx_queues = 0;
1602 rte_free(dev->data->tx_queues);
1603 dev->data->tx_queues = NULL;
1607 rte_eth_dev_reset(uint16_t port_id)
1609 struct rte_eth_dev *dev;
1612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1613 dev = &rte_eth_devices[port_id];
1615 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1617 rte_eth_dev_stop(port_id);
1618 ret = dev->dev_ops->dev_reset(dev);
1620 return eth_err(port_id, ret);
1624 rte_eth_dev_is_removed(uint16_t port_id)
1626 struct rte_eth_dev *dev;
1629 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1631 dev = &rte_eth_devices[port_id];
1633 if (dev->state == RTE_ETH_DEV_REMOVED)
1636 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1638 ret = dev->dev_ops->is_removed(dev);
1640 /* Device is physically removed. */
1641 dev->state = RTE_ETH_DEV_REMOVED;
1647 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1648 uint16_t nb_rx_desc, unsigned int socket_id,
1649 const struct rte_eth_rxconf *rx_conf,
1650 struct rte_mempool *mp)
1653 uint32_t mbp_buf_size;
1654 struct rte_eth_dev *dev;
1655 struct rte_eth_dev_info dev_info;
1656 struct rte_eth_rxconf local_conf;
1659 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1661 dev = &rte_eth_devices[port_id];
1662 if (rx_queue_id >= dev->data->nb_rx_queues) {
1663 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1668 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1675 * Check the size of the mbuf data buffer.
1676 * This value must be provided in the private data of the memory pool.
1677 * First check that the memory pool has a valid private data.
1679 ret = rte_eth_dev_info_get(port_id, &dev_info);
1683 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1684 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1685 mp->name, (int)mp->private_data_size,
1686 (int)sizeof(struct rte_pktmbuf_pool_private));
1689 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1691 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1693 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1694 mp->name, (int)mbp_buf_size,
1695 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1696 (int)RTE_PKTMBUF_HEADROOM,
1697 (int)dev_info.min_rx_bufsize);
1701 /* Use default specified by driver, if nb_rx_desc is zero */
1702 if (nb_rx_desc == 0) {
1703 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1704 /* If driver default is also zero, fall back on EAL default */
1705 if (nb_rx_desc == 0)
1706 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1709 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1710 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1711 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1714 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1715 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1716 dev_info.rx_desc_lim.nb_min,
1717 dev_info.rx_desc_lim.nb_align);
1721 if (dev->data->dev_started &&
1722 !(dev_info.dev_capa &
1723 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1726 if (dev->data->dev_started &&
1727 (dev->data->rx_queue_state[rx_queue_id] !=
1728 RTE_ETH_QUEUE_STATE_STOPPED))
1731 rxq = dev->data->rx_queues;
1732 if (rxq[rx_queue_id]) {
1733 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1735 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1736 rxq[rx_queue_id] = NULL;
1739 if (rx_conf == NULL)
1740 rx_conf = &dev_info.default_rxconf;
1742 local_conf = *rx_conf;
1745 * If an offloading has already been enabled in
1746 * rte_eth_dev_configure(), it has been enabled on all queues,
1747 * so there is no need to enable it in this queue again.
1748 * The local_conf.offloads input to underlying PMD only carries
1749 * those offloadings which are only enabled on this queue and
1750 * not enabled on all queues.
1752 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1755 * New added offloadings for this queue are those not enabled in
1756 * rte_eth_dev_configure() and they must be per-queue type.
1757 * A pure per-port offloading can't be enabled on a queue while
1758 * disabled on another queue. A pure per-port offloading can't
1759 * be enabled for any queue as new added one if it hasn't been
1760 * enabled in rte_eth_dev_configure().
1762 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1763 local_conf.offloads) {
1765 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1766 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1767 port_id, rx_queue_id, local_conf.offloads,
1768 dev_info.rx_queue_offload_capa,
1773 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1774 socket_id, &local_conf, mp);
1776 if (!dev->data->min_rx_buf_size ||
1777 dev->data->min_rx_buf_size > mbp_buf_size)
1778 dev->data->min_rx_buf_size = mbp_buf_size;
1781 return eth_err(port_id, ret);
1785 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1786 uint16_t nb_rx_desc,
1787 const struct rte_eth_hairpin_conf *conf)
1790 struct rte_eth_dev *dev;
1791 struct rte_eth_hairpin_cap cap;
1796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1798 dev = &rte_eth_devices[port_id];
1799 if (rx_queue_id >= dev->data->nb_rx_queues) {
1800 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1803 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1808 /* if nb_rx_desc is zero use max number of desc from the driver. */
1809 if (nb_rx_desc == 0)
1810 nb_rx_desc = cap.max_nb_desc;
1811 if (nb_rx_desc > cap.max_nb_desc) {
1813 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1814 nb_rx_desc, cap.max_nb_desc);
1817 if (conf->peer_count > cap.max_rx_2_tx) {
1819 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1820 conf->peer_count, cap.max_rx_2_tx);
1823 if (conf->peer_count == 0) {
1825 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1829 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1830 cap.max_nb_queues != UINT16_MAX; i++) {
1831 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1834 if (count > cap.max_nb_queues) {
1835 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1839 if (dev->data->dev_started)
1841 rxq = dev->data->rx_queues;
1842 if (rxq[rx_queue_id] != NULL) {
1843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1845 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1846 rxq[rx_queue_id] = NULL;
1848 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1851 dev->data->rx_queue_state[rx_queue_id] =
1852 RTE_ETH_QUEUE_STATE_HAIRPIN;
1853 return eth_err(port_id, ret);
1857 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1858 uint16_t nb_tx_desc, unsigned int socket_id,
1859 const struct rte_eth_txconf *tx_conf)
1861 struct rte_eth_dev *dev;
1862 struct rte_eth_dev_info dev_info;
1863 struct rte_eth_txconf local_conf;
1867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1869 dev = &rte_eth_devices[port_id];
1870 if (tx_queue_id >= dev->data->nb_tx_queues) {
1871 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1877 ret = rte_eth_dev_info_get(port_id, &dev_info);
1881 /* Use default specified by driver, if nb_tx_desc is zero */
1882 if (nb_tx_desc == 0) {
1883 nb_tx_desc = dev_info.default_txportconf.ring_size;
1884 /* If driver default is zero, fall back on EAL default */
1885 if (nb_tx_desc == 0)
1886 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1888 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1889 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1890 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1892 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1893 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1894 dev_info.tx_desc_lim.nb_min,
1895 dev_info.tx_desc_lim.nb_align);
1899 if (dev->data->dev_started &&
1900 !(dev_info.dev_capa &
1901 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1904 if (dev->data->dev_started &&
1905 (dev->data->tx_queue_state[tx_queue_id] !=
1906 RTE_ETH_QUEUE_STATE_STOPPED))
1909 txq = dev->data->tx_queues;
1910 if (txq[tx_queue_id]) {
1911 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1913 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1914 txq[tx_queue_id] = NULL;
1917 if (tx_conf == NULL)
1918 tx_conf = &dev_info.default_txconf;
1920 local_conf = *tx_conf;
1923 * If an offloading has already been enabled in
1924 * rte_eth_dev_configure(), it has been enabled on all queues,
1925 * so there is no need to enable it in this queue again.
1926 * The local_conf.offloads input to underlying PMD only carries
1927 * those offloadings which are only enabled on this queue and
1928 * not enabled on all queues.
1930 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1933 * New added offloadings for this queue are those not enabled in
1934 * rte_eth_dev_configure() and they must be per-queue type.
1935 * A pure per-port offloading can't be enabled on a queue while
1936 * disabled on another queue. A pure per-port offloading can't
1937 * be enabled for any queue as new added one if it hasn't been
1938 * enabled in rte_eth_dev_configure().
1940 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1941 local_conf.offloads) {
1943 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1944 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1945 port_id, tx_queue_id, local_conf.offloads,
1946 dev_info.tx_queue_offload_capa,
1951 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1952 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1956 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1957 uint16_t nb_tx_desc,
1958 const struct rte_eth_hairpin_conf *conf)
1960 struct rte_eth_dev *dev;
1961 struct rte_eth_hairpin_cap cap;
1967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1968 dev = &rte_eth_devices[port_id];
1969 if (tx_queue_id >= dev->data->nb_tx_queues) {
1970 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1973 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1976 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
1978 /* if nb_rx_desc is zero use max number of desc from the driver. */
1979 if (nb_tx_desc == 0)
1980 nb_tx_desc = cap.max_nb_desc;
1981 if (nb_tx_desc > cap.max_nb_desc) {
1983 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
1984 nb_tx_desc, cap.max_nb_desc);
1987 if (conf->peer_count > cap.max_tx_2_rx) {
1989 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
1990 conf->peer_count, cap.max_tx_2_rx);
1993 if (conf->peer_count == 0) {
1995 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
1999 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2000 cap.max_nb_queues != UINT16_MAX; i++) {
2001 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2004 if (count > cap.max_nb_queues) {
2005 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2009 if (dev->data->dev_started)
2011 txq = dev->data->tx_queues;
2012 if (txq[tx_queue_id] != NULL) {
2013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2015 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2016 txq[tx_queue_id] = NULL;
2018 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2019 (dev, tx_queue_id, nb_tx_desc, conf);
2021 dev->data->tx_queue_state[tx_queue_id] =
2022 RTE_ETH_QUEUE_STATE_HAIRPIN;
2023 return eth_err(port_id, ret);
2027 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2028 void *userdata __rte_unused)
2032 for (i = 0; i < unsent; i++)
2033 rte_pktmbuf_free(pkts[i]);
2037 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2040 uint64_t *count = userdata;
2043 for (i = 0; i < unsent; i++)
2044 rte_pktmbuf_free(pkts[i]);
2050 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2051 buffer_tx_error_fn cbfn, void *userdata)
2053 buffer->error_callback = cbfn;
2054 buffer->error_userdata = userdata;
2059 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2066 buffer->size = size;
2067 if (buffer->error_callback == NULL) {
2068 ret = rte_eth_tx_buffer_set_err_callback(
2069 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2076 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2078 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2081 /* Validate Input Data. Bail if not valid or not supported. */
2082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2085 /* Call driver to free pending mbufs. */
2086 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2088 return eth_err(port_id, ret);
2092 rte_eth_promiscuous_enable(uint16_t port_id)
2094 struct rte_eth_dev *dev;
2097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2098 dev = &rte_eth_devices[port_id];
2100 if (dev->data->promiscuous == 1)
2103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2105 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2106 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2108 return eth_err(port_id, diag);
2112 rte_eth_promiscuous_disable(uint16_t port_id)
2114 struct rte_eth_dev *dev;
2117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2118 dev = &rte_eth_devices[port_id];
2120 if (dev->data->promiscuous == 0)
2123 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2125 dev->data->promiscuous = 0;
2126 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2128 dev->data->promiscuous = 1;
2130 return eth_err(port_id, diag);
2134 rte_eth_promiscuous_get(uint16_t port_id)
2136 struct rte_eth_dev *dev;
2138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2140 dev = &rte_eth_devices[port_id];
2141 return dev->data->promiscuous;
2145 rte_eth_allmulticast_enable(uint16_t port_id)
2147 struct rte_eth_dev *dev;
2150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2151 dev = &rte_eth_devices[port_id];
2153 if (dev->data->all_multicast == 1)
2156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2157 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2158 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2160 return eth_err(port_id, diag);
2164 rte_eth_allmulticast_disable(uint16_t port_id)
2166 struct rte_eth_dev *dev;
2169 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2170 dev = &rte_eth_devices[port_id];
2172 if (dev->data->all_multicast == 0)
2175 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2176 dev->data->all_multicast = 0;
2177 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2179 dev->data->all_multicast = 1;
2181 return eth_err(port_id, diag);
2185 rte_eth_allmulticast_get(uint16_t port_id)
2187 struct rte_eth_dev *dev;
2189 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2191 dev = &rte_eth_devices[port_id];
2192 return dev->data->all_multicast;
2196 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2198 struct rte_eth_dev *dev;
2200 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2201 dev = &rte_eth_devices[port_id];
2203 if (dev->data->dev_conf.intr_conf.lsc &&
2204 dev->data->dev_started)
2205 rte_eth_linkstatus_get(dev, eth_link);
2207 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2208 (*dev->dev_ops->link_update)(dev, 1);
2209 *eth_link = dev->data->dev_link;
2216 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2218 struct rte_eth_dev *dev;
2220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2221 dev = &rte_eth_devices[port_id];
2223 if (dev->data->dev_conf.intr_conf.lsc &&
2224 dev->data->dev_started)
2225 rte_eth_linkstatus_get(dev, eth_link);
2227 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2228 (*dev->dev_ops->link_update)(dev, 0);
2229 *eth_link = dev->data->dev_link;
2236 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2238 struct rte_eth_dev *dev;
2240 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2242 dev = &rte_eth_devices[port_id];
2243 memset(stats, 0, sizeof(*stats));
2245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2246 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2247 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2251 rte_eth_stats_reset(uint16_t port_id)
2253 struct rte_eth_dev *dev;
2256 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2257 dev = &rte_eth_devices[port_id];
2259 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2260 ret = (*dev->dev_ops->stats_reset)(dev);
2262 return eth_err(port_id, ret);
2264 dev->data->rx_mbuf_alloc_failed = 0;
2270 get_xstats_basic_count(struct rte_eth_dev *dev)
2272 uint16_t nb_rxqs, nb_txqs;
2275 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2276 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2278 count = RTE_NB_STATS;
2279 count += nb_rxqs * RTE_NB_RXQ_STATS;
2280 count += nb_txqs * RTE_NB_TXQ_STATS;
2286 get_xstats_count(uint16_t port_id)
2288 struct rte_eth_dev *dev;
2291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2292 dev = &rte_eth_devices[port_id];
2293 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2294 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2297 return eth_err(port_id, count);
2299 if (dev->dev_ops->xstats_get_names != NULL) {
2300 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2302 return eth_err(port_id, count);
2307 count += get_xstats_basic_count(dev);
2313 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2316 int cnt_xstats, idx_xstat;
2318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2321 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2326 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2331 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2332 if (cnt_xstats < 0) {
2333 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2337 /* Get id-name lookup table */
2338 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2340 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2341 port_id, xstats_names, cnt_xstats, NULL)) {
2342 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2346 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2347 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2356 /* retrieve basic stats names */
2358 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2359 struct rte_eth_xstat_name *xstats_names)
2361 int cnt_used_entries = 0;
2362 uint32_t idx, id_queue;
2365 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2366 strlcpy(xstats_names[cnt_used_entries].name,
2367 rte_stats_strings[idx].name,
2368 sizeof(xstats_names[0].name));
2371 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2372 for (id_queue = 0; id_queue < num_q; id_queue++) {
2373 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2374 snprintf(xstats_names[cnt_used_entries].name,
2375 sizeof(xstats_names[0].name),
2377 id_queue, rte_rxq_stats_strings[idx].name);
2382 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2383 for (id_queue = 0; id_queue < num_q; id_queue++) {
2384 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2385 snprintf(xstats_names[cnt_used_entries].name,
2386 sizeof(xstats_names[0].name),
2388 id_queue, rte_txq_stats_strings[idx].name);
2392 return cnt_used_entries;
2395 /* retrieve ethdev extended statistics names */
2397 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2398 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2401 struct rte_eth_xstat_name *xstats_names_copy;
2402 unsigned int no_basic_stat_requested = 1;
2403 unsigned int no_ext_stat_requested = 1;
2404 unsigned int expected_entries;
2405 unsigned int basic_count;
2406 struct rte_eth_dev *dev;
2410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2411 dev = &rte_eth_devices[port_id];
2413 basic_count = get_xstats_basic_count(dev);
2414 ret = get_xstats_count(port_id);
2417 expected_entries = (unsigned int)ret;
2419 /* Return max number of stats if no ids given */
2422 return expected_entries;
2423 else if (xstats_names && size < expected_entries)
2424 return expected_entries;
2427 if (ids && !xstats_names)
2430 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2431 uint64_t ids_copy[size];
2433 for (i = 0; i < size; i++) {
2434 if (ids[i] < basic_count) {
2435 no_basic_stat_requested = 0;
2440 * Convert ids to xstats ids that PMD knows.
2441 * ids known by user are basic + extended stats.
2443 ids_copy[i] = ids[i] - basic_count;
2446 if (no_basic_stat_requested)
2447 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2448 xstats_names, ids_copy, size);
2451 /* Retrieve all stats */
2453 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2455 if (num_stats < 0 || num_stats > (int)expected_entries)
2458 return expected_entries;
2461 xstats_names_copy = calloc(expected_entries,
2462 sizeof(struct rte_eth_xstat_name));
2464 if (!xstats_names_copy) {
2465 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2470 for (i = 0; i < size; i++) {
2471 if (ids[i] >= basic_count) {
2472 no_ext_stat_requested = 0;
2478 /* Fill xstats_names_copy structure */
2479 if (ids && no_ext_stat_requested) {
2480 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2482 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2485 free(xstats_names_copy);
2491 for (i = 0; i < size; i++) {
2492 if (ids[i] >= expected_entries) {
2493 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2494 free(xstats_names_copy);
2497 xstats_names[i] = xstats_names_copy[ids[i]];
2500 free(xstats_names_copy);
2505 rte_eth_xstats_get_names(uint16_t port_id,
2506 struct rte_eth_xstat_name *xstats_names,
2509 struct rte_eth_dev *dev;
2510 int cnt_used_entries;
2511 int cnt_expected_entries;
2512 int cnt_driver_entries;
2514 cnt_expected_entries = get_xstats_count(port_id);
2515 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2516 (int)size < cnt_expected_entries)
2517 return cnt_expected_entries;
2519 /* port_id checked in get_xstats_count() */
2520 dev = &rte_eth_devices[port_id];
2522 cnt_used_entries = rte_eth_basic_stats_get_names(
2525 if (dev->dev_ops->xstats_get_names != NULL) {
2526 /* If there are any driver-specific xstats, append them
2529 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2531 xstats_names + cnt_used_entries,
2532 size - cnt_used_entries);
2533 if (cnt_driver_entries < 0)
2534 return eth_err(port_id, cnt_driver_entries);
2535 cnt_used_entries += cnt_driver_entries;
2538 return cnt_used_entries;
2543 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2545 struct rte_eth_dev *dev;
2546 struct rte_eth_stats eth_stats;
2547 unsigned int count = 0, i, q;
2548 uint64_t val, *stats_ptr;
2549 uint16_t nb_rxqs, nb_txqs;
2552 ret = rte_eth_stats_get(port_id, ð_stats);
2556 dev = &rte_eth_devices[port_id];
2558 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2559 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2562 for (i = 0; i < RTE_NB_STATS; i++) {
2563 stats_ptr = RTE_PTR_ADD(ð_stats,
2564 rte_stats_strings[i].offset);
2566 xstats[count++].value = val;
2570 for (q = 0; q < nb_rxqs; q++) {
2571 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2572 stats_ptr = RTE_PTR_ADD(ð_stats,
2573 rte_rxq_stats_strings[i].offset +
2574 q * sizeof(uint64_t));
2576 xstats[count++].value = val;
2581 for (q = 0; q < nb_txqs; q++) {
2582 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2583 stats_ptr = RTE_PTR_ADD(ð_stats,
2584 rte_txq_stats_strings[i].offset +
2585 q * sizeof(uint64_t));
2587 xstats[count++].value = val;
2593 /* retrieve ethdev extended statistics */
2595 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2596 uint64_t *values, unsigned int size)
2598 unsigned int no_basic_stat_requested = 1;
2599 unsigned int no_ext_stat_requested = 1;
2600 unsigned int num_xstats_filled;
2601 unsigned int basic_count;
2602 uint16_t expected_entries;
2603 struct rte_eth_dev *dev;
2607 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2608 ret = get_xstats_count(port_id);
2611 expected_entries = (uint16_t)ret;
2612 struct rte_eth_xstat xstats[expected_entries];
2613 dev = &rte_eth_devices[port_id];
2614 basic_count = get_xstats_basic_count(dev);
2616 /* Return max number of stats if no ids given */
2619 return expected_entries;
2620 else if (values && size < expected_entries)
2621 return expected_entries;
2627 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2628 unsigned int basic_count = get_xstats_basic_count(dev);
2629 uint64_t ids_copy[size];
2631 for (i = 0; i < size; i++) {
2632 if (ids[i] < basic_count) {
2633 no_basic_stat_requested = 0;
2638 * Convert ids to xstats ids that PMD knows.
2639 * ids known by user are basic + extended stats.
2641 ids_copy[i] = ids[i] - basic_count;
2644 if (no_basic_stat_requested)
2645 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2650 for (i = 0; i < size; i++) {
2651 if (ids[i] >= basic_count) {
2652 no_ext_stat_requested = 0;
2658 /* Fill the xstats structure */
2659 if (ids && no_ext_stat_requested)
2660 ret = rte_eth_basic_stats_get(port_id, xstats);
2662 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2666 num_xstats_filled = (unsigned int)ret;
2668 /* Return all stats */
2670 for (i = 0; i < num_xstats_filled; i++)
2671 values[i] = xstats[i].value;
2672 return expected_entries;
2676 for (i = 0; i < size; i++) {
2677 if (ids[i] >= expected_entries) {
2678 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2681 values[i] = xstats[ids[i]].value;
2687 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2690 struct rte_eth_dev *dev;
2691 unsigned int count = 0, i;
2692 signed int xcount = 0;
2693 uint16_t nb_rxqs, nb_txqs;
2696 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2698 dev = &rte_eth_devices[port_id];
2700 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2701 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2703 /* Return generic statistics */
2704 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2705 (nb_txqs * RTE_NB_TXQ_STATS);
2707 /* implemented by the driver */
2708 if (dev->dev_ops->xstats_get != NULL) {
2709 /* Retrieve the xstats from the driver at the end of the
2712 xcount = (*dev->dev_ops->xstats_get)(dev,
2713 xstats ? xstats + count : NULL,
2714 (n > count) ? n - count : 0);
2717 return eth_err(port_id, xcount);
2720 if (n < count + xcount || xstats == NULL)
2721 return count + xcount;
2723 /* now fill the xstats structure */
2724 ret = rte_eth_basic_stats_get(port_id, xstats);
2729 for (i = 0; i < count; i++)
2731 /* add an offset to driver-specific stats */
2732 for ( ; i < count + xcount; i++)
2733 xstats[i].id += count;
2735 return count + xcount;
2738 /* reset ethdev extended statistics */
2740 rte_eth_xstats_reset(uint16_t port_id)
2742 struct rte_eth_dev *dev;
2744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2745 dev = &rte_eth_devices[port_id];
2747 /* implemented by the driver */
2748 if (dev->dev_ops->xstats_reset != NULL)
2749 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2751 /* fallback to default */
2752 return rte_eth_stats_reset(port_id);
2756 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2759 struct rte_eth_dev *dev;
2761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2763 dev = &rte_eth_devices[port_id];
2765 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2767 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2770 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2773 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2776 return (*dev->dev_ops->queue_stats_mapping_set)
2777 (dev, queue_id, stat_idx, is_rx);
2782 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2785 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2786 stat_idx, STAT_QMAP_TX));
2791 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2794 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2795 stat_idx, STAT_QMAP_RX));
2799 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2801 struct rte_eth_dev *dev;
2803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2804 dev = &rte_eth_devices[port_id];
2806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2807 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2808 fw_version, fw_size));
2812 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2814 struct rte_eth_dev *dev;
2815 const struct rte_eth_desc_lim lim = {
2816 .nb_max = UINT16_MAX,
2819 .nb_seg_max = UINT16_MAX,
2820 .nb_mtu_seg_max = UINT16_MAX,
2825 * Init dev_info before port_id check since caller does not have
2826 * return status and does not know if get is successful or not.
2828 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2831 dev = &rte_eth_devices[port_id];
2833 dev_info->rx_desc_lim = lim;
2834 dev_info->tx_desc_lim = lim;
2835 dev_info->device = dev->device;
2836 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2837 dev_info->max_mtu = UINT16_MAX;
2839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2840 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2842 /* Cleanup already filled in device information */
2843 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2844 return eth_err(port_id, diag);
2847 dev_info->driver_name = dev->device->driver->name;
2848 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2849 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2851 dev_info->dev_flags = &dev->data->dev_flags;
2857 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2858 uint32_t *ptypes, int num)
2861 struct rte_eth_dev *dev;
2862 const uint32_t *all_ptypes;
2864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2865 dev = &rte_eth_devices[port_id];
2866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2867 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2872 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2873 if (all_ptypes[i] & ptype_mask) {
2875 ptypes[j] = all_ptypes[i];
2883 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
2884 uint32_t *set_ptypes, unsigned int num)
2886 const uint32_t valid_ptype_masks[] = {
2890 RTE_PTYPE_TUNNEL_MASK,
2891 RTE_PTYPE_INNER_L2_MASK,
2892 RTE_PTYPE_INNER_L3_MASK,
2893 RTE_PTYPE_INNER_L4_MASK,
2895 const uint32_t *all_ptypes;
2896 struct rte_eth_dev *dev;
2897 uint32_t unused_mask;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2902 dev = &rte_eth_devices[port_id];
2904 if (num > 0 && set_ptypes == NULL)
2907 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
2908 *dev->dev_ops->dev_ptypes_set == NULL) {
2913 if (ptype_mask == 0) {
2914 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
2919 unused_mask = ptype_mask;
2920 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
2921 uint32_t mask = ptype_mask & valid_ptype_masks[i];
2922 if (mask && mask != valid_ptype_masks[i]) {
2926 unused_mask &= ~valid_ptype_masks[i];
2934 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2935 if (all_ptypes == NULL) {
2941 * Accommodate as many set_ptypes as possible. If the supplied
2942 * set_ptypes array is insufficient fill it partially.
2944 for (i = 0, j = 0; set_ptypes != NULL &&
2945 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
2946 if (ptype_mask & all_ptypes[i]) {
2948 set_ptypes[j] = all_ptypes[i];
2956 if (set_ptypes != NULL && j < num)
2957 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
2959 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
2963 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
2969 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2971 struct rte_eth_dev *dev;
2973 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2974 dev = &rte_eth_devices[port_id];
2975 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2981 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2983 struct rte_eth_dev *dev;
2985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2987 dev = &rte_eth_devices[port_id];
2988 *mtu = dev->data->mtu;
2993 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2996 struct rte_eth_dev_info dev_info;
2997 struct rte_eth_dev *dev;
2999 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3000 dev = &rte_eth_devices[port_id];
3001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3004 * Check if the device supports dev_infos_get, if it does not
3005 * skip min_mtu/max_mtu validation here as this requires values
3006 * that are populated within the call to rte_eth_dev_info_get()
3007 * which relies on dev->dev_ops->dev_infos_get.
3009 if (*dev->dev_ops->dev_infos_get != NULL) {
3010 ret = rte_eth_dev_info_get(port_id, &dev_info);
3014 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3018 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3020 dev->data->mtu = mtu;
3022 return eth_err(port_id, ret);
3026 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3028 struct rte_eth_dev *dev;
3031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3032 dev = &rte_eth_devices[port_id];
3033 if (!(dev->data->dev_conf.rxmode.offloads &
3034 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3035 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3040 if (vlan_id > 4095) {
3041 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3047 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3049 struct rte_vlan_filter_conf *vfc;
3053 vfc = &dev->data->vlan_filter_conf;
3054 vidx = vlan_id / 64;
3055 vbit = vlan_id % 64;
3058 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3060 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3063 return eth_err(port_id, ret);
3067 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3070 struct rte_eth_dev *dev;
3072 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3073 dev = &rte_eth_devices[port_id];
3074 if (rx_queue_id >= dev->data->nb_rx_queues) {
3075 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3079 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3080 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3086 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3087 enum rte_vlan_type vlan_type,
3090 struct rte_eth_dev *dev;
3092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3093 dev = &rte_eth_devices[port_id];
3094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3096 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3101 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3103 struct rte_eth_dev *dev;
3107 uint64_t orig_offloads;
3108 uint64_t *dev_offloads;
3110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3111 dev = &rte_eth_devices[port_id];
3113 /* save original values in case of failure */
3114 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3115 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3117 /*check which option changed by application*/
3118 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3119 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3122 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3124 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3125 mask |= ETH_VLAN_STRIP_MASK;
3128 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3129 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3132 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3134 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3135 mask |= ETH_VLAN_FILTER_MASK;
3138 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3139 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3142 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3144 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3145 mask |= ETH_VLAN_EXTEND_MASK;
3148 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3149 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3152 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3154 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3155 mask |= ETH_QINQ_STRIP_MASK;
3162 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3163 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3165 /* hit an error restore original values */
3166 *dev_offloads = orig_offloads;
3169 return eth_err(port_id, ret);
3173 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3175 struct rte_eth_dev *dev;
3176 uint64_t *dev_offloads;
3179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3180 dev = &rte_eth_devices[port_id];
3181 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3183 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3184 ret |= ETH_VLAN_STRIP_OFFLOAD;
3186 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3187 ret |= ETH_VLAN_FILTER_OFFLOAD;
3189 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3190 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3192 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3193 ret |= ETH_QINQ_STRIP_OFFLOAD;
3199 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3201 struct rte_eth_dev *dev;
3203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3204 dev = &rte_eth_devices[port_id];
3205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3207 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3211 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3213 struct rte_eth_dev *dev;
3215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3216 dev = &rte_eth_devices[port_id];
3217 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3218 memset(fc_conf, 0, sizeof(*fc_conf));
3219 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3223 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3225 struct rte_eth_dev *dev;
3227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3228 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3229 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3233 dev = &rte_eth_devices[port_id];
3234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3235 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3239 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3240 struct rte_eth_pfc_conf *pfc_conf)
3242 struct rte_eth_dev *dev;
3244 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3245 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3246 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3250 dev = &rte_eth_devices[port_id];
3251 /* High water, low water validation are device specific */
3252 if (*dev->dev_ops->priority_flow_ctrl_set)
3253 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3259 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3267 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3268 for (i = 0; i < num; i++) {
3269 if (reta_conf[i].mask)
3277 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3281 uint16_t i, idx, shift;
3287 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3291 for (i = 0; i < reta_size; i++) {
3292 idx = i / RTE_RETA_GROUP_SIZE;
3293 shift = i % RTE_RETA_GROUP_SIZE;
3294 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3295 (reta_conf[idx].reta[shift] >= max_rxq)) {
3297 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3299 reta_conf[idx].reta[shift], max_rxq);
3308 rte_eth_dev_rss_reta_update(uint16_t port_id,
3309 struct rte_eth_rss_reta_entry64 *reta_conf,
3312 struct rte_eth_dev *dev;
3315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3316 /* Check mask bits */
3317 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3321 dev = &rte_eth_devices[port_id];
3323 /* Check entry value */
3324 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3325 dev->data->nb_rx_queues);
3329 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3330 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3335 rte_eth_dev_rss_reta_query(uint16_t port_id,
3336 struct rte_eth_rss_reta_entry64 *reta_conf,
3339 struct rte_eth_dev *dev;
3342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3344 /* Check mask bits */
3345 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3349 dev = &rte_eth_devices[port_id];
3350 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3351 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3356 rte_eth_dev_rss_hash_update(uint16_t port_id,
3357 struct rte_eth_rss_conf *rss_conf)
3359 struct rte_eth_dev *dev;
3360 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3365 ret = rte_eth_dev_info_get(port_id, &dev_info);
3369 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3371 dev = &rte_eth_devices[port_id];
3372 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3373 dev_info.flow_type_rss_offloads) {
3375 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3376 port_id, rss_conf->rss_hf,
3377 dev_info.flow_type_rss_offloads);
3380 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3381 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3386 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3387 struct rte_eth_rss_conf *rss_conf)
3389 struct rte_eth_dev *dev;
3391 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3392 dev = &rte_eth_devices[port_id];
3393 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3394 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3399 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3400 struct rte_eth_udp_tunnel *udp_tunnel)
3402 struct rte_eth_dev *dev;
3404 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3405 if (udp_tunnel == NULL) {
3406 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3410 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3411 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3415 dev = &rte_eth_devices[port_id];
3416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3417 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3422 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3423 struct rte_eth_udp_tunnel *udp_tunnel)
3425 struct rte_eth_dev *dev;
3427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3428 dev = &rte_eth_devices[port_id];
3430 if (udp_tunnel == NULL) {
3431 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3435 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3436 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3440 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3441 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3446 rte_eth_led_on(uint16_t port_id)
3448 struct rte_eth_dev *dev;
3450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3451 dev = &rte_eth_devices[port_id];
3452 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3453 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3457 rte_eth_led_off(uint16_t port_id)
3459 struct rte_eth_dev *dev;
3461 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3462 dev = &rte_eth_devices[port_id];
3463 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3464 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3468 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3472 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3474 struct rte_eth_dev_info dev_info;
3475 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3479 ret = rte_eth_dev_info_get(port_id, &dev_info);
3483 for (i = 0; i < dev_info.max_mac_addrs; i++)
3484 if (memcmp(addr, &dev->data->mac_addrs[i],
3485 RTE_ETHER_ADDR_LEN) == 0)
3491 static const struct rte_ether_addr null_mac_addr;
3494 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3497 struct rte_eth_dev *dev;
3502 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3503 dev = &rte_eth_devices[port_id];
3504 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3506 if (rte_is_zero_ether_addr(addr)) {
3507 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3511 if (pool >= ETH_64_POOLS) {
3512 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3516 index = get_mac_addr_index(port_id, addr);
3518 index = get_mac_addr_index(port_id, &null_mac_addr);
3520 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3525 pool_mask = dev->data->mac_pool_sel[index];
3527 /* Check if both MAC address and pool is already there, and do nothing */
3528 if (pool_mask & (1ULL << pool))
3533 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3536 /* Update address in NIC data structure */
3537 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3539 /* Update pool bitmap in NIC data structure */
3540 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3543 return eth_err(port_id, ret);
3547 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3549 struct rte_eth_dev *dev;
3552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3553 dev = &rte_eth_devices[port_id];
3554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3556 index = get_mac_addr_index(port_id, addr);
3559 "Port %u: Cannot remove default MAC address\n",
3562 } else if (index < 0)
3563 return 0; /* Do nothing if address wasn't found */
3566 (*dev->dev_ops->mac_addr_remove)(dev, index);
3568 /* Update address in NIC data structure */
3569 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3571 /* reset pool bitmap */
3572 dev->data->mac_pool_sel[index] = 0;
3578 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3580 struct rte_eth_dev *dev;
3583 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3585 if (!rte_is_valid_assigned_ether_addr(addr))
3588 dev = &rte_eth_devices[port_id];
3589 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3591 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3595 /* Update default address in NIC data structure */
3596 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3603 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3607 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3609 struct rte_eth_dev_info dev_info;
3610 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3614 ret = rte_eth_dev_info_get(port_id, &dev_info);
3618 if (!dev->data->hash_mac_addrs)
3621 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3622 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3623 RTE_ETHER_ADDR_LEN) == 0)
3630 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3635 struct rte_eth_dev *dev;
3637 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3639 dev = &rte_eth_devices[port_id];
3640 if (rte_is_zero_ether_addr(addr)) {
3641 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3646 index = get_hash_mac_addr_index(port_id, addr);
3647 /* Check if it's already there, and do nothing */
3648 if ((index >= 0) && on)
3654 "Port %u: the MAC address was not set in UTA\n",
3659 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3661 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3668 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3670 /* Update address in NIC data structure */
3672 rte_ether_addr_copy(addr,
3673 &dev->data->hash_mac_addrs[index]);
3675 rte_ether_addr_copy(&null_mac_addr,
3676 &dev->data->hash_mac_addrs[index]);
3679 return eth_err(port_id, ret);
3683 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3685 struct rte_eth_dev *dev;
3687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3689 dev = &rte_eth_devices[port_id];
3691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3692 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3696 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3699 struct rte_eth_dev *dev;
3700 struct rte_eth_dev_info dev_info;
3701 struct rte_eth_link link;
3704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3706 ret = rte_eth_dev_info_get(port_id, &dev_info);
3710 dev = &rte_eth_devices[port_id];
3711 link = dev->data->dev_link;
3713 if (queue_idx > dev_info.max_tx_queues) {
3715 "Set queue rate limit:port %u: invalid queue id=%u\n",
3716 port_id, queue_idx);
3720 if (tx_rate > link.link_speed) {
3722 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3723 tx_rate, link.link_speed);
3727 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3728 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3729 queue_idx, tx_rate));
3733 rte_eth_mirror_rule_set(uint16_t port_id,
3734 struct rte_eth_mirror_conf *mirror_conf,
3735 uint8_t rule_id, uint8_t on)
3737 struct rte_eth_dev *dev;
3739 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3740 if (mirror_conf->rule_type == 0) {
3741 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3745 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3746 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3751 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3752 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3753 (mirror_conf->pool_mask == 0)) {
3755 "Invalid mirror pool, pool mask can not be 0\n");
3759 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3760 mirror_conf->vlan.vlan_mask == 0) {
3762 "Invalid vlan mask, vlan mask can not be 0\n");
3766 dev = &rte_eth_devices[port_id];
3767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3769 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3770 mirror_conf, rule_id, on));
3774 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3776 struct rte_eth_dev *dev;
3778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3780 dev = &rte_eth_devices[port_id];
3781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3783 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3787 RTE_INIT(eth_dev_init_cb_lists)
3791 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3792 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3796 rte_eth_dev_callback_register(uint16_t port_id,
3797 enum rte_eth_event_type event,
3798 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3800 struct rte_eth_dev *dev;
3801 struct rte_eth_dev_callback *user_cb;
3802 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3808 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3809 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3813 if (port_id == RTE_ETH_ALL) {
3815 last_port = RTE_MAX_ETHPORTS - 1;
3817 next_port = last_port = port_id;
3820 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3823 dev = &rte_eth_devices[next_port];
3825 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3826 if (user_cb->cb_fn == cb_fn &&
3827 user_cb->cb_arg == cb_arg &&
3828 user_cb->event == event) {
3833 /* create a new callback. */
3834 if (user_cb == NULL) {
3835 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3836 sizeof(struct rte_eth_dev_callback), 0);
3837 if (user_cb != NULL) {
3838 user_cb->cb_fn = cb_fn;
3839 user_cb->cb_arg = cb_arg;
3840 user_cb->event = event;
3841 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3844 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3845 rte_eth_dev_callback_unregister(port_id, event,
3851 } while (++next_port <= last_port);
3853 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3858 rte_eth_dev_callback_unregister(uint16_t port_id,
3859 enum rte_eth_event_type event,
3860 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3863 struct rte_eth_dev *dev;
3864 struct rte_eth_dev_callback *cb, *next;
3865 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3871 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3872 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3876 if (port_id == RTE_ETH_ALL) {
3878 last_port = RTE_MAX_ETHPORTS - 1;
3880 next_port = last_port = port_id;
3883 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3886 dev = &rte_eth_devices[next_port];
3888 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3891 next = TAILQ_NEXT(cb, next);
3893 if (cb->cb_fn != cb_fn || cb->event != event ||
3894 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3898 * if this callback is not executing right now,
3901 if (cb->active == 0) {
3902 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3908 } while (++next_port <= last_port);
3910 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3915 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3916 enum rte_eth_event_type event, void *ret_param)
3918 struct rte_eth_dev_callback *cb_lst;
3919 struct rte_eth_dev_callback dev_cb;
3922 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3923 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3924 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3928 if (ret_param != NULL)
3929 dev_cb.ret_param = ret_param;
3931 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3932 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3933 dev_cb.cb_arg, dev_cb.ret_param);
3934 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3937 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3942 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3947 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3949 dev->state = RTE_ETH_DEV_ATTACHED;
3953 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3956 struct rte_eth_dev *dev;
3957 struct rte_intr_handle *intr_handle;
3961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3963 dev = &rte_eth_devices[port_id];
3965 if (!dev->intr_handle) {
3966 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3970 intr_handle = dev->intr_handle;
3971 if (!intr_handle->intr_vec) {
3972 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3976 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3977 vec = intr_handle->intr_vec[qid];
3978 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3979 if (rc && rc != -EEXIST) {
3981 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3982 port_id, qid, op, epfd, vec);
3990 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3992 struct rte_intr_handle *intr_handle;
3993 struct rte_eth_dev *dev;
3994 unsigned int efd_idx;
3998 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4000 dev = &rte_eth_devices[port_id];
4002 if (queue_id >= dev->data->nb_rx_queues) {
4003 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4007 if (!dev->intr_handle) {
4008 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4012 intr_handle = dev->intr_handle;
4013 if (!intr_handle->intr_vec) {
4014 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4018 vec = intr_handle->intr_vec[queue_id];
4019 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4020 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4021 fd = intr_handle->efds[efd_idx];
4026 const struct rte_memzone *
4027 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4028 uint16_t queue_id, size_t size, unsigned align,
4031 char z_name[RTE_MEMZONE_NAMESIZE];
4032 const struct rte_memzone *mz;
4035 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4036 dev->data->port_id, queue_id, ring_name);
4037 if (rc >= RTE_MEMZONE_NAMESIZE) {
4038 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4039 rte_errno = ENAMETOOLONG;
4043 mz = rte_memzone_lookup(z_name);
4047 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4048 RTE_MEMZONE_IOVA_CONTIG, align);
4052 rte_eth_dev_create(struct rte_device *device, const char *name,
4053 size_t priv_data_size,
4054 ethdev_bus_specific_init ethdev_bus_specific_init,
4055 void *bus_init_params,
4056 ethdev_init_t ethdev_init, void *init_params)
4058 struct rte_eth_dev *ethdev;
4061 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4063 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4064 ethdev = rte_eth_dev_allocate(name);
4068 if (priv_data_size) {
4069 ethdev->data->dev_private = rte_zmalloc_socket(
4070 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4073 if (!ethdev->data->dev_private) {
4074 RTE_LOG(ERR, EAL, "failed to allocate private data");
4080 ethdev = rte_eth_dev_attach_secondary(name);
4082 RTE_LOG(ERR, EAL, "secondary process attach failed, "
4083 "ethdev doesn't exist");
4088 ethdev->device = device;
4090 if (ethdev_bus_specific_init) {
4091 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4094 "ethdev bus specific initialisation failed");
4099 retval = ethdev_init(ethdev, init_params);
4101 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
4105 rte_eth_dev_probing_finish(ethdev);
4110 rte_eth_dev_release_port(ethdev);
4115 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4116 ethdev_uninit_t ethdev_uninit)
4120 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4124 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4126 ret = ethdev_uninit(ethdev);
4130 return rte_eth_dev_release_port(ethdev);
4134 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4135 int epfd, int op, void *data)
4138 struct rte_eth_dev *dev;
4139 struct rte_intr_handle *intr_handle;
4142 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4144 dev = &rte_eth_devices[port_id];
4145 if (queue_id >= dev->data->nb_rx_queues) {
4146 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4150 if (!dev->intr_handle) {
4151 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4155 intr_handle = dev->intr_handle;
4156 if (!intr_handle->intr_vec) {
4157 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4161 vec = intr_handle->intr_vec[queue_id];
4162 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4163 if (rc && rc != -EEXIST) {
4165 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4166 port_id, queue_id, op, epfd, vec);
4174 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4177 struct rte_eth_dev *dev;
4179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4181 dev = &rte_eth_devices[port_id];
4183 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4184 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4189 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4192 struct rte_eth_dev *dev;
4194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4196 dev = &rte_eth_devices[port_id];
4198 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4199 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4205 rte_eth_dev_filter_supported(uint16_t port_id,
4206 enum rte_filter_type filter_type)
4208 struct rte_eth_dev *dev;
4210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4212 dev = &rte_eth_devices[port_id];
4213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4214 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4215 RTE_ETH_FILTER_NOP, NULL);
4219 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4220 enum rte_filter_op filter_op, void *arg)
4222 struct rte_eth_dev *dev;
4224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4226 dev = &rte_eth_devices[port_id];
4227 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4228 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4232 const struct rte_eth_rxtx_callback *
4233 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4234 rte_rx_callback_fn fn, void *user_param)
4236 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4237 rte_errno = ENOTSUP;
4240 struct rte_eth_dev *dev;
4242 /* check input parameters */
4243 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4244 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4248 dev = &rte_eth_devices[port_id];
4249 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4253 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4261 cb->param = user_param;
4263 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4264 /* Add the callbacks in fifo order. */
4265 struct rte_eth_rxtx_callback *tail =
4266 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4269 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4276 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4281 const struct rte_eth_rxtx_callback *
4282 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4283 rte_rx_callback_fn fn, void *user_param)
4285 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4286 rte_errno = ENOTSUP;
4289 /* check input parameters */
4290 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4291 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4296 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4304 cb->param = user_param;
4306 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4307 /* Add the callbacks at fisrt position*/
4308 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4310 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4311 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4316 const struct rte_eth_rxtx_callback *
4317 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4318 rte_tx_callback_fn fn, void *user_param)
4320 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4321 rte_errno = ENOTSUP;
4324 struct rte_eth_dev *dev;
4326 /* check input parameters */
4327 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4328 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4333 dev = &rte_eth_devices[port_id];
4334 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4339 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4347 cb->param = user_param;
4349 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4350 /* Add the callbacks in fifo order. */
4351 struct rte_eth_rxtx_callback *tail =
4352 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4355 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4362 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4368 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4369 const struct rte_eth_rxtx_callback *user_cb)
4371 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4374 /* Check input parameters. */
4375 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4376 if (user_cb == NULL ||
4377 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4380 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4381 struct rte_eth_rxtx_callback *cb;
4382 struct rte_eth_rxtx_callback **prev_cb;
4385 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4386 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4387 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4389 if (cb == user_cb) {
4390 /* Remove the user cb from the callback list. */
4391 *prev_cb = cb->next;
4396 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4402 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4403 const struct rte_eth_rxtx_callback *user_cb)
4405 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4408 /* Check input parameters. */
4409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4410 if (user_cb == NULL ||
4411 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4414 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4416 struct rte_eth_rxtx_callback *cb;
4417 struct rte_eth_rxtx_callback **prev_cb;
4419 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4420 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4421 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4423 if (cb == user_cb) {
4424 /* Remove the user cb from the callback list. */
4425 *prev_cb = cb->next;
4430 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4436 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4437 struct rte_eth_rxq_info *qinfo)
4439 struct rte_eth_dev *dev;
4441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4446 dev = &rte_eth_devices[port_id];
4447 if (queue_id >= dev->data->nb_rx_queues) {
4448 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4452 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4453 RTE_ETHDEV_LOG(INFO,
4454 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4461 memset(qinfo, 0, sizeof(*qinfo));
4462 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4467 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4468 struct rte_eth_txq_info *qinfo)
4470 struct rte_eth_dev *dev;
4472 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4477 dev = &rte_eth_devices[port_id];
4478 if (queue_id >= dev->data->nb_tx_queues) {
4479 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4483 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4484 RTE_ETHDEV_LOG(INFO,
4485 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4492 memset(qinfo, 0, sizeof(*qinfo));
4493 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4499 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4500 struct rte_eth_burst_mode *mode)
4502 struct rte_eth_dev *dev;
4504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4509 dev = &rte_eth_devices[port_id];
4511 if (queue_id >= dev->data->nb_rx_queues) {
4512 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4517 memset(mode, 0, sizeof(*mode));
4518 return eth_err(port_id,
4519 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4523 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4524 struct rte_eth_burst_mode *mode)
4526 struct rte_eth_dev *dev;
4528 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4533 dev = &rte_eth_devices[port_id];
4535 if (queue_id >= dev->data->nb_tx_queues) {
4536 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4540 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4541 memset(mode, 0, sizeof(*mode));
4542 return eth_err(port_id,
4543 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4547 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4548 struct rte_ether_addr *mc_addr_set,
4549 uint32_t nb_mc_addr)
4551 struct rte_eth_dev *dev;
4553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4555 dev = &rte_eth_devices[port_id];
4556 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4557 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4558 mc_addr_set, nb_mc_addr));
4562 rte_eth_timesync_enable(uint16_t port_id)
4564 struct rte_eth_dev *dev;
4566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4567 dev = &rte_eth_devices[port_id];
4569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4570 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4574 rte_eth_timesync_disable(uint16_t port_id)
4576 struct rte_eth_dev *dev;
4578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4579 dev = &rte_eth_devices[port_id];
4581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4582 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4586 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4589 struct rte_eth_dev *dev;
4591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4592 dev = &rte_eth_devices[port_id];
4594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4595 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4596 (dev, timestamp, flags));
4600 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4601 struct timespec *timestamp)
4603 struct rte_eth_dev *dev;
4605 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4606 dev = &rte_eth_devices[port_id];
4608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4609 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4614 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4616 struct rte_eth_dev *dev;
4618 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4619 dev = &rte_eth_devices[port_id];
4621 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4622 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4627 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4629 struct rte_eth_dev *dev;
4631 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4632 dev = &rte_eth_devices[port_id];
4634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4635 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4640 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4642 struct rte_eth_dev *dev;
4644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4645 dev = &rte_eth_devices[port_id];
4647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4648 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4653 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4655 struct rte_eth_dev *dev;
4657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4658 dev = &rte_eth_devices[port_id];
4660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4661 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4665 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4667 struct rte_eth_dev *dev;
4669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4671 dev = &rte_eth_devices[port_id];
4672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4673 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4677 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4679 struct rte_eth_dev *dev;
4681 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4683 dev = &rte_eth_devices[port_id];
4684 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4685 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4689 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4691 struct rte_eth_dev *dev;
4693 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4695 dev = &rte_eth_devices[port_id];
4696 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4697 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4701 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4703 struct rte_eth_dev *dev;
4705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4707 dev = &rte_eth_devices[port_id];
4708 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4709 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4713 rte_eth_dev_get_module_info(uint16_t port_id,
4714 struct rte_eth_dev_module_info *modinfo)
4716 struct rte_eth_dev *dev;
4718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4720 dev = &rte_eth_devices[port_id];
4721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4722 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4726 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4727 struct rte_dev_eeprom_info *info)
4729 struct rte_eth_dev *dev;
4731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4733 dev = &rte_eth_devices[port_id];
4734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4735 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4739 rte_eth_dev_get_dcb_info(uint16_t port_id,
4740 struct rte_eth_dcb_info *dcb_info)
4742 struct rte_eth_dev *dev;
4744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4746 dev = &rte_eth_devices[port_id];
4747 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4750 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4754 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4755 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4757 struct rte_eth_dev *dev;
4759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4760 if (l2_tunnel == NULL) {
4761 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4765 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4766 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4770 dev = &rte_eth_devices[port_id];
4771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4773 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4778 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4779 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4783 struct rte_eth_dev *dev;
4785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4787 if (l2_tunnel == NULL) {
4788 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4792 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4793 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4798 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4802 dev = &rte_eth_devices[port_id];
4803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4805 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4806 l2_tunnel, mask, en));
4810 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4811 const struct rte_eth_desc_lim *desc_lim)
4813 if (desc_lim->nb_align != 0)
4814 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4816 if (desc_lim->nb_max != 0)
4817 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4819 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4823 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4824 uint16_t *nb_rx_desc,
4825 uint16_t *nb_tx_desc)
4827 struct rte_eth_dev_info dev_info;
4830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4832 ret = rte_eth_dev_info_get(port_id, &dev_info);
4836 if (nb_rx_desc != NULL)
4837 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4839 if (nb_tx_desc != NULL)
4840 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4846 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
4847 struct rte_eth_hairpin_cap *cap)
4849 struct rte_eth_dev *dev;
4851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4853 dev = &rte_eth_devices[port_id];
4854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
4855 memset(cap, 0, sizeof(*cap));
4856 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
4860 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
4862 if (dev->data->rx_queue_state[queue_id] ==
4863 RTE_ETH_QUEUE_STATE_HAIRPIN)
4869 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
4871 if (dev->data->tx_queue_state[queue_id] ==
4872 RTE_ETH_QUEUE_STATE_HAIRPIN)
4878 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4880 struct rte_eth_dev *dev;
4882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4887 dev = &rte_eth_devices[port_id];
4889 if (*dev->dev_ops->pool_ops_supported == NULL)
4890 return 1; /* all pools are supported */
4892 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4896 * A set of values to describe the possible states of a switch domain.
4898 enum rte_eth_switch_domain_state {
4899 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4900 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4904 * Array of switch domains available for allocation. Array is sized to
4905 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4906 * ethdev ports in a single process.
4908 static struct rte_eth_dev_switch {
4909 enum rte_eth_switch_domain_state state;
4910 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4913 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4917 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4919 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4920 i < RTE_MAX_ETHPORTS; i++) {
4921 if (rte_eth_switch_domains[i].state ==
4922 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4923 rte_eth_switch_domains[i].state =
4924 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4934 rte_eth_switch_domain_free(uint16_t domain_id)
4936 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4937 domain_id >= RTE_MAX_ETHPORTS)
4940 if (rte_eth_switch_domains[domain_id].state !=
4941 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4944 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4950 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4953 struct rte_kvargs_pair *pair;
4956 arglist->str = strdup(str_in);
4957 if (arglist->str == NULL)
4960 letter = arglist->str;
4963 pair = &arglist->pairs[0];
4966 case 0: /* Initial */
4969 else if (*letter == '\0')
4976 case 1: /* Parsing key */
4977 if (*letter == '=') {
4979 pair->value = letter + 1;
4981 } else if (*letter == ',' || *letter == '\0')
4986 case 2: /* Parsing value */
4989 else if (*letter == ',') {
4992 pair = &arglist->pairs[arglist->count];
4994 } else if (*letter == '\0') {
4997 pair = &arglist->pairs[arglist->count];
5002 case 3: /* Parsing list */
5005 else if (*letter == '\0')
5014 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5016 struct rte_kvargs args;
5017 struct rte_kvargs_pair *pair;
5021 memset(eth_da, 0, sizeof(*eth_da));
5023 result = rte_eth_devargs_tokenise(&args, dargs);
5027 for (i = 0; i < args.count; i++) {
5028 pair = &args.pairs[i];
5029 if (strcmp("representor", pair->key) == 0) {
5030 result = rte_eth_devargs_parse_list(pair->value,
5031 rte_eth_devargs_parse_representor_ports,
5045 RTE_INIT(ethdev_init_log)
5047 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
5048 if (rte_eth_dev_logtype >= 0)
5049 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);