1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "rte_ethdev_driver.h"
41 #include "ethdev_profile.h"
43 static int ethdev_logtype;
45 #define ethdev_log(level, fmt, ...) \
46 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
48 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
49 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
50 static uint8_t eth_dev_last_created_port;
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 rte_eth_dev_allocated(const char *name)
234 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
235 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
236 strcmp(rte_eth_devices[i].data->name, name) == 0)
237 return &rte_eth_devices[i];
243 rte_eth_dev_find_free_port(void)
247 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
248 /* Using shared name field to find a free port. */
249 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
250 RTE_ASSERT(rte_eth_devices[i].state ==
255 return RTE_MAX_ETHPORTS;
258 static struct rte_eth_dev *
259 eth_dev_get(uint16_t port_id)
261 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
263 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
264 eth_dev->state = RTE_ETH_DEV_ATTACHED;
266 eth_dev_last_created_port = port_id;
272 rte_eth_dev_allocate(const char *name)
275 struct rte_eth_dev *eth_dev = NULL;
277 rte_eth_dev_shared_data_prepare();
279 /* Synchronize port creation between primary and secondary threads. */
280 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
282 port_id = rte_eth_dev_find_free_port();
283 if (port_id == RTE_MAX_ETHPORTS) {
284 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
288 if (rte_eth_dev_allocated(name) != NULL) {
290 "Ethernet Device with name %s already allocated!",
295 eth_dev = eth_dev_get(port_id);
296 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
297 eth_dev->data->port_id = port_id;
298 eth_dev->data->mtu = ETHER_MTU;
301 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
304 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
310 * Attach to a port already registered by the primary process, which
311 * makes sure that the same device would have the same port id both
312 * in the primary and secondary process.
315 rte_eth_dev_attach_secondary(const char *name)
318 struct rte_eth_dev *eth_dev = NULL;
320 rte_eth_dev_shared_data_prepare();
322 /* Synchronize port attachment to primary port creation and release. */
323 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
325 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
326 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
329 if (i == RTE_MAX_ETHPORTS) {
331 "device %s is not driven by the primary process\n",
334 eth_dev = eth_dev_get(i);
335 RTE_ASSERT(eth_dev->data->port_id == i);
338 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
343 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
348 rte_eth_dev_shared_data_prepare();
350 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
352 eth_dev->state = RTE_ETH_DEV_UNUSED;
354 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
356 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
358 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
364 rte_eth_dev_is_valid_port(uint16_t port_id)
366 if (port_id >= RTE_MAX_ETHPORTS ||
367 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
374 rte_eth_is_valid_owner_id(uint64_t owner_id)
376 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
377 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
378 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
384 uint64_t __rte_experimental
385 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
387 while (port_id < RTE_MAX_ETHPORTS &&
388 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
389 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
390 rte_eth_devices[port_id].data->owner.id != owner_id))
393 if (port_id >= RTE_MAX_ETHPORTS)
394 return RTE_MAX_ETHPORTS;
399 int __rte_experimental
400 rte_eth_dev_owner_new(uint64_t *owner_id)
402 rte_eth_dev_shared_data_prepare();
404 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
406 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
408 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
413 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
414 const struct rte_eth_dev_owner *new_owner)
416 struct rte_eth_dev_owner *port_owner;
419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
421 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
422 !rte_eth_is_valid_owner_id(old_owner_id))
425 port_owner = &rte_eth_devices[port_id].data->owner;
426 if (port_owner->id != old_owner_id) {
427 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
428 " by %s_%016lX.\n", port_id,
429 port_owner->name, port_owner->id);
433 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
435 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
436 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
439 port_owner->id = new_owner->id;
441 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
442 new_owner->name, new_owner->id);
447 int __rte_experimental
448 rte_eth_dev_owner_set(const uint16_t port_id,
449 const struct rte_eth_dev_owner *owner)
453 rte_eth_dev_shared_data_prepare();
455 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
457 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
459 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
463 int __rte_experimental
464 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
466 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
467 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
470 rte_eth_dev_shared_data_prepare();
472 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
474 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
476 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
480 void __rte_experimental
481 rte_eth_dev_owner_delete(const uint64_t owner_id)
485 rte_eth_dev_shared_data_prepare();
487 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
489 if (rte_eth_is_valid_owner_id(owner_id)) {
490 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
491 memset(&rte_eth_devices[port_id].data->owner, 0,
492 sizeof(struct rte_eth_dev_owner));
493 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
494 " have removed.\n", owner_id);
497 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
500 int __rte_experimental
501 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
505 rte_eth_dev_shared_data_prepare();
507 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
509 if (!rte_eth_dev_is_valid_port(port_id)) {
510 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
513 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
517 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
522 rte_eth_dev_socket_id(uint16_t port_id)
524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
525 return rte_eth_devices[port_id].data->numa_node;
529 rte_eth_dev_get_sec_ctx(uint16_t port_id)
531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
532 return rte_eth_devices[port_id].security_ctx;
536 rte_eth_dev_count(void)
543 RTE_ETH_FOREACH_DEV(p)
550 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
557 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
561 /* shouldn't check 'rte_eth_devices[i].data',
562 * because it might be overwritten by VDEV PMD */
563 tmp = rte_eth_dev_shared_data->data[port_id].name;
569 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
574 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
578 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
579 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
580 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
590 eth_err(uint16_t port_id, int ret)
594 if (rte_eth_dev_is_removed(port_id))
599 /* attach the new device, then store port_id of the device */
601 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
604 int current = rte_eth_dev_count();
608 if ((devargs == NULL) || (port_id == NULL)) {
613 /* parse devargs, then retrieve device name and args */
614 if (rte_eal_parse_devargs_str(devargs, &name, &args))
617 ret = rte_eal_dev_attach(name, args);
621 /* no point looking at the port count if no port exists */
622 if (!rte_eth_dev_count()) {
623 ethdev_log(ERR, "No port found for device (%s)", name);
628 /* if nothing happened, there is a bug here, since some driver told us
629 * it did attach a device, but did not create a port.
631 if (current == rte_eth_dev_count()) {
636 *port_id = eth_dev_last_created_port;
645 /* detach the device, then store the name of the device */
647 rte_eth_dev_detach(uint16_t port_id, char *name)
652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
659 dev_flags = rte_eth_devices[port_id].data->dev_flags;
660 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
662 "Port %" PRIu16 " is bonded, cannot detach", port_id);
667 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
668 "%s", rte_eth_devices[port_id].data->name);
670 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
674 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
682 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
684 uint16_t old_nb_queues = dev->data->nb_rx_queues;
688 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
689 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
690 sizeof(dev->data->rx_queues[0]) * nb_queues,
691 RTE_CACHE_LINE_SIZE);
692 if (dev->data->rx_queues == NULL) {
693 dev->data->nb_rx_queues = 0;
696 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
699 rxq = dev->data->rx_queues;
701 for (i = nb_queues; i < old_nb_queues; i++)
702 (*dev->dev_ops->rx_queue_release)(rxq[i]);
703 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
704 RTE_CACHE_LINE_SIZE);
707 if (nb_queues > old_nb_queues) {
708 uint16_t new_qs = nb_queues - old_nb_queues;
710 memset(rxq + old_nb_queues, 0,
711 sizeof(rxq[0]) * new_qs);
714 dev->data->rx_queues = rxq;
716 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
719 rxq = dev->data->rx_queues;
721 for (i = nb_queues; i < old_nb_queues; i++)
722 (*dev->dev_ops->rx_queue_release)(rxq[i]);
724 rte_free(dev->data->rx_queues);
725 dev->data->rx_queues = NULL;
727 dev->data->nb_rx_queues = nb_queues;
732 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
734 struct rte_eth_dev *dev;
736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
738 dev = &rte_eth_devices[port_id];
739 if (!dev->data->dev_started) {
741 "port %d must be started before start any queue\n", port_id);
745 if (rx_queue_id >= dev->data->nb_rx_queues) {
746 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
752 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
753 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
754 " already started\n",
755 rx_queue_id, port_id);
759 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
765 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
767 struct rte_eth_dev *dev;
769 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
771 dev = &rte_eth_devices[port_id];
772 if (rx_queue_id >= dev->data->nb_rx_queues) {
773 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
779 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
780 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
781 " already stopped\n",
782 rx_queue_id, port_id);
786 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
791 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
793 struct rte_eth_dev *dev;
795 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
797 dev = &rte_eth_devices[port_id];
798 if (!dev->data->dev_started) {
800 "port %d must be started before start any queue\n", port_id);
804 if (tx_queue_id >= dev->data->nb_tx_queues) {
805 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
811 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
812 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
813 " already started\n",
814 tx_queue_id, port_id);
818 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
824 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
826 struct rte_eth_dev *dev;
828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
830 dev = &rte_eth_devices[port_id];
831 if (tx_queue_id >= dev->data->nb_tx_queues) {
832 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
836 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
838 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
839 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
840 " already stopped\n",
841 tx_queue_id, port_id);
845 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
850 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
852 uint16_t old_nb_queues = dev->data->nb_tx_queues;
856 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
857 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
858 sizeof(dev->data->tx_queues[0]) * nb_queues,
859 RTE_CACHE_LINE_SIZE);
860 if (dev->data->tx_queues == NULL) {
861 dev->data->nb_tx_queues = 0;
864 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
867 txq = dev->data->tx_queues;
869 for (i = nb_queues; i < old_nb_queues; i++)
870 (*dev->dev_ops->tx_queue_release)(txq[i]);
871 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
872 RTE_CACHE_LINE_SIZE);
875 if (nb_queues > old_nb_queues) {
876 uint16_t new_qs = nb_queues - old_nb_queues;
878 memset(txq + old_nb_queues, 0,
879 sizeof(txq[0]) * new_qs);
882 dev->data->tx_queues = txq;
884 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
885 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
887 txq = dev->data->tx_queues;
889 for (i = nb_queues; i < old_nb_queues; i++)
890 (*dev->dev_ops->tx_queue_release)(txq[i]);
892 rte_free(dev->data->tx_queues);
893 dev->data->tx_queues = NULL;
895 dev->data->nb_tx_queues = nb_queues;
900 rte_eth_speed_bitflag(uint32_t speed, int duplex)
903 case ETH_SPEED_NUM_10M:
904 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
905 case ETH_SPEED_NUM_100M:
906 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
907 case ETH_SPEED_NUM_1G:
908 return ETH_LINK_SPEED_1G;
909 case ETH_SPEED_NUM_2_5G:
910 return ETH_LINK_SPEED_2_5G;
911 case ETH_SPEED_NUM_5G:
912 return ETH_LINK_SPEED_5G;
913 case ETH_SPEED_NUM_10G:
914 return ETH_LINK_SPEED_10G;
915 case ETH_SPEED_NUM_20G:
916 return ETH_LINK_SPEED_20G;
917 case ETH_SPEED_NUM_25G:
918 return ETH_LINK_SPEED_25G;
919 case ETH_SPEED_NUM_40G:
920 return ETH_LINK_SPEED_40G;
921 case ETH_SPEED_NUM_50G:
922 return ETH_LINK_SPEED_50G;
923 case ETH_SPEED_NUM_56G:
924 return ETH_LINK_SPEED_56G;
925 case ETH_SPEED_NUM_100G:
926 return ETH_LINK_SPEED_100G;
933 * A conversion function from rxmode bitfield API.
936 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
937 uint64_t *rx_offloads)
939 uint64_t offloads = 0;
941 if (rxmode->header_split == 1)
942 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
943 if (rxmode->hw_ip_checksum == 1)
944 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
945 if (rxmode->hw_vlan_filter == 1)
946 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
947 if (rxmode->hw_vlan_strip == 1)
948 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
949 if (rxmode->hw_vlan_extend == 1)
950 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
951 if (rxmode->jumbo_frame == 1)
952 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
953 if (rxmode->hw_strip_crc == 1)
954 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
955 if (rxmode->enable_scatter == 1)
956 offloads |= DEV_RX_OFFLOAD_SCATTER;
957 if (rxmode->enable_lro == 1)
958 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
959 if (rxmode->hw_timestamp == 1)
960 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
961 if (rxmode->security == 1)
962 offloads |= DEV_RX_OFFLOAD_SECURITY;
964 *rx_offloads = offloads;
968 * A conversion function from rxmode offloads API.
971 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
972 struct rte_eth_rxmode *rxmode)
975 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
976 rxmode->header_split = 1;
978 rxmode->header_split = 0;
979 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
980 rxmode->hw_ip_checksum = 1;
982 rxmode->hw_ip_checksum = 0;
983 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
984 rxmode->hw_vlan_filter = 1;
986 rxmode->hw_vlan_filter = 0;
987 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
988 rxmode->hw_vlan_strip = 1;
990 rxmode->hw_vlan_strip = 0;
991 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
992 rxmode->hw_vlan_extend = 1;
994 rxmode->hw_vlan_extend = 0;
995 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
996 rxmode->jumbo_frame = 1;
998 rxmode->jumbo_frame = 0;
999 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
1000 rxmode->hw_strip_crc = 1;
1002 rxmode->hw_strip_crc = 0;
1003 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
1004 rxmode->enable_scatter = 1;
1006 rxmode->enable_scatter = 0;
1007 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
1008 rxmode->enable_lro = 1;
1010 rxmode->enable_lro = 0;
1011 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
1012 rxmode->hw_timestamp = 1;
1014 rxmode->hw_timestamp = 0;
1015 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
1016 rxmode->security = 1;
1018 rxmode->security = 0;
1021 const char * __rte_experimental
1022 rte_eth_dev_rx_offload_name(uint64_t offload)
1024 const char *name = "UNKNOWN";
1027 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1028 if (offload == rte_rx_offload_names[i].offload) {
1029 name = rte_rx_offload_names[i].name;
1037 const char * __rte_experimental
1038 rte_eth_dev_tx_offload_name(uint64_t offload)
1040 const char *name = "UNKNOWN";
1043 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1044 if (offload == rte_tx_offload_names[i].offload) {
1045 name = rte_tx_offload_names[i].name;
1054 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1055 const struct rte_eth_conf *dev_conf)
1057 struct rte_eth_dev *dev;
1058 struct rte_eth_dev_info dev_info;
1059 struct rte_eth_conf local_conf = *dev_conf;
1062 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1064 dev = &rte_eth_devices[port_id];
1066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1067 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1069 /* If number of queues specified by application for both Rx and Tx is
1070 * zero, use driver preferred values. This cannot be done individually
1071 * as it is valid for either Tx or Rx (but not both) to be zero.
1072 * If driver does not provide any preferred valued, fall back on
1075 if (nb_rx_q == 0 && nb_tx_q == 0) {
1076 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1078 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1079 nb_tx_q = dev_info.default_txportconf.nb_queues;
1081 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1084 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1085 RTE_PMD_DEBUG_TRACE(
1086 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1087 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1091 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1092 RTE_PMD_DEBUG_TRACE(
1093 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1094 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1101 if (dev->data->dev_started) {
1102 RTE_PMD_DEBUG_TRACE(
1103 "port %d must be stopped to allow configuration\n", port_id);
1108 * Convert between the offloads API to enable PMDs to support
1111 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
1112 rte_eth_convert_rx_offload_bitfield(
1113 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1115 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
1116 &local_conf.rxmode);
1119 /* Copy the dev_conf parameter into the dev structure */
1120 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1123 * Check that the numbers of RX and TX queues are not greater
1124 * than the maximum number of RX and TX queues supported by the
1125 * configured device.
1127 if (nb_rx_q > dev_info.max_rx_queues) {
1128 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1129 port_id, nb_rx_q, dev_info.max_rx_queues);
1133 if (nb_tx_q > dev_info.max_tx_queues) {
1134 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1135 port_id, nb_tx_q, dev_info.max_tx_queues);
1139 /* Check that the device supports requested interrupts */
1140 if ((dev_conf->intr_conf.lsc == 1) &&
1141 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1142 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1143 dev->device->driver->name);
1146 if ((dev_conf->intr_conf.rmv == 1) &&
1147 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1148 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1149 dev->device->driver->name);
1154 * If jumbo frames are enabled, check that the maximum RX packet
1155 * length is supported by the configured device.
1157 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1158 if (dev_conf->rxmode.max_rx_pkt_len >
1159 dev_info.max_rx_pktlen) {
1160 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1161 " > max valid value %u\n",
1163 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1164 (unsigned)dev_info.max_rx_pktlen);
1166 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1167 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1168 " < min valid value %u\n",
1170 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1171 (unsigned)ETHER_MIN_LEN);
1175 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1176 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1177 /* Use default value */
1178 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1183 * Setup new number of RX/TX queues and reconfigure device.
1185 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1187 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1192 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1194 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1196 rte_eth_dev_rx_queue_config(dev, 0);
1200 diag = (*dev->dev_ops->dev_configure)(dev);
1202 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1204 rte_eth_dev_rx_queue_config(dev, 0);
1205 rte_eth_dev_tx_queue_config(dev, 0);
1206 return eth_err(port_id, diag);
1209 /* Initialize Rx profiling if enabled at compilation time. */
1210 diag = __rte_eth_profile_rx_init(port_id, dev);
1212 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1214 rte_eth_dev_rx_queue_config(dev, 0);
1215 rte_eth_dev_tx_queue_config(dev, 0);
1216 return eth_err(port_id, diag);
1223 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1225 if (dev->data->dev_started) {
1226 RTE_PMD_DEBUG_TRACE(
1227 "port %d must be stopped to allow reset\n",
1228 dev->data->port_id);
1232 rte_eth_dev_rx_queue_config(dev, 0);
1233 rte_eth_dev_tx_queue_config(dev, 0);
1235 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1239 rte_eth_dev_config_restore(uint16_t port_id)
1241 struct rte_eth_dev *dev;
1242 struct rte_eth_dev_info dev_info;
1243 struct ether_addr *addr;
1248 dev = &rte_eth_devices[port_id];
1250 rte_eth_dev_info_get(port_id, &dev_info);
1252 /* replay MAC address configuration including default MAC */
1253 addr = &dev->data->mac_addrs[0];
1254 if (*dev->dev_ops->mac_addr_set != NULL)
1255 (*dev->dev_ops->mac_addr_set)(dev, addr);
1256 else if (*dev->dev_ops->mac_addr_add != NULL)
1257 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1259 if (*dev->dev_ops->mac_addr_add != NULL) {
1260 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1261 addr = &dev->data->mac_addrs[i];
1263 /* skip zero address */
1264 if (is_zero_ether_addr(addr))
1268 pool_mask = dev->data->mac_pool_sel[i];
1271 if (pool_mask & 1ULL)
1272 (*dev->dev_ops->mac_addr_add)(dev,
1276 } while (pool_mask);
1280 /* replay promiscuous configuration */
1281 if (rte_eth_promiscuous_get(port_id) == 1)
1282 rte_eth_promiscuous_enable(port_id);
1283 else if (rte_eth_promiscuous_get(port_id) == 0)
1284 rte_eth_promiscuous_disable(port_id);
1286 /* replay all multicast configuration */
1287 if (rte_eth_allmulticast_get(port_id) == 1)
1288 rte_eth_allmulticast_enable(port_id);
1289 else if (rte_eth_allmulticast_get(port_id) == 0)
1290 rte_eth_allmulticast_disable(port_id);
1294 rte_eth_dev_start(uint16_t port_id)
1296 struct rte_eth_dev *dev;
1299 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1301 dev = &rte_eth_devices[port_id];
1303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1305 if (dev->data->dev_started != 0) {
1306 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1307 " already started\n",
1312 diag = (*dev->dev_ops->dev_start)(dev);
1314 dev->data->dev_started = 1;
1316 return eth_err(port_id, diag);
1318 rte_eth_dev_config_restore(port_id);
1320 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1321 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1322 (*dev->dev_ops->link_update)(dev, 0);
1328 rte_eth_dev_stop(uint16_t port_id)
1330 struct rte_eth_dev *dev;
1332 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1333 dev = &rte_eth_devices[port_id];
1335 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1337 if (dev->data->dev_started == 0) {
1338 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1339 " already stopped\n",
1344 dev->data->dev_started = 0;
1345 (*dev->dev_ops->dev_stop)(dev);
1349 rte_eth_dev_set_link_up(uint16_t port_id)
1351 struct rte_eth_dev *dev;
1353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1355 dev = &rte_eth_devices[port_id];
1357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1358 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1362 rte_eth_dev_set_link_down(uint16_t port_id)
1364 struct rte_eth_dev *dev;
1366 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1368 dev = &rte_eth_devices[port_id];
1370 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1371 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1375 rte_eth_dev_close(uint16_t port_id)
1377 struct rte_eth_dev *dev;
1379 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1380 dev = &rte_eth_devices[port_id];
1382 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1383 dev->data->dev_started = 0;
1384 (*dev->dev_ops->dev_close)(dev);
1386 dev->data->nb_rx_queues = 0;
1387 rte_free(dev->data->rx_queues);
1388 dev->data->rx_queues = NULL;
1389 dev->data->nb_tx_queues = 0;
1390 rte_free(dev->data->tx_queues);
1391 dev->data->tx_queues = NULL;
1395 rte_eth_dev_reset(uint16_t port_id)
1397 struct rte_eth_dev *dev;
1400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1401 dev = &rte_eth_devices[port_id];
1403 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1405 rte_eth_dev_stop(port_id);
1406 ret = dev->dev_ops->dev_reset(dev);
1408 return eth_err(port_id, ret);
1411 int __rte_experimental
1412 rte_eth_dev_is_removed(uint16_t port_id)
1414 struct rte_eth_dev *dev;
1417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1419 dev = &rte_eth_devices[port_id];
1421 if (dev->state == RTE_ETH_DEV_REMOVED)
1424 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1426 ret = dev->dev_ops->is_removed(dev);
1428 /* Device is physically removed. */
1429 dev->state = RTE_ETH_DEV_REMOVED;
1435 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1436 uint16_t nb_rx_desc, unsigned int socket_id,
1437 const struct rte_eth_rxconf *rx_conf,
1438 struct rte_mempool *mp)
1441 uint32_t mbp_buf_size;
1442 struct rte_eth_dev *dev;
1443 struct rte_eth_dev_info dev_info;
1444 struct rte_eth_rxconf local_conf;
1447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1449 dev = &rte_eth_devices[port_id];
1450 if (rx_queue_id >= dev->data->nb_rx_queues) {
1451 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1455 if (dev->data->dev_started) {
1456 RTE_PMD_DEBUG_TRACE(
1457 "port %d must be stopped to allow configuration\n", port_id);
1461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1465 * Check the size of the mbuf data buffer.
1466 * This value must be provided in the private data of the memory pool.
1467 * First check that the memory pool has a valid private data.
1469 rte_eth_dev_info_get(port_id, &dev_info);
1470 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1471 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1472 mp->name, (int) mp->private_data_size,
1473 (int) sizeof(struct rte_pktmbuf_pool_private));
1476 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1478 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1479 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1480 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1484 (int)(RTE_PKTMBUF_HEADROOM +
1485 dev_info.min_rx_bufsize),
1486 (int)RTE_PKTMBUF_HEADROOM,
1487 (int)dev_info.min_rx_bufsize);
1491 /* Use default specified by driver, if nb_rx_desc is zero */
1492 if (nb_rx_desc == 0) {
1493 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1494 /* If driver default is also zero, fall back on EAL default */
1495 if (nb_rx_desc == 0)
1496 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1499 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1500 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1501 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1503 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1504 "should be: <= %hu, = %hu, and a product of %hu\n",
1506 dev_info.rx_desc_lim.nb_max,
1507 dev_info.rx_desc_lim.nb_min,
1508 dev_info.rx_desc_lim.nb_align);
1512 rxq = dev->data->rx_queues;
1513 if (rxq[rx_queue_id]) {
1514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1516 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1517 rxq[rx_queue_id] = NULL;
1520 if (rx_conf == NULL)
1521 rx_conf = &dev_info.default_rxconf;
1523 local_conf = *rx_conf;
1524 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1526 * Reflect port offloads to queue offloads in order for
1527 * offloads to not be discarded.
1529 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1530 &local_conf.offloads);
1533 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1534 socket_id, &local_conf, mp);
1536 if (!dev->data->min_rx_buf_size ||
1537 dev->data->min_rx_buf_size > mbp_buf_size)
1538 dev->data->min_rx_buf_size = mbp_buf_size;
1541 return eth_err(port_id, ret);
1545 * A conversion function from txq_flags API.
1548 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1550 uint64_t offloads = 0;
1552 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1553 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1554 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1555 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1556 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1557 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1558 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1559 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1560 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1561 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1562 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1563 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1564 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1566 *tx_offloads = offloads;
1570 * A conversion function from offloads API.
1573 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1577 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1578 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1579 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1580 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1581 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1582 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1583 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1584 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1585 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1586 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1587 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1588 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1594 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1595 uint16_t nb_tx_desc, unsigned int socket_id,
1596 const struct rte_eth_txconf *tx_conf)
1598 struct rte_eth_dev *dev;
1599 struct rte_eth_dev_info dev_info;
1600 struct rte_eth_txconf local_conf;
1603 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1605 dev = &rte_eth_devices[port_id];
1606 if (tx_queue_id >= dev->data->nb_tx_queues) {
1607 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1611 if (dev->data->dev_started) {
1612 RTE_PMD_DEBUG_TRACE(
1613 "port %d must be stopped to allow configuration\n", port_id);
1617 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1620 rte_eth_dev_info_get(port_id, &dev_info);
1622 /* Use default specified by driver, if nb_tx_desc is zero */
1623 if (nb_tx_desc == 0) {
1624 nb_tx_desc = dev_info.default_txportconf.ring_size;
1625 /* If driver default is zero, fall back on EAL default */
1626 if (nb_tx_desc == 0)
1627 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1629 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1630 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1631 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1632 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1633 "should be: <= %hu, = %hu, and a product of %hu\n",
1635 dev_info.tx_desc_lim.nb_max,
1636 dev_info.tx_desc_lim.nb_min,
1637 dev_info.tx_desc_lim.nb_align);
1641 txq = dev->data->tx_queues;
1642 if (txq[tx_queue_id]) {
1643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1645 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1646 txq[tx_queue_id] = NULL;
1649 if (tx_conf == NULL)
1650 tx_conf = &dev_info.default_txconf;
1653 * Convert between the offloads API to enable PMDs to support
1656 local_conf = *tx_conf;
1657 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1658 rte_eth_convert_txq_offloads(tx_conf->offloads,
1659 &local_conf.txq_flags);
1660 /* Keep the ignore flag. */
1661 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1663 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1664 &local_conf.offloads);
1667 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1668 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1672 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1673 void *userdata __rte_unused)
1677 for (i = 0; i < unsent; i++)
1678 rte_pktmbuf_free(pkts[i]);
1682 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1685 uint64_t *count = userdata;
1688 for (i = 0; i < unsent; i++)
1689 rte_pktmbuf_free(pkts[i]);
1695 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1696 buffer_tx_error_fn cbfn, void *userdata)
1698 buffer->error_callback = cbfn;
1699 buffer->error_userdata = userdata;
1704 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1711 buffer->size = size;
1712 if (buffer->error_callback == NULL) {
1713 ret = rte_eth_tx_buffer_set_err_callback(
1714 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1721 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1723 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1726 /* Validate Input Data. Bail if not valid or not supported. */
1727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1728 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1730 /* Call driver to free pending mbufs. */
1731 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1733 return eth_err(port_id, ret);
1737 rte_eth_promiscuous_enable(uint16_t port_id)
1739 struct rte_eth_dev *dev;
1741 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1742 dev = &rte_eth_devices[port_id];
1744 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1745 (*dev->dev_ops->promiscuous_enable)(dev);
1746 dev->data->promiscuous = 1;
1750 rte_eth_promiscuous_disable(uint16_t port_id)
1752 struct rte_eth_dev *dev;
1754 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1755 dev = &rte_eth_devices[port_id];
1757 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1758 dev->data->promiscuous = 0;
1759 (*dev->dev_ops->promiscuous_disable)(dev);
1763 rte_eth_promiscuous_get(uint16_t port_id)
1765 struct rte_eth_dev *dev;
1767 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1769 dev = &rte_eth_devices[port_id];
1770 return dev->data->promiscuous;
1774 rte_eth_allmulticast_enable(uint16_t port_id)
1776 struct rte_eth_dev *dev;
1778 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1779 dev = &rte_eth_devices[port_id];
1781 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1782 (*dev->dev_ops->allmulticast_enable)(dev);
1783 dev->data->all_multicast = 1;
1787 rte_eth_allmulticast_disable(uint16_t port_id)
1789 struct rte_eth_dev *dev;
1791 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1792 dev = &rte_eth_devices[port_id];
1794 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1795 dev->data->all_multicast = 0;
1796 (*dev->dev_ops->allmulticast_disable)(dev);
1800 rte_eth_allmulticast_get(uint16_t port_id)
1802 struct rte_eth_dev *dev;
1804 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1806 dev = &rte_eth_devices[port_id];
1807 return dev->data->all_multicast;
1811 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1813 struct rte_eth_dev *dev;
1815 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1816 dev = &rte_eth_devices[port_id];
1818 if (dev->data->dev_conf.intr_conf.lsc &&
1819 dev->data->dev_started)
1820 rte_eth_linkstatus_get(dev, eth_link);
1822 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1823 (*dev->dev_ops->link_update)(dev, 1);
1824 *eth_link = dev->data->dev_link;
1829 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1831 struct rte_eth_dev *dev;
1833 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1834 dev = &rte_eth_devices[port_id];
1836 if (dev->data->dev_conf.intr_conf.lsc &&
1837 dev->data->dev_started)
1838 rte_eth_linkstatus_get(dev, eth_link);
1840 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1841 (*dev->dev_ops->link_update)(dev, 0);
1842 *eth_link = dev->data->dev_link;
1847 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1849 struct rte_eth_dev *dev;
1851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1853 dev = &rte_eth_devices[port_id];
1854 memset(stats, 0, sizeof(*stats));
1856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1857 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1858 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1862 rte_eth_stats_reset(uint16_t port_id)
1864 struct rte_eth_dev *dev;
1866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1867 dev = &rte_eth_devices[port_id];
1869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1870 (*dev->dev_ops->stats_reset)(dev);
1871 dev->data->rx_mbuf_alloc_failed = 0;
1877 get_xstats_basic_count(struct rte_eth_dev *dev)
1879 uint16_t nb_rxqs, nb_txqs;
1882 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1883 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1885 count = RTE_NB_STATS;
1886 count += nb_rxqs * RTE_NB_RXQ_STATS;
1887 count += nb_txqs * RTE_NB_TXQ_STATS;
1893 get_xstats_count(uint16_t port_id)
1895 struct rte_eth_dev *dev;
1898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1899 dev = &rte_eth_devices[port_id];
1900 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1901 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1904 return eth_err(port_id, count);
1906 if (dev->dev_ops->xstats_get_names != NULL) {
1907 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1909 return eth_err(port_id, count);
1914 count += get_xstats_basic_count(dev);
1920 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1923 int cnt_xstats, idx_xstat;
1925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1928 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1933 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1938 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1939 if (cnt_xstats < 0) {
1940 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1944 /* Get id-name lookup table */
1945 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1947 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1948 port_id, xstats_names, cnt_xstats, NULL)) {
1949 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1953 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1954 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1963 /* retrieve basic stats names */
1965 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1966 struct rte_eth_xstat_name *xstats_names)
1968 int cnt_used_entries = 0;
1969 uint32_t idx, id_queue;
1972 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1973 snprintf(xstats_names[cnt_used_entries].name,
1974 sizeof(xstats_names[0].name),
1975 "%s", rte_stats_strings[idx].name);
1978 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1979 for (id_queue = 0; id_queue < num_q; id_queue++) {
1980 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1981 snprintf(xstats_names[cnt_used_entries].name,
1982 sizeof(xstats_names[0].name),
1984 id_queue, rte_rxq_stats_strings[idx].name);
1989 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1990 for (id_queue = 0; id_queue < num_q; id_queue++) {
1991 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1992 snprintf(xstats_names[cnt_used_entries].name,
1993 sizeof(xstats_names[0].name),
1995 id_queue, rte_txq_stats_strings[idx].name);
1999 return cnt_used_entries;
2002 /* retrieve ethdev extended statistics names */
2004 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2005 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2008 struct rte_eth_xstat_name *xstats_names_copy;
2009 unsigned int no_basic_stat_requested = 1;
2010 unsigned int no_ext_stat_requested = 1;
2011 unsigned int expected_entries;
2012 unsigned int basic_count;
2013 struct rte_eth_dev *dev;
2017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2018 dev = &rte_eth_devices[port_id];
2020 basic_count = get_xstats_basic_count(dev);
2021 ret = get_xstats_count(port_id);
2024 expected_entries = (unsigned int)ret;
2026 /* Return max number of stats if no ids given */
2029 return expected_entries;
2030 else if (xstats_names && size < expected_entries)
2031 return expected_entries;
2034 if (ids && !xstats_names)
2037 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2038 uint64_t ids_copy[size];
2040 for (i = 0; i < size; i++) {
2041 if (ids[i] < basic_count) {
2042 no_basic_stat_requested = 0;
2047 * Convert ids to xstats ids that PMD knows.
2048 * ids known by user are basic + extended stats.
2050 ids_copy[i] = ids[i] - basic_count;
2053 if (no_basic_stat_requested)
2054 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2055 xstats_names, ids_copy, size);
2058 /* Retrieve all stats */
2060 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2062 if (num_stats < 0 || num_stats > (int)expected_entries)
2065 return expected_entries;
2068 xstats_names_copy = calloc(expected_entries,
2069 sizeof(struct rte_eth_xstat_name));
2071 if (!xstats_names_copy) {
2072 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2077 for (i = 0; i < size; i++) {
2078 if (ids[i] >= basic_count) {
2079 no_ext_stat_requested = 0;
2085 /* Fill xstats_names_copy structure */
2086 if (ids && no_ext_stat_requested) {
2087 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2089 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2092 free(xstats_names_copy);
2098 for (i = 0; i < size; i++) {
2099 if (ids[i] >= expected_entries) {
2100 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2101 free(xstats_names_copy);
2104 xstats_names[i] = xstats_names_copy[ids[i]];
2107 free(xstats_names_copy);
2112 rte_eth_xstats_get_names(uint16_t port_id,
2113 struct rte_eth_xstat_name *xstats_names,
2116 struct rte_eth_dev *dev;
2117 int cnt_used_entries;
2118 int cnt_expected_entries;
2119 int cnt_driver_entries;
2121 cnt_expected_entries = get_xstats_count(port_id);
2122 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2123 (int)size < cnt_expected_entries)
2124 return cnt_expected_entries;
2126 /* port_id checked in get_xstats_count() */
2127 dev = &rte_eth_devices[port_id];
2129 cnt_used_entries = rte_eth_basic_stats_get_names(
2132 if (dev->dev_ops->xstats_get_names != NULL) {
2133 /* If there are any driver-specific xstats, append them
2136 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2138 xstats_names + cnt_used_entries,
2139 size - cnt_used_entries);
2140 if (cnt_driver_entries < 0)
2141 return eth_err(port_id, cnt_driver_entries);
2142 cnt_used_entries += cnt_driver_entries;
2145 return cnt_used_entries;
2150 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2152 struct rte_eth_dev *dev;
2153 struct rte_eth_stats eth_stats;
2154 unsigned int count = 0, i, q;
2155 uint64_t val, *stats_ptr;
2156 uint16_t nb_rxqs, nb_txqs;
2159 ret = rte_eth_stats_get(port_id, ð_stats);
2163 dev = &rte_eth_devices[port_id];
2165 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2166 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2169 for (i = 0; i < RTE_NB_STATS; i++) {
2170 stats_ptr = RTE_PTR_ADD(ð_stats,
2171 rte_stats_strings[i].offset);
2173 xstats[count++].value = val;
2177 for (q = 0; q < nb_rxqs; q++) {
2178 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2179 stats_ptr = RTE_PTR_ADD(ð_stats,
2180 rte_rxq_stats_strings[i].offset +
2181 q * sizeof(uint64_t));
2183 xstats[count++].value = val;
2188 for (q = 0; q < nb_txqs; q++) {
2189 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2190 stats_ptr = RTE_PTR_ADD(ð_stats,
2191 rte_txq_stats_strings[i].offset +
2192 q * sizeof(uint64_t));
2194 xstats[count++].value = val;
2200 /* retrieve ethdev extended statistics */
2202 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2203 uint64_t *values, unsigned int size)
2205 unsigned int no_basic_stat_requested = 1;
2206 unsigned int no_ext_stat_requested = 1;
2207 unsigned int num_xstats_filled;
2208 unsigned int basic_count;
2209 uint16_t expected_entries;
2210 struct rte_eth_dev *dev;
2214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2215 ret = get_xstats_count(port_id);
2218 expected_entries = (uint16_t)ret;
2219 struct rte_eth_xstat xstats[expected_entries];
2220 dev = &rte_eth_devices[port_id];
2221 basic_count = get_xstats_basic_count(dev);
2223 /* Return max number of stats if no ids given */
2226 return expected_entries;
2227 else if (values && size < expected_entries)
2228 return expected_entries;
2234 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2235 unsigned int basic_count = get_xstats_basic_count(dev);
2236 uint64_t ids_copy[size];
2238 for (i = 0; i < size; i++) {
2239 if (ids[i] < basic_count) {
2240 no_basic_stat_requested = 0;
2245 * Convert ids to xstats ids that PMD knows.
2246 * ids known by user are basic + extended stats.
2248 ids_copy[i] = ids[i] - basic_count;
2251 if (no_basic_stat_requested)
2252 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2257 for (i = 0; i < size; i++) {
2258 if (ids[i] >= basic_count) {
2259 no_ext_stat_requested = 0;
2265 /* Fill the xstats structure */
2266 if (ids && no_ext_stat_requested)
2267 ret = rte_eth_basic_stats_get(port_id, xstats);
2269 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2273 num_xstats_filled = (unsigned int)ret;
2275 /* Return all stats */
2277 for (i = 0; i < num_xstats_filled; i++)
2278 values[i] = xstats[i].value;
2279 return expected_entries;
2283 for (i = 0; i < size; i++) {
2284 if (ids[i] >= expected_entries) {
2285 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2288 values[i] = xstats[ids[i]].value;
2294 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2297 struct rte_eth_dev *dev;
2298 unsigned int count = 0, i;
2299 signed int xcount = 0;
2300 uint16_t nb_rxqs, nb_txqs;
2303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2305 dev = &rte_eth_devices[port_id];
2307 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2308 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2310 /* Return generic statistics */
2311 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2312 (nb_txqs * RTE_NB_TXQ_STATS);
2314 /* implemented by the driver */
2315 if (dev->dev_ops->xstats_get != NULL) {
2316 /* Retrieve the xstats from the driver at the end of the
2319 xcount = (*dev->dev_ops->xstats_get)(dev,
2320 xstats ? xstats + count : NULL,
2321 (n > count) ? n - count : 0);
2324 return eth_err(port_id, xcount);
2327 if (n < count + xcount || xstats == NULL)
2328 return count + xcount;
2330 /* now fill the xstats structure */
2331 ret = rte_eth_basic_stats_get(port_id, xstats);
2336 for (i = 0; i < count; i++)
2338 /* add an offset to driver-specific stats */
2339 for ( ; i < count + xcount; i++)
2340 xstats[i].id += count;
2342 return count + xcount;
2345 /* reset ethdev extended statistics */
2347 rte_eth_xstats_reset(uint16_t port_id)
2349 struct rte_eth_dev *dev;
2351 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2352 dev = &rte_eth_devices[port_id];
2354 /* implemented by the driver */
2355 if (dev->dev_ops->xstats_reset != NULL) {
2356 (*dev->dev_ops->xstats_reset)(dev);
2360 /* fallback to default */
2361 rte_eth_stats_reset(port_id);
2365 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2368 struct rte_eth_dev *dev;
2370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2372 dev = &rte_eth_devices[port_id];
2374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2375 return (*dev->dev_ops->queue_stats_mapping_set)
2376 (dev, queue_id, stat_idx, is_rx);
2381 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2384 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2385 stat_idx, STAT_QMAP_TX));
2390 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2393 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2394 stat_idx, STAT_QMAP_RX));
2398 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2400 struct rte_eth_dev *dev;
2402 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2403 dev = &rte_eth_devices[port_id];
2405 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2406 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2407 fw_version, fw_size));
2411 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2413 struct rte_eth_dev *dev;
2414 const struct rte_eth_desc_lim lim = {
2415 .nb_max = UINT16_MAX,
2420 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2421 dev = &rte_eth_devices[port_id];
2423 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2424 dev_info->rx_desc_lim = lim;
2425 dev_info->tx_desc_lim = lim;
2426 dev_info->device = dev->device;
2428 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2429 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2430 dev_info->driver_name = dev->device->driver->name;
2431 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2432 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2436 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2437 uint32_t *ptypes, int num)
2440 struct rte_eth_dev *dev;
2441 const uint32_t *all_ptypes;
2443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2444 dev = &rte_eth_devices[port_id];
2445 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2446 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2451 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2452 if (all_ptypes[i] & ptype_mask) {
2454 ptypes[j] = all_ptypes[i];
2462 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2464 struct rte_eth_dev *dev;
2466 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2467 dev = &rte_eth_devices[port_id];
2468 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2473 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2475 struct rte_eth_dev *dev;
2477 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2479 dev = &rte_eth_devices[port_id];
2480 *mtu = dev->data->mtu;
2485 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2488 struct rte_eth_dev *dev;
2490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2491 dev = &rte_eth_devices[port_id];
2492 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2494 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2496 dev->data->mtu = mtu;
2498 return eth_err(port_id, ret);
2502 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2504 struct rte_eth_dev *dev;
2507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2508 dev = &rte_eth_devices[port_id];
2509 if (!(dev->data->dev_conf.rxmode.offloads &
2510 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2511 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2515 if (vlan_id > 4095) {
2516 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2517 port_id, (unsigned) vlan_id);
2520 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2522 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2524 struct rte_vlan_filter_conf *vfc;
2528 vfc = &dev->data->vlan_filter_conf;
2529 vidx = vlan_id / 64;
2530 vbit = vlan_id % 64;
2533 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2535 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2538 return eth_err(port_id, ret);
2542 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2545 struct rte_eth_dev *dev;
2547 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2548 dev = &rte_eth_devices[port_id];
2549 if (rx_queue_id >= dev->data->nb_rx_queues) {
2550 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2555 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2561 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2562 enum rte_vlan_type vlan_type,
2565 struct rte_eth_dev *dev;
2567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2568 dev = &rte_eth_devices[port_id];
2569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2571 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2576 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2578 struct rte_eth_dev *dev;
2582 uint64_t orig_offloads;
2584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2585 dev = &rte_eth_devices[port_id];
2587 /* save original values in case of failure */
2588 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2590 /*check which option changed by application*/
2591 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2592 org = !!(dev->data->dev_conf.rxmode.offloads &
2593 DEV_RX_OFFLOAD_VLAN_STRIP);
2596 dev->data->dev_conf.rxmode.offloads |=
2597 DEV_RX_OFFLOAD_VLAN_STRIP;
2599 dev->data->dev_conf.rxmode.offloads &=
2600 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2601 mask |= ETH_VLAN_STRIP_MASK;
2604 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2605 org = !!(dev->data->dev_conf.rxmode.offloads &
2606 DEV_RX_OFFLOAD_VLAN_FILTER);
2609 dev->data->dev_conf.rxmode.offloads |=
2610 DEV_RX_OFFLOAD_VLAN_FILTER;
2612 dev->data->dev_conf.rxmode.offloads &=
2613 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2614 mask |= ETH_VLAN_FILTER_MASK;
2617 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2618 org = !!(dev->data->dev_conf.rxmode.offloads &
2619 DEV_RX_OFFLOAD_VLAN_EXTEND);
2622 dev->data->dev_conf.rxmode.offloads |=
2623 DEV_RX_OFFLOAD_VLAN_EXTEND;
2625 dev->data->dev_conf.rxmode.offloads &=
2626 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2627 mask |= ETH_VLAN_EXTEND_MASK;
2634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2637 * Convert to the offload bitfield API just in case the underlying PMD
2638 * still supporting it.
2640 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2641 &dev->data->dev_conf.rxmode);
2642 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2644 /* hit an error restore original values */
2645 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2646 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2647 &dev->data->dev_conf.rxmode);
2650 return eth_err(port_id, ret);
2654 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2656 struct rte_eth_dev *dev;
2659 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2660 dev = &rte_eth_devices[port_id];
2662 if (dev->data->dev_conf.rxmode.offloads &
2663 DEV_RX_OFFLOAD_VLAN_STRIP)
2664 ret |= ETH_VLAN_STRIP_OFFLOAD;
2666 if (dev->data->dev_conf.rxmode.offloads &
2667 DEV_RX_OFFLOAD_VLAN_FILTER)
2668 ret |= ETH_VLAN_FILTER_OFFLOAD;
2670 if (dev->data->dev_conf.rxmode.offloads &
2671 DEV_RX_OFFLOAD_VLAN_EXTEND)
2672 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2678 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2680 struct rte_eth_dev *dev;
2682 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2683 dev = &rte_eth_devices[port_id];
2684 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2686 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2690 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2692 struct rte_eth_dev *dev;
2694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2695 dev = &rte_eth_devices[port_id];
2696 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2697 memset(fc_conf, 0, sizeof(*fc_conf));
2698 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2702 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2704 struct rte_eth_dev *dev;
2706 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2707 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2708 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2712 dev = &rte_eth_devices[port_id];
2713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2714 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2718 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2719 struct rte_eth_pfc_conf *pfc_conf)
2721 struct rte_eth_dev *dev;
2723 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2724 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2725 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2729 dev = &rte_eth_devices[port_id];
2730 /* High water, low water validation are device specific */
2731 if (*dev->dev_ops->priority_flow_ctrl_set)
2732 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2738 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2746 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2747 for (i = 0; i < num; i++) {
2748 if (reta_conf[i].mask)
2756 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2760 uint16_t i, idx, shift;
2766 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2770 for (i = 0; i < reta_size; i++) {
2771 idx = i / RTE_RETA_GROUP_SIZE;
2772 shift = i % RTE_RETA_GROUP_SIZE;
2773 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2774 (reta_conf[idx].reta[shift] >= max_rxq)) {
2775 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2776 "the maximum rxq index: %u\n", idx, shift,
2777 reta_conf[idx].reta[shift], max_rxq);
2786 rte_eth_dev_rss_reta_update(uint16_t port_id,
2787 struct rte_eth_rss_reta_entry64 *reta_conf,
2790 struct rte_eth_dev *dev;
2793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2794 /* Check mask bits */
2795 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2799 dev = &rte_eth_devices[port_id];
2801 /* Check entry value */
2802 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2803 dev->data->nb_rx_queues);
2807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2808 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2813 rte_eth_dev_rss_reta_query(uint16_t port_id,
2814 struct rte_eth_rss_reta_entry64 *reta_conf,
2817 struct rte_eth_dev *dev;
2820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822 /* Check mask bits */
2823 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2827 dev = &rte_eth_devices[port_id];
2828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2829 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2834 rte_eth_dev_rss_hash_update(uint16_t port_id,
2835 struct rte_eth_rss_conf *rss_conf)
2837 struct rte_eth_dev *dev;
2839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2840 dev = &rte_eth_devices[port_id];
2841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2842 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2847 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2848 struct rte_eth_rss_conf *rss_conf)
2850 struct rte_eth_dev *dev;
2852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2853 dev = &rte_eth_devices[port_id];
2854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2855 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2860 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2861 struct rte_eth_udp_tunnel *udp_tunnel)
2863 struct rte_eth_dev *dev;
2865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2866 if (udp_tunnel == NULL) {
2867 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2871 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2872 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2876 dev = &rte_eth_devices[port_id];
2877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2878 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2883 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2884 struct rte_eth_udp_tunnel *udp_tunnel)
2886 struct rte_eth_dev *dev;
2888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2889 dev = &rte_eth_devices[port_id];
2891 if (udp_tunnel == NULL) {
2892 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2896 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2897 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2902 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2907 rte_eth_led_on(uint16_t port_id)
2909 struct rte_eth_dev *dev;
2911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2912 dev = &rte_eth_devices[port_id];
2913 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2914 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2918 rte_eth_led_off(uint16_t port_id)
2920 struct rte_eth_dev *dev;
2922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2923 dev = &rte_eth_devices[port_id];
2924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2925 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2929 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2933 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2935 struct rte_eth_dev_info dev_info;
2936 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2940 rte_eth_dev_info_get(port_id, &dev_info);
2942 for (i = 0; i < dev_info.max_mac_addrs; i++)
2943 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2949 static const struct ether_addr null_mac_addr;
2952 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2955 struct rte_eth_dev *dev;
2960 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2961 dev = &rte_eth_devices[port_id];
2962 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2964 if (is_zero_ether_addr(addr)) {
2965 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2969 if (pool >= ETH_64_POOLS) {
2970 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2974 index = get_mac_addr_index(port_id, addr);
2976 index = get_mac_addr_index(port_id, &null_mac_addr);
2978 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2983 pool_mask = dev->data->mac_pool_sel[index];
2985 /* Check if both MAC address and pool is already there, and do nothing */
2986 if (pool_mask & (1ULL << pool))
2991 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2994 /* Update address in NIC data structure */
2995 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2997 /* Update pool bitmap in NIC data structure */
2998 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3001 return eth_err(port_id, ret);
3005 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3007 struct rte_eth_dev *dev;
3010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3011 dev = &rte_eth_devices[port_id];
3012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3014 index = get_mac_addr_index(port_id, addr);
3016 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
3018 } else if (index < 0)
3019 return 0; /* Do nothing if address wasn't found */
3022 (*dev->dev_ops->mac_addr_remove)(dev, index);
3024 /* Update address in NIC data structure */
3025 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3027 /* reset pool bitmap */
3028 dev->data->mac_pool_sel[index] = 0;
3034 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3036 struct rte_eth_dev *dev;
3039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3041 if (!is_valid_assigned_ether_addr(addr))
3044 dev = &rte_eth_devices[port_id];
3045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3047 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3051 /* Update default address in NIC data structure */
3052 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3059 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3063 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3065 struct rte_eth_dev_info dev_info;
3066 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3069 rte_eth_dev_info_get(port_id, &dev_info);
3070 if (!dev->data->hash_mac_addrs)
3073 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3074 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3075 ETHER_ADDR_LEN) == 0)
3082 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3087 struct rte_eth_dev *dev;
3089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3091 dev = &rte_eth_devices[port_id];
3092 if (is_zero_ether_addr(addr)) {
3093 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3098 index = get_hash_mac_addr_index(port_id, addr);
3099 /* Check if it's already there, and do nothing */
3100 if ((index >= 0) && on)
3105 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3106 "set in UTA\n", port_id);
3110 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3112 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3119 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3121 /* Update address in NIC data structure */
3123 ether_addr_copy(addr,
3124 &dev->data->hash_mac_addrs[index]);
3126 ether_addr_copy(&null_mac_addr,
3127 &dev->data->hash_mac_addrs[index]);
3130 return eth_err(port_id, ret);
3134 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3136 struct rte_eth_dev *dev;
3138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3140 dev = &rte_eth_devices[port_id];
3142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3143 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3147 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3150 struct rte_eth_dev *dev;
3151 struct rte_eth_dev_info dev_info;
3152 struct rte_eth_link link;
3154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3156 dev = &rte_eth_devices[port_id];
3157 rte_eth_dev_info_get(port_id, &dev_info);
3158 link = dev->data->dev_link;
3160 if (queue_idx > dev_info.max_tx_queues) {
3161 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3162 "invalid queue id=%d\n", port_id, queue_idx);
3166 if (tx_rate > link.link_speed) {
3167 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3168 "bigger than link speed= %d\n",
3169 tx_rate, link.link_speed);
3173 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3174 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3175 queue_idx, tx_rate));
3179 rte_eth_mirror_rule_set(uint16_t port_id,
3180 struct rte_eth_mirror_conf *mirror_conf,
3181 uint8_t rule_id, uint8_t on)
3183 struct rte_eth_dev *dev;
3185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3186 if (mirror_conf->rule_type == 0) {
3187 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3191 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3192 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3197 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3198 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3199 (mirror_conf->pool_mask == 0)) {
3200 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3204 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3205 mirror_conf->vlan.vlan_mask == 0) {
3206 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3210 dev = &rte_eth_devices[port_id];
3211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3213 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3214 mirror_conf, rule_id, on));
3218 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3220 struct rte_eth_dev *dev;
3222 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3224 dev = &rte_eth_devices[port_id];
3225 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3227 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3231 RTE_INIT(eth_dev_init_cb_lists)
3235 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3236 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3240 rte_eth_dev_callback_register(uint16_t port_id,
3241 enum rte_eth_event_type event,
3242 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3244 struct rte_eth_dev *dev;
3245 struct rte_eth_dev_callback *user_cb;
3246 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3252 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3253 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3257 if (port_id == RTE_ETH_ALL) {
3259 last_port = RTE_MAX_ETHPORTS - 1;
3261 next_port = last_port = port_id;
3264 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3267 dev = &rte_eth_devices[next_port];
3269 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3270 if (user_cb->cb_fn == cb_fn &&
3271 user_cb->cb_arg == cb_arg &&
3272 user_cb->event == event) {
3277 /* create a new callback. */
3278 if (user_cb == NULL) {
3279 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3280 sizeof(struct rte_eth_dev_callback), 0);
3281 if (user_cb != NULL) {
3282 user_cb->cb_fn = cb_fn;
3283 user_cb->cb_arg = cb_arg;
3284 user_cb->event = event;
3285 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3288 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3289 rte_eth_dev_callback_unregister(port_id, event,
3295 } while (++next_port <= last_port);
3297 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3302 rte_eth_dev_callback_unregister(uint16_t port_id,
3303 enum rte_eth_event_type event,
3304 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3307 struct rte_eth_dev *dev;
3308 struct rte_eth_dev_callback *cb, *next;
3309 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3315 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3316 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3320 if (port_id == RTE_ETH_ALL) {
3322 last_port = RTE_MAX_ETHPORTS - 1;
3324 next_port = last_port = port_id;
3327 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3330 dev = &rte_eth_devices[next_port];
3332 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3335 next = TAILQ_NEXT(cb, next);
3337 if (cb->cb_fn != cb_fn || cb->event != event ||
3338 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3342 * if this callback is not executing right now,
3345 if (cb->active == 0) {
3346 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3352 } while (++next_port <= last_port);
3354 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3359 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3360 enum rte_eth_event_type event, void *ret_param)
3362 struct rte_eth_dev_callback *cb_lst;
3363 struct rte_eth_dev_callback dev_cb;
3366 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3367 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3368 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3372 if (ret_param != NULL)
3373 dev_cb.ret_param = ret_param;
3375 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3376 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3377 dev_cb.cb_arg, dev_cb.ret_param);
3378 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3381 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3386 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3389 struct rte_eth_dev *dev;
3390 struct rte_intr_handle *intr_handle;
3394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3396 dev = &rte_eth_devices[port_id];
3398 if (!dev->intr_handle) {
3399 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3403 intr_handle = dev->intr_handle;
3404 if (!intr_handle->intr_vec) {
3405 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3409 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3410 vec = intr_handle->intr_vec[qid];
3411 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3412 if (rc && rc != -EEXIST) {
3413 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3414 " op %d epfd %d vec %u\n",
3415 port_id, qid, op, epfd, vec);
3422 const struct rte_memzone *
3423 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3424 uint16_t queue_id, size_t size, unsigned align,
3427 char z_name[RTE_MEMZONE_NAMESIZE];
3428 const struct rte_memzone *mz;
3430 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3431 dev->device->driver->name, ring_name,
3432 dev->data->port_id, queue_id);
3434 mz = rte_memzone_lookup(z_name);
3438 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3439 RTE_MEMZONE_IOVA_CONTIG, align);
3443 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3444 int epfd, int op, void *data)
3447 struct rte_eth_dev *dev;
3448 struct rte_intr_handle *intr_handle;
3451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3453 dev = &rte_eth_devices[port_id];
3454 if (queue_id >= dev->data->nb_rx_queues) {
3455 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3459 if (!dev->intr_handle) {
3460 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3464 intr_handle = dev->intr_handle;
3465 if (!intr_handle->intr_vec) {
3466 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3470 vec = intr_handle->intr_vec[queue_id];
3471 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3472 if (rc && rc != -EEXIST) {
3473 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3474 " op %d epfd %d vec %u\n",
3475 port_id, queue_id, op, epfd, vec);
3483 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3486 struct rte_eth_dev *dev;
3488 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3490 dev = &rte_eth_devices[port_id];
3492 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3493 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3498 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3501 struct rte_eth_dev *dev;
3503 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3505 dev = &rte_eth_devices[port_id];
3507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3508 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3514 rte_eth_dev_filter_supported(uint16_t port_id,
3515 enum rte_filter_type filter_type)
3517 struct rte_eth_dev *dev;
3519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3521 dev = &rte_eth_devices[port_id];
3522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3523 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3524 RTE_ETH_FILTER_NOP, NULL);
3528 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3529 enum rte_filter_op filter_op, void *arg)
3531 struct rte_eth_dev *dev;
3533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3535 dev = &rte_eth_devices[port_id];
3536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3537 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3541 const struct rte_eth_rxtx_callback *
3542 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3543 rte_rx_callback_fn fn, void *user_param)
3545 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3546 rte_errno = ENOTSUP;
3549 /* check input parameters */
3550 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3551 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3555 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3563 cb->param = user_param;
3565 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3566 /* Add the callbacks in fifo order. */
3567 struct rte_eth_rxtx_callback *tail =
3568 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3571 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3578 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3583 const struct rte_eth_rxtx_callback *
3584 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3585 rte_rx_callback_fn fn, void *user_param)
3587 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3588 rte_errno = ENOTSUP;
3591 /* check input parameters */
3592 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3593 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3598 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3606 cb->param = user_param;
3608 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3609 /* Add the callbacks at fisrt position*/
3610 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3612 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3613 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3618 const struct rte_eth_rxtx_callback *
3619 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3620 rte_tx_callback_fn fn, void *user_param)
3622 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3623 rte_errno = ENOTSUP;
3626 /* check input parameters */
3627 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3628 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3633 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3641 cb->param = user_param;
3643 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3644 /* Add the callbacks in fifo order. */
3645 struct rte_eth_rxtx_callback *tail =
3646 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3649 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3656 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3662 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3663 const struct rte_eth_rxtx_callback *user_cb)
3665 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3668 /* Check input parameters. */
3669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3670 if (user_cb == NULL ||
3671 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3674 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3675 struct rte_eth_rxtx_callback *cb;
3676 struct rte_eth_rxtx_callback **prev_cb;
3679 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3680 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3681 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3683 if (cb == user_cb) {
3684 /* Remove the user cb from the callback list. */
3685 *prev_cb = cb->next;
3690 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3696 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3697 const struct rte_eth_rxtx_callback *user_cb)
3699 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3702 /* Check input parameters. */
3703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3704 if (user_cb == NULL ||
3705 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3708 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3710 struct rte_eth_rxtx_callback *cb;
3711 struct rte_eth_rxtx_callback **prev_cb;
3713 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3714 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3715 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3717 if (cb == user_cb) {
3718 /* Remove the user cb from the callback list. */
3719 *prev_cb = cb->next;
3724 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3730 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3731 struct rte_eth_rxq_info *qinfo)
3733 struct rte_eth_dev *dev;
3735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3740 dev = &rte_eth_devices[port_id];
3741 if (queue_id >= dev->data->nb_rx_queues) {
3742 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3746 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3748 memset(qinfo, 0, sizeof(*qinfo));
3749 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3754 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3755 struct rte_eth_txq_info *qinfo)
3757 struct rte_eth_dev *dev;
3759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3764 dev = &rte_eth_devices[port_id];
3765 if (queue_id >= dev->data->nb_tx_queues) {
3766 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3770 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3772 memset(qinfo, 0, sizeof(*qinfo));
3773 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3778 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3779 struct ether_addr *mc_addr_set,
3780 uint32_t nb_mc_addr)
3782 struct rte_eth_dev *dev;
3784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3786 dev = &rte_eth_devices[port_id];
3787 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3788 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3789 mc_addr_set, nb_mc_addr));
3793 rte_eth_timesync_enable(uint16_t port_id)
3795 struct rte_eth_dev *dev;
3797 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3798 dev = &rte_eth_devices[port_id];
3800 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3801 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3805 rte_eth_timesync_disable(uint16_t port_id)
3807 struct rte_eth_dev *dev;
3809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3810 dev = &rte_eth_devices[port_id];
3812 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3813 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3817 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3820 struct rte_eth_dev *dev;
3822 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3823 dev = &rte_eth_devices[port_id];
3825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3826 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3827 (dev, timestamp, flags));
3831 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3832 struct timespec *timestamp)
3834 struct rte_eth_dev *dev;
3836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3837 dev = &rte_eth_devices[port_id];
3839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3840 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3845 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3847 struct rte_eth_dev *dev;
3849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3850 dev = &rte_eth_devices[port_id];
3852 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3853 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3858 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3860 struct rte_eth_dev *dev;
3862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3863 dev = &rte_eth_devices[port_id];
3865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3866 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3871 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3873 struct rte_eth_dev *dev;
3875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3876 dev = &rte_eth_devices[port_id];
3878 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3879 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3884 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3886 struct rte_eth_dev *dev;
3888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3890 dev = &rte_eth_devices[port_id];
3891 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3892 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3896 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3898 struct rte_eth_dev *dev;
3900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3902 dev = &rte_eth_devices[port_id];
3903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3904 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3908 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3910 struct rte_eth_dev *dev;
3912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3914 dev = &rte_eth_devices[port_id];
3915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3916 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3920 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3922 struct rte_eth_dev *dev;
3924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3926 dev = &rte_eth_devices[port_id];
3927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3928 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
3932 rte_eth_dev_get_dcb_info(uint16_t port_id,
3933 struct rte_eth_dcb_info *dcb_info)
3935 struct rte_eth_dev *dev;
3937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3939 dev = &rte_eth_devices[port_id];
3940 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3943 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
3947 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3948 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3950 struct rte_eth_dev *dev;
3952 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3953 if (l2_tunnel == NULL) {
3954 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3958 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3959 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3963 dev = &rte_eth_devices[port_id];
3964 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3966 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
3971 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3972 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3976 struct rte_eth_dev *dev;
3978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3980 if (l2_tunnel == NULL) {
3981 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3985 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3986 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3991 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3995 dev = &rte_eth_devices[port_id];
3996 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3998 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
3999 l2_tunnel, mask, en));
4003 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4004 const struct rte_eth_desc_lim *desc_lim)
4006 if (desc_lim->nb_align != 0)
4007 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4009 if (desc_lim->nb_max != 0)
4010 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4012 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4016 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4017 uint16_t *nb_rx_desc,
4018 uint16_t *nb_tx_desc)
4020 struct rte_eth_dev *dev;
4021 struct rte_eth_dev_info dev_info;
4023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4025 dev = &rte_eth_devices[port_id];
4026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4028 rte_eth_dev_info_get(port_id, &dev_info);
4030 if (nb_rx_desc != NULL)
4031 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4033 if (nb_tx_desc != NULL)
4034 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4040 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4042 struct rte_eth_dev *dev;
4044 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4049 dev = &rte_eth_devices[port_id];
4051 if (*dev->dev_ops->pool_ops_supported == NULL)
4052 return 1; /* all pools are supported */
4054 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4057 RTE_INIT(ethdev_init_log);
4059 ethdev_init_log(void)
4061 ethdev_logtype = rte_log_register("lib.ethdev");
4062 if (ethdev_logtype >= 0)
4063 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);