4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 void *ret_param; /**< Return parameter */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
143 rte_eth_find_next(uint8_t port_id)
145 while (port_id < RTE_MAX_ETHPORTS &&
146 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
149 if (port_id >= RTE_MAX_ETHPORTS)
150 return RTE_MAX_ETHPORTS;
156 rte_eth_dev_data_alloc(void)
158 const unsigned flags = 0;
159 const struct rte_memzone *mz;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
162 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
164 rte_socket_id(), flags);
166 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
168 rte_panic("Cannot allocate memzone for ethernet port data\n");
170 rte_eth_dev_data = mz->addr;
171 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
172 memset(rte_eth_dev_data, 0,
173 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
177 rte_eth_dev_allocated(const char *name)
181 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
182 if (rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED &&
183 rte_eth_devices[i].device) {
184 if (!strcmp(rte_eth_devices[i].device->name, name))
185 return &rte_eth_devices[i];
192 rte_eth_dev_find_free_port(void)
196 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
197 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
200 return RTE_MAX_ETHPORTS;
203 static struct rte_eth_dev *
204 eth_dev_get(uint8_t port_id)
206 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
208 eth_dev->data = &rte_eth_dev_data[port_id];
209 eth_dev->state = RTE_ETH_DEV_ATTACHED;
210 TAILQ_INIT(&(eth_dev->link_intr_cbs));
212 eth_dev_last_created_port = port_id;
219 rte_eth_dev_allocate(const char *name)
222 struct rte_eth_dev *eth_dev;
224 port_id = rte_eth_dev_find_free_port();
225 if (port_id == RTE_MAX_ETHPORTS) {
226 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
230 if (rte_eth_dev_data == NULL)
231 rte_eth_dev_data_alloc();
233 if (rte_eth_dev_allocated(name) != NULL) {
234 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
239 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
240 eth_dev = eth_dev_get(port_id);
241 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
242 eth_dev->data->port_id = port_id;
243 eth_dev->data->mtu = ETHER_MTU;
249 * Attach to a port already registered by the primary process, which
250 * makes sure that the same device would have the same port id both
251 * in the primary and secondary process.
254 rte_eth_dev_attach_secondary(const char *name)
257 struct rte_eth_dev *eth_dev;
259 if (rte_eth_dev_data == NULL)
260 rte_eth_dev_data_alloc();
262 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
263 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
266 if (i == RTE_MAX_ETHPORTS) {
268 "device %s is not driven by the primary process\n",
273 eth_dev = eth_dev_get(i);
274 RTE_ASSERT(eth_dev->data->port_id == i);
280 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
285 eth_dev->state = RTE_ETH_DEV_UNUSED;
291 rte_eth_dev_is_valid_port(uint8_t port_id)
293 if (port_id >= RTE_MAX_ETHPORTS ||
294 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
301 rte_eth_dev_socket_id(uint8_t port_id)
303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
304 return rte_eth_devices[port_id].data->numa_node;
308 rte_eth_dev_count(void)
314 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
321 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
325 /* shouldn't check 'rte_eth_devices[i].data',
326 * because it might be overwritten by VDEV PMD */
327 tmp = rte_eth_devices[port_id].device->name;
333 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
339 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
346 RTE_ETH_FOREACH_DEV(i) {
347 if (!rte_eth_devices[i].device)
350 ret = strncmp(name, rte_eth_devices[i].device->name,
361 rte_eth_dev_is_detachable(uint8_t port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
367 switch (rte_eth_devices[port_id].data->kdrv) {
368 case RTE_KDRV_IGB_UIO:
369 case RTE_KDRV_UIO_GENERIC:
370 case RTE_KDRV_NIC_UIO:
377 dev_flags = rte_eth_devices[port_id].data->dev_flags;
378 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
379 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
385 /* attach the new device, then store port_id of the device */
387 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
390 int current = rte_eth_dev_count();
394 if ((devargs == NULL) || (port_id == NULL)) {
399 /* parse devargs, then retrieve device name and args */
400 if (rte_eal_parse_devargs_str(devargs, &name, &args))
403 ret = rte_eal_dev_attach(name, args);
407 /* no point looking at the port count if no port exists */
408 if (!rte_eth_dev_count()) {
409 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
414 /* if nothing happened, there is a bug here, since some driver told us
415 * it did attach a device, but did not create a port.
417 if (current == rte_eth_dev_count()) {
422 *port_id = eth_dev_last_created_port;
431 /* detach the device, then store the name of the device */
433 rte_eth_dev_detach(uint8_t port_id, char *name)
442 /* FIXME: move this to eal, once device flags are relocated there */
443 if (rte_eth_dev_is_detachable(port_id))
446 snprintf(name, sizeof(rte_eth_devices[port_id].device->name),
447 "%s", rte_eth_devices[port_id].device->name);
449 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
460 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
462 uint16_t old_nb_queues = dev->data->nb_rx_queues;
466 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
467 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
468 sizeof(dev->data->rx_queues[0]) * nb_queues,
469 RTE_CACHE_LINE_SIZE);
470 if (dev->data->rx_queues == NULL) {
471 dev->data->nb_rx_queues = 0;
474 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
475 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
477 rxq = dev->data->rx_queues;
479 for (i = nb_queues; i < old_nb_queues; i++)
480 (*dev->dev_ops->rx_queue_release)(rxq[i]);
481 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
482 RTE_CACHE_LINE_SIZE);
485 if (nb_queues > old_nb_queues) {
486 uint16_t new_qs = nb_queues - old_nb_queues;
488 memset(rxq + old_nb_queues, 0,
489 sizeof(rxq[0]) * new_qs);
492 dev->data->rx_queues = rxq;
494 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
497 rxq = dev->data->rx_queues;
499 for (i = nb_queues; i < old_nb_queues; i++)
500 (*dev->dev_ops->rx_queue_release)(rxq[i]);
502 rte_free(dev->data->rx_queues);
503 dev->data->rx_queues = NULL;
505 dev->data->nb_rx_queues = nb_queues;
510 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
512 struct rte_eth_dev *dev;
514 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
516 dev = &rte_eth_devices[port_id];
517 if (rx_queue_id >= dev->data->nb_rx_queues) {
518 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
524 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
525 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
526 " already started\n",
527 rx_queue_id, port_id);
531 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
536 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
538 struct rte_eth_dev *dev;
540 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
542 dev = &rte_eth_devices[port_id];
543 if (rx_queue_id >= dev->data->nb_rx_queues) {
544 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
548 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
550 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
551 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
552 " already stopped\n",
553 rx_queue_id, port_id);
557 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
562 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
564 struct rte_eth_dev *dev;
566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
568 dev = &rte_eth_devices[port_id];
569 if (tx_queue_id >= dev->data->nb_tx_queues) {
570 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
574 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
576 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
577 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
578 " already started\n",
579 tx_queue_id, port_id);
583 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
588 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
590 struct rte_eth_dev *dev;
592 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
594 dev = &rte_eth_devices[port_id];
595 if (tx_queue_id >= dev->data->nb_tx_queues) {
596 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
600 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
602 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
603 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
604 " already stopped\n",
605 tx_queue_id, port_id);
609 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
614 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
616 uint16_t old_nb_queues = dev->data->nb_tx_queues;
620 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
621 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
622 sizeof(dev->data->tx_queues[0]) * nb_queues,
623 RTE_CACHE_LINE_SIZE);
624 if (dev->data->tx_queues == NULL) {
625 dev->data->nb_tx_queues = 0;
628 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
629 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
631 txq = dev->data->tx_queues;
633 for (i = nb_queues; i < old_nb_queues; i++)
634 (*dev->dev_ops->tx_queue_release)(txq[i]);
635 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
636 RTE_CACHE_LINE_SIZE);
639 if (nb_queues > old_nb_queues) {
640 uint16_t new_qs = nb_queues - old_nb_queues;
642 memset(txq + old_nb_queues, 0,
643 sizeof(txq[0]) * new_qs);
646 dev->data->tx_queues = txq;
648 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
651 txq = dev->data->tx_queues;
653 for (i = nb_queues; i < old_nb_queues; i++)
654 (*dev->dev_ops->tx_queue_release)(txq[i]);
656 rte_free(dev->data->tx_queues);
657 dev->data->tx_queues = NULL;
659 dev->data->nb_tx_queues = nb_queues;
664 rte_eth_speed_bitflag(uint32_t speed, int duplex)
667 case ETH_SPEED_NUM_10M:
668 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
669 case ETH_SPEED_NUM_100M:
670 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
671 case ETH_SPEED_NUM_1G:
672 return ETH_LINK_SPEED_1G;
673 case ETH_SPEED_NUM_2_5G:
674 return ETH_LINK_SPEED_2_5G;
675 case ETH_SPEED_NUM_5G:
676 return ETH_LINK_SPEED_5G;
677 case ETH_SPEED_NUM_10G:
678 return ETH_LINK_SPEED_10G;
679 case ETH_SPEED_NUM_20G:
680 return ETH_LINK_SPEED_20G;
681 case ETH_SPEED_NUM_25G:
682 return ETH_LINK_SPEED_25G;
683 case ETH_SPEED_NUM_40G:
684 return ETH_LINK_SPEED_40G;
685 case ETH_SPEED_NUM_50G:
686 return ETH_LINK_SPEED_50G;
687 case ETH_SPEED_NUM_56G:
688 return ETH_LINK_SPEED_56G;
689 case ETH_SPEED_NUM_100G:
690 return ETH_LINK_SPEED_100G;
697 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
698 const struct rte_eth_conf *dev_conf)
700 struct rte_eth_dev *dev;
701 struct rte_eth_dev_info dev_info;
704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
706 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
708 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
709 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
713 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
715 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
716 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
720 dev = &rte_eth_devices[port_id];
722 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
723 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
725 if (dev->data->dev_started) {
727 "port %d must be stopped to allow configuration\n", port_id);
731 /* Copy the dev_conf parameter into the dev structure */
732 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
735 * Check that the numbers of RX and TX queues are not greater
736 * than the maximum number of RX and TX queues supported by the
739 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
741 if (nb_rx_q == 0 && nb_tx_q == 0) {
742 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
746 if (nb_rx_q > dev_info.max_rx_queues) {
747 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
748 port_id, nb_rx_q, dev_info.max_rx_queues);
752 if (nb_tx_q > dev_info.max_tx_queues) {
753 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
754 port_id, nb_tx_q, dev_info.max_tx_queues);
758 /* Check that the device supports requested interrupts */
759 if ((dev_conf->intr_conf.lsc == 1) &&
760 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
761 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
762 dev->device->driver->name);
765 if ((dev_conf->intr_conf.rmv == 1) &&
766 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
767 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
768 dev->device->driver->name);
773 * If jumbo frames are enabled, check that the maximum RX packet
774 * length is supported by the configured device.
776 if (dev_conf->rxmode.jumbo_frame == 1) {
777 if (dev_conf->rxmode.max_rx_pkt_len >
778 dev_info.max_rx_pktlen) {
779 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
780 " > max valid value %u\n",
782 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
783 (unsigned)dev_info.max_rx_pktlen);
785 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
786 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
787 " < min valid value %u\n",
789 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
790 (unsigned)ETHER_MIN_LEN);
794 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
795 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
796 /* Use default value */
797 dev->data->dev_conf.rxmode.max_rx_pkt_len =
802 * Setup new number of RX/TX queues and reconfigure device.
804 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
806 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
811 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
813 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
815 rte_eth_dev_rx_queue_config(dev, 0);
819 diag = (*dev->dev_ops->dev_configure)(dev);
821 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
823 rte_eth_dev_rx_queue_config(dev, 0);
824 rte_eth_dev_tx_queue_config(dev, 0);
832 _rte_eth_dev_reset(struct rte_eth_dev *dev)
834 if (dev->data->dev_started) {
836 "port %d must be stopped to allow reset\n",
841 rte_eth_dev_rx_queue_config(dev, 0);
842 rte_eth_dev_tx_queue_config(dev, 0);
844 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
848 rte_eth_dev_config_restore(uint8_t port_id)
850 struct rte_eth_dev *dev;
851 struct rte_eth_dev_info dev_info;
852 struct ether_addr *addr;
857 dev = &rte_eth_devices[port_id];
859 rte_eth_dev_info_get(port_id, &dev_info);
861 /* replay MAC address configuration including default MAC */
862 addr = &dev->data->mac_addrs[0];
863 if (*dev->dev_ops->mac_addr_set != NULL)
864 (*dev->dev_ops->mac_addr_set)(dev, addr);
865 else if (*dev->dev_ops->mac_addr_add != NULL)
866 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
868 if (*dev->dev_ops->mac_addr_add != NULL) {
869 for (i = 1; i < dev_info.max_mac_addrs; i++) {
870 addr = &dev->data->mac_addrs[i];
872 /* skip zero address */
873 if (is_zero_ether_addr(addr))
877 pool_mask = dev->data->mac_pool_sel[i];
880 if (pool_mask & 1ULL)
881 (*dev->dev_ops->mac_addr_add)(dev,
889 /* replay promiscuous configuration */
890 if (rte_eth_promiscuous_get(port_id) == 1)
891 rte_eth_promiscuous_enable(port_id);
892 else if (rte_eth_promiscuous_get(port_id) == 0)
893 rte_eth_promiscuous_disable(port_id);
895 /* replay all multicast configuration */
896 if (rte_eth_allmulticast_get(port_id) == 1)
897 rte_eth_allmulticast_enable(port_id);
898 else if (rte_eth_allmulticast_get(port_id) == 0)
899 rte_eth_allmulticast_disable(port_id);
903 rte_eth_dev_start(uint8_t port_id)
905 struct rte_eth_dev *dev;
908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
910 dev = &rte_eth_devices[port_id];
912 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
914 if (dev->data->dev_started != 0) {
915 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
916 " already started\n",
921 diag = (*dev->dev_ops->dev_start)(dev);
923 dev->data->dev_started = 1;
927 rte_eth_dev_config_restore(port_id);
929 if (dev->data->dev_conf.intr_conf.lsc == 0) {
930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
931 (*dev->dev_ops->link_update)(dev, 0);
937 rte_eth_dev_stop(uint8_t port_id)
939 struct rte_eth_dev *dev;
941 RTE_ETH_VALID_PORTID_OR_RET(port_id);
942 dev = &rte_eth_devices[port_id];
944 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
946 if (dev->data->dev_started == 0) {
947 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
948 " already stopped\n",
953 dev->data->dev_started = 0;
954 (*dev->dev_ops->dev_stop)(dev);
958 rte_eth_dev_set_link_up(uint8_t port_id)
960 struct rte_eth_dev *dev;
962 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
964 dev = &rte_eth_devices[port_id];
966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
967 return (*dev->dev_ops->dev_set_link_up)(dev);
971 rte_eth_dev_set_link_down(uint8_t port_id)
973 struct rte_eth_dev *dev;
975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
977 dev = &rte_eth_devices[port_id];
979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
980 return (*dev->dev_ops->dev_set_link_down)(dev);
984 rte_eth_dev_close(uint8_t port_id)
986 struct rte_eth_dev *dev;
988 RTE_ETH_VALID_PORTID_OR_RET(port_id);
989 dev = &rte_eth_devices[port_id];
991 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
992 dev->data->dev_started = 0;
993 (*dev->dev_ops->dev_close)(dev);
995 dev->data->nb_rx_queues = 0;
996 rte_free(dev->data->rx_queues);
997 dev->data->rx_queues = NULL;
998 dev->data->nb_tx_queues = 0;
999 rte_free(dev->data->tx_queues);
1000 dev->data->tx_queues = NULL;
1004 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1005 uint16_t nb_rx_desc, unsigned int socket_id,
1006 const struct rte_eth_rxconf *rx_conf,
1007 struct rte_mempool *mp)
1010 uint32_t mbp_buf_size;
1011 struct rte_eth_dev *dev;
1012 struct rte_eth_dev_info dev_info;
1015 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1017 dev = &rte_eth_devices[port_id];
1018 if (rx_queue_id >= dev->data->nb_rx_queues) {
1019 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1023 if (dev->data->dev_started) {
1024 RTE_PMD_DEBUG_TRACE(
1025 "port %d must be stopped to allow configuration\n", port_id);
1029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1033 * Check the size of the mbuf data buffer.
1034 * This value must be provided in the private data of the memory pool.
1035 * First check that the memory pool has a valid private data.
1037 rte_eth_dev_info_get(port_id, &dev_info);
1038 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1039 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1040 mp->name, (int) mp->private_data_size,
1041 (int) sizeof(struct rte_pktmbuf_pool_private));
1044 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1046 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1047 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1048 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1052 (int)(RTE_PKTMBUF_HEADROOM +
1053 dev_info.min_rx_bufsize),
1054 (int)RTE_PKTMBUF_HEADROOM,
1055 (int)dev_info.min_rx_bufsize);
1059 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1060 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1061 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1063 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1064 "should be: <= %hu, = %hu, and a product of %hu\n",
1066 dev_info.rx_desc_lim.nb_max,
1067 dev_info.rx_desc_lim.nb_min,
1068 dev_info.rx_desc_lim.nb_align);
1072 rxq = dev->data->rx_queues;
1073 if (rxq[rx_queue_id]) {
1074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1076 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1077 rxq[rx_queue_id] = NULL;
1080 if (rx_conf == NULL)
1081 rx_conf = &dev_info.default_rxconf;
1083 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1084 socket_id, rx_conf, mp);
1086 if (!dev->data->min_rx_buf_size ||
1087 dev->data->min_rx_buf_size > mbp_buf_size)
1088 dev->data->min_rx_buf_size = mbp_buf_size;
1095 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1096 uint16_t nb_tx_desc, unsigned int socket_id,
1097 const struct rte_eth_txconf *tx_conf)
1099 struct rte_eth_dev *dev;
1100 struct rte_eth_dev_info dev_info;
1103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1105 dev = &rte_eth_devices[port_id];
1106 if (tx_queue_id >= dev->data->nb_tx_queues) {
1107 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1111 if (dev->data->dev_started) {
1112 RTE_PMD_DEBUG_TRACE(
1113 "port %d must be stopped to allow configuration\n", port_id);
1117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1120 rte_eth_dev_info_get(port_id, &dev_info);
1122 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1123 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1124 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1125 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1126 "should be: <= %hu, = %hu, and a product of %hu\n",
1128 dev_info.tx_desc_lim.nb_max,
1129 dev_info.tx_desc_lim.nb_min,
1130 dev_info.tx_desc_lim.nb_align);
1134 txq = dev->data->tx_queues;
1135 if (txq[tx_queue_id]) {
1136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1138 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1139 txq[tx_queue_id] = NULL;
1142 if (tx_conf == NULL)
1143 tx_conf = &dev_info.default_txconf;
1145 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1146 socket_id, tx_conf);
1150 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1151 void *userdata __rte_unused)
1155 for (i = 0; i < unsent; i++)
1156 rte_pktmbuf_free(pkts[i]);
1160 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1163 uint64_t *count = userdata;
1166 for (i = 0; i < unsent; i++)
1167 rte_pktmbuf_free(pkts[i]);
1173 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1174 buffer_tx_error_fn cbfn, void *userdata)
1176 buffer->error_callback = cbfn;
1177 buffer->error_userdata = userdata;
1182 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1189 buffer->size = size;
1190 if (buffer->error_callback == NULL) {
1191 ret = rte_eth_tx_buffer_set_err_callback(
1192 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1199 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1201 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1203 /* Validate Input Data. Bail if not valid or not supported. */
1204 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1207 /* Call driver to free pending mbufs. */
1208 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1213 rte_eth_promiscuous_enable(uint8_t port_id)
1215 struct rte_eth_dev *dev;
1217 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1218 dev = &rte_eth_devices[port_id];
1220 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1221 (*dev->dev_ops->promiscuous_enable)(dev);
1222 dev->data->promiscuous = 1;
1226 rte_eth_promiscuous_disable(uint8_t port_id)
1228 struct rte_eth_dev *dev;
1230 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1231 dev = &rte_eth_devices[port_id];
1233 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1234 dev->data->promiscuous = 0;
1235 (*dev->dev_ops->promiscuous_disable)(dev);
1239 rte_eth_promiscuous_get(uint8_t port_id)
1241 struct rte_eth_dev *dev;
1243 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1245 dev = &rte_eth_devices[port_id];
1246 return dev->data->promiscuous;
1250 rte_eth_allmulticast_enable(uint8_t port_id)
1252 struct rte_eth_dev *dev;
1254 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1255 dev = &rte_eth_devices[port_id];
1257 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1258 (*dev->dev_ops->allmulticast_enable)(dev);
1259 dev->data->all_multicast = 1;
1263 rte_eth_allmulticast_disable(uint8_t port_id)
1265 struct rte_eth_dev *dev;
1267 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1268 dev = &rte_eth_devices[port_id];
1270 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1271 dev->data->all_multicast = 0;
1272 (*dev->dev_ops->allmulticast_disable)(dev);
1276 rte_eth_allmulticast_get(uint8_t port_id)
1278 struct rte_eth_dev *dev;
1280 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1282 dev = &rte_eth_devices[port_id];
1283 return dev->data->all_multicast;
1287 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1288 struct rte_eth_link *link)
1290 struct rte_eth_link *dst = link;
1291 struct rte_eth_link *src = &(dev->data->dev_link);
1293 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1294 *(uint64_t *)src) == 0)
1301 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1303 struct rte_eth_dev *dev;
1305 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1306 dev = &rte_eth_devices[port_id];
1308 if (dev->data->dev_conf.intr_conf.lsc != 0)
1309 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1311 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1312 (*dev->dev_ops->link_update)(dev, 1);
1313 *eth_link = dev->data->dev_link;
1318 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1320 struct rte_eth_dev *dev;
1322 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1323 dev = &rte_eth_devices[port_id];
1325 if (dev->data->dev_conf.intr_conf.lsc != 0)
1326 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1328 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1329 (*dev->dev_ops->link_update)(dev, 0);
1330 *eth_link = dev->data->dev_link;
1335 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1337 struct rte_eth_dev *dev;
1339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1341 dev = &rte_eth_devices[port_id];
1342 memset(stats, 0, sizeof(*stats));
1344 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1345 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1346 (*dev->dev_ops->stats_get)(dev, stats);
1351 rte_eth_stats_reset(uint8_t port_id)
1353 struct rte_eth_dev *dev;
1355 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1356 dev = &rte_eth_devices[port_id];
1358 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1359 (*dev->dev_ops->stats_reset)(dev);
1360 dev->data->rx_mbuf_alloc_failed = 0;
1364 get_xstats_count(uint8_t port_id)
1366 struct rte_eth_dev *dev;
1369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1370 dev = &rte_eth_devices[port_id];
1371 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1372 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1377 if (dev->dev_ops->xstats_get_names != NULL) {
1378 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1384 count += RTE_NB_STATS;
1385 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1387 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1393 rte_eth_xstats_get_id_by_name(uint8_t port_id, const char *xstat_name,
1396 int cnt_xstats, idx_xstat;
1398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1401 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1406 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1411 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1412 if (cnt_xstats < 0) {
1413 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1417 /* Get id-name lookup table */
1418 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1420 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1421 port_id, xstats_names, cnt_xstats, NULL)) {
1422 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1426 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1427 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1437 rte_eth_xstats_get_names_by_id(uint8_t port_id,
1438 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1441 /* Get all xstats */
1443 struct rte_eth_dev *dev;
1444 int cnt_used_entries;
1445 int cnt_expected_entries;
1446 int cnt_driver_entries;
1447 uint32_t idx, id_queue;
1450 cnt_expected_entries = get_xstats_count(port_id);
1451 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1452 (int)size < cnt_expected_entries)
1453 return cnt_expected_entries;
1455 /* port_id checked in get_xstats_count() */
1456 dev = &rte_eth_devices[port_id];
1457 cnt_used_entries = 0;
1459 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1460 snprintf(xstats_names[cnt_used_entries].name,
1461 sizeof(xstats_names[0].name),
1462 "%s", rte_stats_strings[idx].name);
1465 num_q = RTE_MIN(dev->data->nb_rx_queues,
1466 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1467 for (id_queue = 0; id_queue < num_q; id_queue++) {
1468 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1469 snprintf(xstats_names[cnt_used_entries].name,
1470 sizeof(xstats_names[0].name),
1473 rte_rxq_stats_strings[idx].name);
1478 num_q = RTE_MIN(dev->data->nb_tx_queues,
1479 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1480 for (id_queue = 0; id_queue < num_q; id_queue++) {
1481 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1482 snprintf(xstats_names[cnt_used_entries].name,
1483 sizeof(xstats_names[0].name),
1486 rte_txq_stats_strings[idx].name);
1491 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1492 /* If there are any driver-specific xstats, append them
1495 cnt_driver_entries =
1496 (*dev->dev_ops->xstats_get_names_by_id)(
1498 xstats_names + cnt_used_entries,
1500 size - cnt_used_entries);
1501 if (cnt_driver_entries < 0)
1502 return cnt_driver_entries;
1503 cnt_used_entries += cnt_driver_entries;
1505 } else if (dev->dev_ops->xstats_get_names != NULL) {
1506 /* If there are any driver-specific xstats, append them
1509 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1511 xstats_names + cnt_used_entries,
1512 size - cnt_used_entries);
1513 if (cnt_driver_entries < 0)
1514 return cnt_driver_entries;
1515 cnt_used_entries += cnt_driver_entries;
1518 return cnt_used_entries;
1520 /* Get only xstats given by IDS */
1523 struct rte_eth_xstat_name *xstats_names_copy;
1525 len = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1528 malloc(sizeof(struct rte_eth_xstat_name) * len);
1529 if (!xstats_names_copy) {
1530 RTE_PMD_DEBUG_TRACE(
1531 "ERROR: can't allocate memory for values_copy\n");
1532 free(xstats_names_copy);
1536 rte_eth_xstats_get_names_by_id(port_id, xstats_names_copy,
1539 for (i = 0; i < size; i++) {
1540 if (ids[i] >= len) {
1541 RTE_PMD_DEBUG_TRACE(
1542 "ERROR: id value isn't valid\n");
1545 strcpy(xstats_names[i].name,
1546 xstats_names_copy[ids[i]].name);
1548 free(xstats_names_copy);
1554 rte_eth_xstats_get_names(uint8_t port_id,
1555 struct rte_eth_xstat_name *xstats_names,
1558 struct rte_eth_dev *dev;
1559 int cnt_used_entries;
1560 int cnt_expected_entries;
1561 int cnt_driver_entries;
1562 uint32_t idx, id_queue;
1565 cnt_expected_entries = get_xstats_count(port_id);
1566 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1567 (int)size < cnt_expected_entries)
1568 return cnt_expected_entries;
1570 /* port_id checked in get_xstats_count() */
1571 dev = &rte_eth_devices[port_id];
1572 cnt_used_entries = 0;
1574 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1575 snprintf(xstats_names[cnt_used_entries].name,
1576 sizeof(xstats_names[0].name),
1577 "%s", rte_stats_strings[idx].name);
1580 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1581 for (id_queue = 0; id_queue < num_q; id_queue++) {
1582 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1583 snprintf(xstats_names[cnt_used_entries].name,
1584 sizeof(xstats_names[0].name),
1586 id_queue, rte_rxq_stats_strings[idx].name);
1591 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1592 for (id_queue = 0; id_queue < num_q; id_queue++) {
1593 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1594 snprintf(xstats_names[cnt_used_entries].name,
1595 sizeof(xstats_names[0].name),
1597 id_queue, rte_txq_stats_strings[idx].name);
1602 if (dev->dev_ops->xstats_get_names != NULL) {
1603 /* If there are any driver-specific xstats, append them
1606 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1608 xstats_names + cnt_used_entries,
1609 size - cnt_used_entries);
1610 if (cnt_driver_entries < 0)
1611 return cnt_driver_entries;
1612 cnt_used_entries += cnt_driver_entries;
1615 return cnt_used_entries;
1618 /* retrieve ethdev extended statistics */
1620 rte_eth_xstats_get_by_id(uint8_t port_id, const uint64_t *ids, uint64_t *values,
1623 /* If need all xstats */
1625 struct rte_eth_stats eth_stats;
1626 struct rte_eth_dev *dev;
1627 unsigned int count = 0, i, q;
1628 signed int xcount = 0;
1629 uint64_t val, *stats_ptr;
1630 uint16_t nb_rxqs, nb_txqs;
1632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1633 dev = &rte_eth_devices[port_id];
1635 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1636 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1637 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1638 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1640 /* Return generic statistics */
1641 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1642 (nb_txqs * RTE_NB_TXQ_STATS);
1645 /* implemented by the driver */
1646 if (dev->dev_ops->xstats_get_by_id != NULL) {
1647 /* Retrieve the xstats from the driver at the end of the
1648 * xstats struct. Retrieve all xstats.
1650 xcount = (*dev->dev_ops->xstats_get_by_id)(dev,
1652 values ? values + count : NULL,
1653 (n > count) ? n - count : 0);
1657 /* implemented by the driver */
1658 } else if (dev->dev_ops->xstats_get != NULL) {
1659 /* Retrieve the xstats from the driver at the end of the
1660 * xstats struct. Retrieve all xstats.
1661 * Compatibility for PMD without xstats_get_by_ids
1663 unsigned int size = (n > count) ? n - count : 1;
1664 struct rte_eth_xstat xstats[size];
1666 xcount = (*dev->dev_ops->xstats_get)(dev,
1667 values ? xstats : NULL, size);
1673 for (i = 0 ; i < (unsigned int)xcount; i++)
1674 values[i + count] = xstats[i].value;
1677 if (n < count + xcount || values == NULL)
1678 return count + xcount;
1680 /* now fill the xstats structure */
1682 rte_eth_stats_get(port_id, ð_stats);
1685 for (i = 0; i < RTE_NB_STATS; i++) {
1686 stats_ptr = RTE_PTR_ADD(ð_stats,
1687 rte_stats_strings[i].offset);
1689 values[count++] = val;
1693 for (q = 0; q < nb_rxqs; q++) {
1694 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1695 stats_ptr = RTE_PTR_ADD(ð_stats,
1696 rte_rxq_stats_strings[i].offset +
1697 q * sizeof(uint64_t));
1699 values[count++] = val;
1704 for (q = 0; q < nb_txqs; q++) {
1705 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1706 stats_ptr = RTE_PTR_ADD(ð_stats,
1707 rte_txq_stats_strings[i].offset +
1708 q * sizeof(uint64_t));
1710 values[count++] = val;
1714 return count + xcount;
1716 /* Need only xstats given by IDS array */
1719 uint64_t *values_copy;
1721 size = rte_eth_xstats_get_by_id(port_id, NULL, NULL, 0);
1723 values_copy = malloc(sizeof(*values_copy) * size);
1725 RTE_PMD_DEBUG_TRACE(
1726 "ERROR: can't allocate memory for values_copy\n");
1730 rte_eth_xstats_get_by_id(port_id, NULL, values_copy, size);
1732 for (i = 0; i < n; i++) {
1733 if (ids[i] >= size) {
1734 RTE_PMD_DEBUG_TRACE(
1735 "ERROR: id value isn't valid\n");
1738 values[i] = values_copy[ids[i]];
1746 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1749 struct rte_eth_stats eth_stats;
1750 struct rte_eth_dev *dev;
1751 unsigned int count = 0, i, q;
1752 signed int xcount = 0;
1753 uint64_t val, *stats_ptr;
1754 uint16_t nb_rxqs, nb_txqs;
1756 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1758 dev = &rte_eth_devices[port_id];
1760 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1761 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1763 /* Return generic statistics */
1764 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1765 (nb_txqs * RTE_NB_TXQ_STATS);
1767 /* implemented by the driver */
1768 if (dev->dev_ops->xstats_get != NULL) {
1769 /* Retrieve the xstats from the driver at the end of the
1772 xcount = (*dev->dev_ops->xstats_get)(dev,
1773 xstats ? xstats + count : NULL,
1774 (n > count) ? n - count : 0);
1780 if (n < count + xcount || xstats == NULL)
1781 return count + xcount;
1783 /* now fill the xstats structure */
1785 rte_eth_stats_get(port_id, ð_stats);
1788 for (i = 0; i < RTE_NB_STATS; i++) {
1789 stats_ptr = RTE_PTR_ADD(ð_stats,
1790 rte_stats_strings[i].offset);
1792 xstats[count++].value = val;
1796 for (q = 0; q < nb_rxqs; q++) {
1797 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1798 stats_ptr = RTE_PTR_ADD(ð_stats,
1799 rte_rxq_stats_strings[i].offset +
1800 q * sizeof(uint64_t));
1802 xstats[count++].value = val;
1807 for (q = 0; q < nb_txqs; q++) {
1808 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1809 stats_ptr = RTE_PTR_ADD(ð_stats,
1810 rte_txq_stats_strings[i].offset +
1811 q * sizeof(uint64_t));
1813 xstats[count++].value = val;
1817 for (i = 0; i < count; i++)
1819 /* add an offset to driver-specific stats */
1820 for ( ; i < count + xcount; i++)
1821 xstats[i].id += count;
1823 return count + xcount;
1826 /* reset ethdev extended statistics */
1828 rte_eth_xstats_reset(uint8_t port_id)
1830 struct rte_eth_dev *dev;
1832 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1833 dev = &rte_eth_devices[port_id];
1835 /* implemented by the driver */
1836 if (dev->dev_ops->xstats_reset != NULL) {
1837 (*dev->dev_ops->xstats_reset)(dev);
1841 /* fallback to default */
1842 rte_eth_stats_reset(port_id);
1846 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1849 struct rte_eth_dev *dev;
1851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1853 dev = &rte_eth_devices[port_id];
1855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1856 return (*dev->dev_ops->queue_stats_mapping_set)
1857 (dev, queue_id, stat_idx, is_rx);
1862 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1865 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1871 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1874 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1879 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1881 struct rte_eth_dev *dev;
1883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1884 dev = &rte_eth_devices[port_id];
1886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1887 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1891 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1893 struct rte_eth_dev *dev;
1894 const struct rte_eth_desc_lim lim = {
1895 .nb_max = UINT16_MAX,
1900 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1901 dev = &rte_eth_devices[port_id];
1903 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1904 dev_info->rx_desc_lim = lim;
1905 dev_info->tx_desc_lim = lim;
1907 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1908 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1909 dev_info->driver_name = dev->device->driver->name;
1910 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1911 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1915 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1916 uint32_t *ptypes, int num)
1919 struct rte_eth_dev *dev;
1920 const uint32_t *all_ptypes;
1922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1923 dev = &rte_eth_devices[port_id];
1924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1925 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1930 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1931 if (all_ptypes[i] & ptype_mask) {
1933 ptypes[j] = all_ptypes[i];
1941 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1943 struct rte_eth_dev *dev;
1945 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1946 dev = &rte_eth_devices[port_id];
1947 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1952 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1954 struct rte_eth_dev *dev;
1956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1958 dev = &rte_eth_devices[port_id];
1959 *mtu = dev->data->mtu;
1964 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1967 struct rte_eth_dev *dev;
1969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1970 dev = &rte_eth_devices[port_id];
1971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1973 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1975 dev->data->mtu = mtu;
1981 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1983 struct rte_eth_dev *dev;
1985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1986 dev = &rte_eth_devices[port_id];
1987 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1988 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1992 if (vlan_id > 4095) {
1993 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1994 port_id, (unsigned) vlan_id);
1997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1999 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2003 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
2005 struct rte_eth_dev *dev;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2008 dev = &rte_eth_devices[port_id];
2009 if (rx_queue_id >= dev->data->nb_rx_queues) {
2010 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2015 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2021 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
2022 enum rte_vlan_type vlan_type,
2025 struct rte_eth_dev *dev;
2027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2028 dev = &rte_eth_devices[port_id];
2029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2031 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2035 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
2037 struct rte_eth_dev *dev;
2042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2043 dev = &rte_eth_devices[port_id];
2045 /*check which option changed by application*/
2046 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2047 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
2049 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
2050 mask |= ETH_VLAN_STRIP_MASK;
2053 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2054 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
2056 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
2057 mask |= ETH_VLAN_FILTER_MASK;
2060 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2061 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
2063 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
2064 mask |= ETH_VLAN_EXTEND_MASK;
2071 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2072 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2078 rte_eth_dev_get_vlan_offload(uint8_t port_id)
2080 struct rte_eth_dev *dev;
2083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2084 dev = &rte_eth_devices[port_id];
2086 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
2087 ret |= ETH_VLAN_STRIP_OFFLOAD;
2089 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
2090 ret |= ETH_VLAN_FILTER_OFFLOAD;
2092 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
2093 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2099 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
2101 struct rte_eth_dev *dev;
2103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2104 dev = &rte_eth_devices[port_id];
2105 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2106 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2112 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2114 struct rte_eth_dev *dev;
2116 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2117 dev = &rte_eth_devices[port_id];
2118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2119 memset(fc_conf, 0, sizeof(*fc_conf));
2120 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2124 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2126 struct rte_eth_dev *dev;
2128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2129 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2130 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2134 dev = &rte_eth_devices[port_id];
2135 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2136 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2140 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
2142 struct rte_eth_dev *dev;
2144 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2145 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2146 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2150 dev = &rte_eth_devices[port_id];
2151 /* High water, low water validation are device specific */
2152 if (*dev->dev_ops->priority_flow_ctrl_set)
2153 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2158 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2166 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2167 for (i = 0; i < num; i++) {
2168 if (reta_conf[i].mask)
2176 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2180 uint16_t i, idx, shift;
2186 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2190 for (i = 0; i < reta_size; i++) {
2191 idx = i / RTE_RETA_GROUP_SIZE;
2192 shift = i % RTE_RETA_GROUP_SIZE;
2193 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2194 (reta_conf[idx].reta[shift] >= max_rxq)) {
2195 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2196 "the maximum rxq index: %u\n", idx, shift,
2197 reta_conf[idx].reta[shift], max_rxq);
2206 rte_eth_dev_rss_reta_update(uint8_t port_id,
2207 struct rte_eth_rss_reta_entry64 *reta_conf,
2210 struct rte_eth_dev *dev;
2213 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2214 /* Check mask bits */
2215 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2219 dev = &rte_eth_devices[port_id];
2221 /* Check entry value */
2222 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2223 dev->data->nb_rx_queues);
2227 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2228 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2232 rte_eth_dev_rss_reta_query(uint8_t port_id,
2233 struct rte_eth_rss_reta_entry64 *reta_conf,
2236 struct rte_eth_dev *dev;
2239 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2241 /* Check mask bits */
2242 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2246 dev = &rte_eth_devices[port_id];
2247 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2248 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2252 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2254 struct rte_eth_dev *dev;
2255 uint16_t rss_hash_protos;
2257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2258 rss_hash_protos = rss_conf->rss_hf;
2259 if ((rss_hash_protos != 0) &&
2260 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2261 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2265 dev = &rte_eth_devices[port_id];
2266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2267 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2271 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2272 struct rte_eth_rss_conf *rss_conf)
2274 struct rte_eth_dev *dev;
2276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2277 dev = &rte_eth_devices[port_id];
2278 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2279 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2283 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2284 struct rte_eth_udp_tunnel *udp_tunnel)
2286 struct rte_eth_dev *dev;
2288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2289 if (udp_tunnel == NULL) {
2290 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2294 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2295 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2299 dev = &rte_eth_devices[port_id];
2300 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2301 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2305 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2306 struct rte_eth_udp_tunnel *udp_tunnel)
2308 struct rte_eth_dev *dev;
2310 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2311 dev = &rte_eth_devices[port_id];
2313 if (udp_tunnel == NULL) {
2314 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2318 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2319 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2323 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2324 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2328 rte_eth_led_on(uint8_t port_id)
2330 struct rte_eth_dev *dev;
2332 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2333 dev = &rte_eth_devices[port_id];
2334 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2335 return (*dev->dev_ops->dev_led_on)(dev);
2339 rte_eth_led_off(uint8_t port_id)
2341 struct rte_eth_dev *dev;
2343 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2344 dev = &rte_eth_devices[port_id];
2345 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2346 return (*dev->dev_ops->dev_led_off)(dev);
2350 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2354 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2356 struct rte_eth_dev_info dev_info;
2357 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2360 rte_eth_dev_info_get(port_id, &dev_info);
2362 for (i = 0; i < dev_info.max_mac_addrs; i++)
2363 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2369 static const struct ether_addr null_mac_addr;
2372 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2375 struct rte_eth_dev *dev;
2380 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2381 dev = &rte_eth_devices[port_id];
2382 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2384 if (is_zero_ether_addr(addr)) {
2385 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2389 if (pool >= ETH_64_POOLS) {
2390 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2394 index = get_mac_addr_index(port_id, addr);
2396 index = get_mac_addr_index(port_id, &null_mac_addr);
2398 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2403 pool_mask = dev->data->mac_pool_sel[index];
2405 /* Check if both MAC address and pool is already there, and do nothing */
2406 if (pool_mask & (1ULL << pool))
2411 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2414 /* Update address in NIC data structure */
2415 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2417 /* Update pool bitmap in NIC data structure */
2418 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2425 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2427 struct rte_eth_dev *dev;
2430 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2431 dev = &rte_eth_devices[port_id];
2432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2434 index = get_mac_addr_index(port_id, addr);
2436 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2438 } else if (index < 0)
2439 return 0; /* Do nothing if address wasn't found */
2442 (*dev->dev_ops->mac_addr_remove)(dev, index);
2444 /* Update address in NIC data structure */
2445 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2447 /* reset pool bitmap */
2448 dev->data->mac_pool_sel[index] = 0;
2454 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2456 struct rte_eth_dev *dev;
2458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 if (!is_valid_assigned_ether_addr(addr))
2463 dev = &rte_eth_devices[port_id];
2464 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2466 /* Update default address in NIC data structure */
2467 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2469 (*dev->dev_ops->mac_addr_set)(dev, addr);
2476 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2480 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2482 struct rte_eth_dev_info dev_info;
2483 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2486 rte_eth_dev_info_get(port_id, &dev_info);
2487 if (!dev->data->hash_mac_addrs)
2490 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2491 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2492 ETHER_ADDR_LEN) == 0)
2499 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2504 struct rte_eth_dev *dev;
2506 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2508 dev = &rte_eth_devices[port_id];
2509 if (is_zero_ether_addr(addr)) {
2510 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2515 index = get_hash_mac_addr_index(port_id, addr);
2516 /* Check if it's already there, and do nothing */
2517 if ((index >= 0) && (on))
2522 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2523 "set in UTA\n", port_id);
2527 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2529 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2536 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2538 /* Update address in NIC data structure */
2540 ether_addr_copy(addr,
2541 &dev->data->hash_mac_addrs[index]);
2543 ether_addr_copy(&null_mac_addr,
2544 &dev->data->hash_mac_addrs[index]);
2551 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2553 struct rte_eth_dev *dev;
2555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2557 dev = &rte_eth_devices[port_id];
2559 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2560 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2563 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2566 struct rte_eth_dev *dev;
2567 struct rte_eth_dev_info dev_info;
2568 struct rte_eth_link link;
2570 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2572 dev = &rte_eth_devices[port_id];
2573 rte_eth_dev_info_get(port_id, &dev_info);
2574 link = dev->data->dev_link;
2576 if (queue_idx > dev_info.max_tx_queues) {
2577 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2578 "invalid queue id=%d\n", port_id, queue_idx);
2582 if (tx_rate > link.link_speed) {
2583 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2584 "bigger than link speed= %d\n",
2585 tx_rate, link.link_speed);
2589 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2590 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2594 rte_eth_mirror_rule_set(uint8_t port_id,
2595 struct rte_eth_mirror_conf *mirror_conf,
2596 uint8_t rule_id, uint8_t on)
2598 struct rte_eth_dev *dev;
2600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2601 if (mirror_conf->rule_type == 0) {
2602 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2606 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2607 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2612 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2613 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2614 (mirror_conf->pool_mask == 0)) {
2615 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2619 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2620 mirror_conf->vlan.vlan_mask == 0) {
2621 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2625 dev = &rte_eth_devices[port_id];
2626 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2628 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2632 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2634 struct rte_eth_dev *dev;
2636 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2638 dev = &rte_eth_devices[port_id];
2639 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2641 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2645 rte_eth_dev_callback_register(uint8_t port_id,
2646 enum rte_eth_event_type event,
2647 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2649 struct rte_eth_dev *dev;
2650 struct rte_eth_dev_callback *user_cb;
2655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2657 dev = &rte_eth_devices[port_id];
2658 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2660 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2661 if (user_cb->cb_fn == cb_fn &&
2662 user_cb->cb_arg == cb_arg &&
2663 user_cb->event == event) {
2668 /* create a new callback. */
2669 if (user_cb == NULL) {
2670 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2671 sizeof(struct rte_eth_dev_callback), 0);
2672 if (user_cb != NULL) {
2673 user_cb->cb_fn = cb_fn;
2674 user_cb->cb_arg = cb_arg;
2675 user_cb->event = event;
2676 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2680 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2681 return (user_cb == NULL) ? -ENOMEM : 0;
2685 rte_eth_dev_callback_unregister(uint8_t port_id,
2686 enum rte_eth_event_type event,
2687 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2690 struct rte_eth_dev *dev;
2691 struct rte_eth_dev_callback *cb, *next;
2696 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2698 dev = &rte_eth_devices[port_id];
2699 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2702 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2704 next = TAILQ_NEXT(cb, next);
2706 if (cb->cb_fn != cb_fn || cb->event != event ||
2707 (cb->cb_arg != (void *)-1 &&
2708 cb->cb_arg != cb_arg))
2712 * if this callback is not executing right now,
2715 if (cb->active == 0) {
2716 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2723 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2728 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2729 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2731 struct rte_eth_dev_callback *cb_lst;
2732 struct rte_eth_dev_callback dev_cb;
2735 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2736 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2737 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2742 dev_cb.cb_arg = cb_arg;
2743 if (ret_param != NULL)
2744 dev_cb.ret_param = ret_param;
2746 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2747 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2748 dev_cb.cb_arg, dev_cb.ret_param);
2749 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2752 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2757 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2760 struct rte_eth_dev *dev;
2761 struct rte_intr_handle *intr_handle;
2765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2767 dev = &rte_eth_devices[port_id];
2769 if (!dev->intr_handle) {
2770 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2774 intr_handle = dev->intr_handle;
2775 if (!intr_handle->intr_vec) {
2776 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2780 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2781 vec = intr_handle->intr_vec[qid];
2782 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2783 if (rc && rc != -EEXIST) {
2784 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2785 " op %d epfd %d vec %u\n",
2786 port_id, qid, op, epfd, vec);
2793 const struct rte_memzone *
2794 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2795 uint16_t queue_id, size_t size, unsigned align,
2798 char z_name[RTE_MEMZONE_NAMESIZE];
2799 const struct rte_memzone *mz;
2801 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2802 dev->device->driver->name, ring_name,
2803 dev->data->port_id, queue_id);
2805 mz = rte_memzone_lookup(z_name);
2809 if (rte_xen_dom0_supported())
2810 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2811 0, align, RTE_PGSIZE_2M);
2813 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2818 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2819 int epfd, int op, void *data)
2822 struct rte_eth_dev *dev;
2823 struct rte_intr_handle *intr_handle;
2826 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2828 dev = &rte_eth_devices[port_id];
2829 if (queue_id >= dev->data->nb_rx_queues) {
2830 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2834 if (!dev->intr_handle) {
2835 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2839 intr_handle = dev->intr_handle;
2840 if (!intr_handle->intr_vec) {
2841 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2845 vec = intr_handle->intr_vec[queue_id];
2846 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2847 if (rc && rc != -EEXIST) {
2848 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2849 " op %d epfd %d vec %u\n",
2850 port_id, queue_id, op, epfd, vec);
2858 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2861 struct rte_eth_dev *dev;
2863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2865 dev = &rte_eth_devices[port_id];
2867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2868 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2872 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2875 struct rte_eth_dev *dev;
2877 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2879 dev = &rte_eth_devices[port_id];
2881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2882 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2887 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2889 struct rte_eth_dev *dev;
2891 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2893 dev = &rte_eth_devices[port_id];
2894 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2895 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2896 RTE_ETH_FILTER_NOP, NULL);
2900 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2901 enum rte_filter_op filter_op, void *arg)
2903 struct rte_eth_dev *dev;
2905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2907 dev = &rte_eth_devices[port_id];
2908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2909 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2913 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2914 rte_rx_callback_fn fn, void *user_param)
2916 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2917 rte_errno = ENOTSUP;
2920 /* check input parameters */
2921 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2922 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2926 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2934 cb->param = user_param;
2936 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2937 /* Add the callbacks in fifo order. */
2938 struct rte_eth_rxtx_callback *tail =
2939 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2942 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2949 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2955 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2956 rte_rx_callback_fn fn, void *user_param)
2958 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2959 rte_errno = ENOTSUP;
2962 /* check input parameters */
2963 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2964 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2969 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2977 cb->param = user_param;
2979 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2980 /* Add the callbacks at fisrt position*/
2981 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2983 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2984 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2990 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2991 rte_tx_callback_fn fn, void *user_param)
2993 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2994 rte_errno = ENOTSUP;
2997 /* check input parameters */
2998 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2999 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3004 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3012 cb->param = user_param;
3014 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3015 /* Add the callbacks in fifo order. */
3016 struct rte_eth_rxtx_callback *tail =
3017 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3020 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3027 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3033 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3034 struct rte_eth_rxtx_callback *user_cb)
3036 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3039 /* Check input parameters. */
3040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3041 if (user_cb == NULL ||
3042 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3045 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3046 struct rte_eth_rxtx_callback *cb;
3047 struct rte_eth_rxtx_callback **prev_cb;
3050 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3051 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3052 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3054 if (cb == user_cb) {
3055 /* Remove the user cb from the callback list. */
3056 *prev_cb = cb->next;
3061 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3067 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3068 struct rte_eth_rxtx_callback *user_cb)
3070 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3073 /* Check input parameters. */
3074 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3075 if (user_cb == NULL ||
3076 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3079 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3081 struct rte_eth_rxtx_callback *cb;
3082 struct rte_eth_rxtx_callback **prev_cb;
3084 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3085 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3086 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3088 if (cb == user_cb) {
3089 /* Remove the user cb from the callback list. */
3090 *prev_cb = cb->next;
3095 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3101 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3102 struct rte_eth_rxq_info *qinfo)
3104 struct rte_eth_dev *dev;
3106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3111 dev = &rte_eth_devices[port_id];
3112 if (queue_id >= dev->data->nb_rx_queues) {
3113 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3119 memset(qinfo, 0, sizeof(*qinfo));
3120 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3125 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3126 struct rte_eth_txq_info *qinfo)
3128 struct rte_eth_dev *dev;
3130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3135 dev = &rte_eth_devices[port_id];
3136 if (queue_id >= dev->data->nb_tx_queues) {
3137 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3141 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3143 memset(qinfo, 0, sizeof(*qinfo));
3144 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3149 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3150 struct ether_addr *mc_addr_set,
3151 uint32_t nb_mc_addr)
3153 struct rte_eth_dev *dev;
3155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3157 dev = &rte_eth_devices[port_id];
3158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3159 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3163 rte_eth_timesync_enable(uint8_t port_id)
3165 struct rte_eth_dev *dev;
3167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3168 dev = &rte_eth_devices[port_id];
3170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3171 return (*dev->dev_ops->timesync_enable)(dev);
3175 rte_eth_timesync_disable(uint8_t port_id)
3177 struct rte_eth_dev *dev;
3179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3180 dev = &rte_eth_devices[port_id];
3182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3183 return (*dev->dev_ops->timesync_disable)(dev);
3187 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3190 struct rte_eth_dev *dev;
3192 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3193 dev = &rte_eth_devices[port_id];
3195 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3196 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3200 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3202 struct rte_eth_dev *dev;
3204 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3205 dev = &rte_eth_devices[port_id];
3207 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3208 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3212 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3214 struct rte_eth_dev *dev;
3216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3217 dev = &rte_eth_devices[port_id];
3219 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3220 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3224 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3226 struct rte_eth_dev *dev;
3228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3229 dev = &rte_eth_devices[port_id];
3231 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3232 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3236 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3238 struct rte_eth_dev *dev;
3240 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3241 dev = &rte_eth_devices[port_id];
3243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3244 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3248 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3250 struct rte_eth_dev *dev;
3252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3254 dev = &rte_eth_devices[port_id];
3255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3256 return (*dev->dev_ops->get_reg)(dev, info);
3260 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3262 struct rte_eth_dev *dev;
3264 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3266 dev = &rte_eth_devices[port_id];
3267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3268 return (*dev->dev_ops->get_eeprom_length)(dev);
3272 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3274 struct rte_eth_dev *dev;
3276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3278 dev = &rte_eth_devices[port_id];
3279 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3280 return (*dev->dev_ops->get_eeprom)(dev, info);
3284 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3286 struct rte_eth_dev *dev;
3288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3290 dev = &rte_eth_devices[port_id];
3291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3292 return (*dev->dev_ops->set_eeprom)(dev, info);
3296 rte_eth_dev_get_dcb_info(uint8_t port_id,
3297 struct rte_eth_dcb_info *dcb_info)
3299 struct rte_eth_dev *dev;
3301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3303 dev = &rte_eth_devices[port_id];
3304 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3307 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3311 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3312 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3314 struct rte_eth_dev *dev;
3316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3317 if (l2_tunnel == NULL) {
3318 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3322 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3323 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3327 dev = &rte_eth_devices[port_id];
3328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3330 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3334 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3335 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3339 struct rte_eth_dev *dev;
3341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3343 if (l2_tunnel == NULL) {
3344 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3348 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3349 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3354 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3358 dev = &rte_eth_devices[port_id];
3359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3361 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);