4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
142 rte_eth_dev_data_alloc(void)
144 const unsigned flags = 0;
145 const struct rte_memzone *mz;
147 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
148 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
149 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
150 rte_socket_id(), flags);
152 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
154 rte_panic("Cannot allocate memzone for ethernet port data\n");
156 rte_eth_dev_data = mz->addr;
157 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
158 memset(rte_eth_dev_data, 0,
159 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
163 rte_eth_dev_allocated(const char *name)
167 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
168 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
169 strcmp(rte_eth_devices[i].data->name, name) == 0)
170 return &rte_eth_devices[i];
176 rte_eth_dev_find_free_port(void)
180 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
181 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
184 return RTE_MAX_ETHPORTS;
187 static struct rte_eth_dev *
188 eth_dev_get(uint8_t port_id)
190 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
192 eth_dev->data = &rte_eth_dev_data[port_id];
193 eth_dev->state = RTE_ETH_DEV_ATTACHED;
194 TAILQ_INIT(&(eth_dev->link_intr_cbs));
196 eth_dev_last_created_port = port_id;
203 rte_eth_dev_allocate(const char *name)
206 struct rte_eth_dev *eth_dev;
208 port_id = rte_eth_dev_find_free_port();
209 if (port_id == RTE_MAX_ETHPORTS) {
210 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
214 if (rte_eth_dev_data == NULL)
215 rte_eth_dev_data_alloc();
217 if (rte_eth_dev_allocated(name) != NULL) {
218 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
223 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
224 eth_dev = eth_dev_get(port_id);
225 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
226 eth_dev->data->port_id = port_id;
227 eth_dev->data->mtu = ETHER_MTU;
233 * Attach to a port already registered by the primary process, which
234 * makes sure that the same device would have the same port id both
235 * in the primary and secondary process.
237 static struct rte_eth_dev *
238 eth_dev_attach_secondary(const char *name)
241 struct rte_eth_dev *eth_dev;
243 if (rte_eth_dev_data == NULL)
244 rte_eth_dev_data_alloc();
246 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
247 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
250 if (i == RTE_MAX_ETHPORTS) {
252 "device %s is not driven by the primary process\n",
257 eth_dev = eth_dev_get(i);
258 RTE_ASSERT(eth_dev->data->port_id == i);
264 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
269 eth_dev->state = RTE_ETH_DEV_UNUSED;
275 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
276 struct rte_pci_device *pci_dev)
278 struct eth_driver *eth_drv;
279 struct rte_eth_dev *eth_dev;
280 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
284 eth_drv = (struct eth_driver *)pci_drv;
286 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
287 sizeof(ethdev_name));
289 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
290 eth_dev = rte_eth_dev_allocate(ethdev_name);
294 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
295 eth_drv->dev_private_size,
296 RTE_CACHE_LINE_SIZE);
297 if (eth_dev->data->dev_private == NULL)
298 rte_panic("Cannot allocate memzone for private port data\n");
300 eth_dev = eth_dev_attach_secondary(ethdev_name);
301 if (eth_dev == NULL) {
303 * if we failed to attach a device, it means the
304 * device is skipped in primary process, due to
305 * some errors. If so, we return a positive value,
306 * to let EAL skip it for the secondary process
312 eth_dev->device = &pci_dev->device;
313 eth_dev->intr_handle = &pci_dev->intr_handle;
314 eth_dev->driver = eth_drv;
316 /* Invoke PMD device initialization function */
317 diag = (*eth_drv->eth_dev_init)(eth_dev);
321 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
322 pci_drv->driver.name,
323 (unsigned) pci_dev->id.vendor_id,
324 (unsigned) pci_dev->id.device_id);
325 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
326 rte_free(eth_dev->data->dev_private);
327 rte_eth_dev_release_port(eth_dev);
332 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
334 const struct eth_driver *eth_drv;
335 struct rte_eth_dev *eth_dev;
336 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
342 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
343 sizeof(ethdev_name));
345 eth_dev = rte_eth_dev_allocated(ethdev_name);
349 eth_drv = (const struct eth_driver *)pci_dev->driver;
351 /* Invoke PMD device uninit function */
352 if (*eth_drv->eth_dev_uninit) {
353 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
358 /* free ether device */
359 rte_eth_dev_release_port(eth_dev);
361 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
362 rte_free(eth_dev->data->dev_private);
364 eth_dev->device = NULL;
365 eth_dev->driver = NULL;
366 eth_dev->data = NULL;
372 rte_eth_dev_is_valid_port(uint8_t port_id)
374 if (port_id >= RTE_MAX_ETHPORTS ||
375 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
382 rte_eth_dev_socket_id(uint8_t port_id)
384 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
385 return rte_eth_devices[port_id].data->numa_node;
389 rte_eth_dev_count(void)
395 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
399 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
402 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
406 /* shouldn't check 'rte_eth_devices[i].data',
407 * because it might be overwritten by VDEV PMD */
408 tmp = rte_eth_dev_data[port_id].name;
414 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
419 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
426 *port_id = RTE_MAX_ETHPORTS;
428 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
431 rte_eth_dev_data[i].name, strlen(name))) {
442 rte_eth_dev_is_detachable(uint8_t port_id)
446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
448 switch (rte_eth_devices[port_id].data->kdrv) {
449 case RTE_KDRV_IGB_UIO:
450 case RTE_KDRV_UIO_GENERIC:
451 case RTE_KDRV_NIC_UIO:
458 dev_flags = rte_eth_devices[port_id].data->dev_flags;
459 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
460 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
466 /* attach the new device, then store port_id of the device */
468 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
471 int current = rte_eth_dev_count();
475 if ((devargs == NULL) || (port_id == NULL)) {
480 /* parse devargs, then retrieve device name and args */
481 if (rte_eal_parse_devargs_str(devargs, &name, &args))
484 ret = rte_eal_dev_attach(name, args);
488 /* no point looking at the port count if no port exists */
489 if (!rte_eth_dev_count()) {
490 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
495 /* if nothing happened, there is a bug here, since some driver told us
496 * it did attach a device, but did not create a port.
498 if (current == rte_eth_dev_count()) {
503 *port_id = eth_dev_last_created_port;
512 /* detach the device, then store the name of the device */
514 rte_eth_dev_detach(uint8_t port_id, char *name)
523 /* FIXME: move this to eal, once device flags are relocated there */
524 if (rte_eth_dev_is_detachable(port_id))
527 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
528 "%s", rte_eth_devices[port_id].data->name);
529 ret = rte_eal_dev_detach(name);
540 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
542 uint16_t old_nb_queues = dev->data->nb_rx_queues;
546 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
547 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
548 sizeof(dev->data->rx_queues[0]) * nb_queues,
549 RTE_CACHE_LINE_SIZE);
550 if (dev->data->rx_queues == NULL) {
551 dev->data->nb_rx_queues = 0;
554 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
557 rxq = dev->data->rx_queues;
559 for (i = nb_queues; i < old_nb_queues; i++)
560 (*dev->dev_ops->rx_queue_release)(rxq[i]);
561 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
562 RTE_CACHE_LINE_SIZE);
565 if (nb_queues > old_nb_queues) {
566 uint16_t new_qs = nb_queues - old_nb_queues;
568 memset(rxq + old_nb_queues, 0,
569 sizeof(rxq[0]) * new_qs);
572 dev->data->rx_queues = rxq;
574 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
577 rxq = dev->data->rx_queues;
579 for (i = nb_queues; i < old_nb_queues; i++)
580 (*dev->dev_ops->rx_queue_release)(rxq[i]);
582 rte_free(dev->data->rx_queues);
583 dev->data->rx_queues = NULL;
585 dev->data->nb_rx_queues = nb_queues;
590 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
592 struct rte_eth_dev *dev;
594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
596 dev = &rte_eth_devices[port_id];
597 if (rx_queue_id >= dev->data->nb_rx_queues) {
598 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
604 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
605 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
606 " already started\n",
607 rx_queue_id, port_id);
611 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
616 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
618 struct rte_eth_dev *dev;
620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
622 dev = &rte_eth_devices[port_id];
623 if (rx_queue_id >= dev->data->nb_rx_queues) {
624 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
628 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
630 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
631 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
632 " already stopped\n",
633 rx_queue_id, port_id);
637 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
642 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
644 struct rte_eth_dev *dev;
646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
648 dev = &rte_eth_devices[port_id];
649 if (tx_queue_id >= dev->data->nb_tx_queues) {
650 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
656 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
657 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
658 " already started\n",
659 tx_queue_id, port_id);
663 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
668 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
670 struct rte_eth_dev *dev;
672 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
674 dev = &rte_eth_devices[port_id];
675 if (tx_queue_id >= dev->data->nb_tx_queues) {
676 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
680 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
682 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
683 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
684 " already stopped\n",
685 tx_queue_id, port_id);
689 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
694 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
696 uint16_t old_nb_queues = dev->data->nb_tx_queues;
700 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
701 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
702 sizeof(dev->data->tx_queues[0]) * nb_queues,
703 RTE_CACHE_LINE_SIZE);
704 if (dev->data->tx_queues == NULL) {
705 dev->data->nb_tx_queues = 0;
708 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
709 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
711 txq = dev->data->tx_queues;
713 for (i = nb_queues; i < old_nb_queues; i++)
714 (*dev->dev_ops->tx_queue_release)(txq[i]);
715 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
716 RTE_CACHE_LINE_SIZE);
719 if (nb_queues > old_nb_queues) {
720 uint16_t new_qs = nb_queues - old_nb_queues;
722 memset(txq + old_nb_queues, 0,
723 sizeof(txq[0]) * new_qs);
726 dev->data->tx_queues = txq;
728 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
729 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
731 txq = dev->data->tx_queues;
733 for (i = nb_queues; i < old_nb_queues; i++)
734 (*dev->dev_ops->tx_queue_release)(txq[i]);
736 rte_free(dev->data->tx_queues);
737 dev->data->tx_queues = NULL;
739 dev->data->nb_tx_queues = nb_queues;
744 rte_eth_speed_bitflag(uint32_t speed, int duplex)
747 case ETH_SPEED_NUM_10M:
748 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
749 case ETH_SPEED_NUM_100M:
750 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
751 case ETH_SPEED_NUM_1G:
752 return ETH_LINK_SPEED_1G;
753 case ETH_SPEED_NUM_2_5G:
754 return ETH_LINK_SPEED_2_5G;
755 case ETH_SPEED_NUM_5G:
756 return ETH_LINK_SPEED_5G;
757 case ETH_SPEED_NUM_10G:
758 return ETH_LINK_SPEED_10G;
759 case ETH_SPEED_NUM_20G:
760 return ETH_LINK_SPEED_20G;
761 case ETH_SPEED_NUM_25G:
762 return ETH_LINK_SPEED_25G;
763 case ETH_SPEED_NUM_40G:
764 return ETH_LINK_SPEED_40G;
765 case ETH_SPEED_NUM_50G:
766 return ETH_LINK_SPEED_50G;
767 case ETH_SPEED_NUM_56G:
768 return ETH_LINK_SPEED_56G;
769 case ETH_SPEED_NUM_100G:
770 return ETH_LINK_SPEED_100G;
777 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
778 const struct rte_eth_conf *dev_conf)
780 struct rte_eth_dev *dev;
781 struct rte_eth_dev_info dev_info;
784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
786 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
788 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
789 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
793 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
795 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
796 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
800 dev = &rte_eth_devices[port_id];
802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
805 if (dev->data->dev_started) {
807 "port %d must be stopped to allow configuration\n", port_id);
811 /* Copy the dev_conf parameter into the dev structure */
812 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
815 * Check that the numbers of RX and TX queues are not greater
816 * than the maximum number of RX and TX queues supported by the
819 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
821 if (nb_rx_q == 0 && nb_tx_q == 0) {
822 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
826 if (nb_rx_q > dev_info.max_rx_queues) {
827 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
828 port_id, nb_rx_q, dev_info.max_rx_queues);
832 if (nb_tx_q > dev_info.max_tx_queues) {
833 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
834 port_id, nb_tx_q, dev_info.max_tx_queues);
839 * If link state interrupt is enabled, check that the
840 * device supports it.
842 if ((dev_conf->intr_conf.lsc == 1) &&
843 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
844 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
845 dev->data->drv_name);
850 * If jumbo frames are enabled, check that the maximum RX packet
851 * length is supported by the configured device.
853 if (dev_conf->rxmode.jumbo_frame == 1) {
854 if (dev_conf->rxmode.max_rx_pkt_len >
855 dev_info.max_rx_pktlen) {
856 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
857 " > max valid value %u\n",
859 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
860 (unsigned)dev_info.max_rx_pktlen);
862 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
863 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
864 " < min valid value %u\n",
866 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
867 (unsigned)ETHER_MIN_LEN);
871 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
872 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
873 /* Use default value */
874 dev->data->dev_conf.rxmode.max_rx_pkt_len =
879 * Setup new number of RX/TX queues and reconfigure device.
881 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
883 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
888 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
890 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
892 rte_eth_dev_rx_queue_config(dev, 0);
896 diag = (*dev->dev_ops->dev_configure)(dev);
898 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
900 rte_eth_dev_rx_queue_config(dev, 0);
901 rte_eth_dev_tx_queue_config(dev, 0);
909 _rte_eth_dev_reset(struct rte_eth_dev *dev)
911 if (dev->data->dev_started) {
913 "port %d must be stopped to allow reset\n",
918 rte_eth_dev_rx_queue_config(dev, 0);
919 rte_eth_dev_tx_queue_config(dev, 0);
921 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
925 rte_eth_dev_config_restore(uint8_t port_id)
927 struct rte_eth_dev *dev;
928 struct rte_eth_dev_info dev_info;
929 struct ether_addr *addr;
934 dev = &rte_eth_devices[port_id];
936 rte_eth_dev_info_get(port_id, &dev_info);
938 /* replay MAC address configuration including default MAC */
939 addr = &dev->data->mac_addrs[0];
940 if (*dev->dev_ops->mac_addr_set != NULL)
941 (*dev->dev_ops->mac_addr_set)(dev, addr);
942 else if (*dev->dev_ops->mac_addr_add != NULL)
943 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
945 if (*dev->dev_ops->mac_addr_add != NULL) {
946 for (i = 1; i < dev_info.max_mac_addrs; i++) {
947 addr = &dev->data->mac_addrs[i];
949 /* skip zero address */
950 if (is_zero_ether_addr(addr))
954 pool_mask = dev->data->mac_pool_sel[i];
957 if (pool_mask & 1ULL)
958 (*dev->dev_ops->mac_addr_add)(dev,
966 /* replay promiscuous configuration */
967 if (rte_eth_promiscuous_get(port_id) == 1)
968 rte_eth_promiscuous_enable(port_id);
969 else if (rte_eth_promiscuous_get(port_id) == 0)
970 rte_eth_promiscuous_disable(port_id);
972 /* replay all multicast configuration */
973 if (rte_eth_allmulticast_get(port_id) == 1)
974 rte_eth_allmulticast_enable(port_id);
975 else if (rte_eth_allmulticast_get(port_id) == 0)
976 rte_eth_allmulticast_disable(port_id);
980 rte_eth_dev_start(uint8_t port_id)
982 struct rte_eth_dev *dev;
985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
987 dev = &rte_eth_devices[port_id];
989 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
991 if (dev->data->dev_started != 0) {
992 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
993 " already started\n",
998 diag = (*dev->dev_ops->dev_start)(dev);
1000 dev->data->dev_started = 1;
1004 rte_eth_dev_config_restore(port_id);
1006 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1008 (*dev->dev_ops->link_update)(dev, 0);
1014 rte_eth_dev_stop(uint8_t port_id)
1016 struct rte_eth_dev *dev;
1018 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1019 dev = &rte_eth_devices[port_id];
1021 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1023 if (dev->data->dev_started == 0) {
1024 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1025 " already stopped\n",
1030 dev->data->dev_started = 0;
1031 (*dev->dev_ops->dev_stop)(dev);
1035 rte_eth_dev_set_link_up(uint8_t port_id)
1037 struct rte_eth_dev *dev;
1039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1041 dev = &rte_eth_devices[port_id];
1043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1044 return (*dev->dev_ops->dev_set_link_up)(dev);
1048 rte_eth_dev_set_link_down(uint8_t port_id)
1050 struct rte_eth_dev *dev;
1052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1054 dev = &rte_eth_devices[port_id];
1056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1057 return (*dev->dev_ops->dev_set_link_down)(dev);
1061 rte_eth_dev_close(uint8_t port_id)
1063 struct rte_eth_dev *dev;
1065 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1066 dev = &rte_eth_devices[port_id];
1068 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1069 dev->data->dev_started = 0;
1070 (*dev->dev_ops->dev_close)(dev);
1072 rte_free(dev->data->rx_queues);
1073 dev->data->rx_queues = NULL;
1074 rte_free(dev->data->tx_queues);
1075 dev->data->tx_queues = NULL;
1079 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1080 uint16_t nb_rx_desc, unsigned int socket_id,
1081 const struct rte_eth_rxconf *rx_conf,
1082 struct rte_mempool *mp)
1085 uint32_t mbp_buf_size;
1086 struct rte_eth_dev *dev;
1087 struct rte_eth_dev_info dev_info;
1090 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1092 dev = &rte_eth_devices[port_id];
1093 if (rx_queue_id >= dev->data->nb_rx_queues) {
1094 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1098 if (dev->data->dev_started) {
1099 RTE_PMD_DEBUG_TRACE(
1100 "port %d must be stopped to allow configuration\n", port_id);
1104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1105 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1108 * Check the size of the mbuf data buffer.
1109 * This value must be provided in the private data of the memory pool.
1110 * First check that the memory pool has a valid private data.
1112 rte_eth_dev_info_get(port_id, &dev_info);
1113 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1114 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1115 mp->name, (int) mp->private_data_size,
1116 (int) sizeof(struct rte_pktmbuf_pool_private));
1119 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1121 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1122 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1123 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1127 (int)(RTE_PKTMBUF_HEADROOM +
1128 dev_info.min_rx_bufsize),
1129 (int)RTE_PKTMBUF_HEADROOM,
1130 (int)dev_info.min_rx_bufsize);
1134 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1135 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1136 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1138 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1139 "should be: <= %hu, = %hu, and a product of %hu\n",
1141 dev_info.rx_desc_lim.nb_max,
1142 dev_info.rx_desc_lim.nb_min,
1143 dev_info.rx_desc_lim.nb_align);
1147 rxq = dev->data->rx_queues;
1148 if (rxq[rx_queue_id]) {
1149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1151 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1152 rxq[rx_queue_id] = NULL;
1155 if (rx_conf == NULL)
1156 rx_conf = &dev_info.default_rxconf;
1158 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1159 socket_id, rx_conf, mp);
1161 if (!dev->data->min_rx_buf_size ||
1162 dev->data->min_rx_buf_size > mbp_buf_size)
1163 dev->data->min_rx_buf_size = mbp_buf_size;
1170 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1171 uint16_t nb_tx_desc, unsigned int socket_id,
1172 const struct rte_eth_txconf *tx_conf)
1174 struct rte_eth_dev *dev;
1175 struct rte_eth_dev_info dev_info;
1178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1180 dev = &rte_eth_devices[port_id];
1181 if (tx_queue_id >= dev->data->nb_tx_queues) {
1182 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1186 if (dev->data->dev_started) {
1187 RTE_PMD_DEBUG_TRACE(
1188 "port %d must be stopped to allow configuration\n", port_id);
1192 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1193 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1195 rte_eth_dev_info_get(port_id, &dev_info);
1197 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1198 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1199 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1200 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1201 "should be: <= %hu, = %hu, and a product of %hu\n",
1203 dev_info.tx_desc_lim.nb_max,
1204 dev_info.tx_desc_lim.nb_min,
1205 dev_info.tx_desc_lim.nb_align);
1209 txq = dev->data->tx_queues;
1210 if (txq[tx_queue_id]) {
1211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1213 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1214 txq[tx_queue_id] = NULL;
1217 if (tx_conf == NULL)
1218 tx_conf = &dev_info.default_txconf;
1220 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1221 socket_id, tx_conf);
1225 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1226 void *userdata __rte_unused)
1230 for (i = 0; i < unsent; i++)
1231 rte_pktmbuf_free(pkts[i]);
1235 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1238 uint64_t *count = userdata;
1241 for (i = 0; i < unsent; i++)
1242 rte_pktmbuf_free(pkts[i]);
1248 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1249 buffer_tx_error_fn cbfn, void *userdata)
1251 buffer->error_callback = cbfn;
1252 buffer->error_userdata = userdata;
1257 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1264 buffer->size = size;
1265 if (buffer->error_callback == NULL) {
1266 ret = rte_eth_tx_buffer_set_err_callback(
1267 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1274 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1276 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1278 /* Validate Input Data. Bail if not valid or not supported. */
1279 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1280 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1282 /* Call driver to free pending mbufs. */
1283 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1288 rte_eth_promiscuous_enable(uint8_t port_id)
1290 struct rte_eth_dev *dev;
1292 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1293 dev = &rte_eth_devices[port_id];
1295 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1296 (*dev->dev_ops->promiscuous_enable)(dev);
1297 dev->data->promiscuous = 1;
1301 rte_eth_promiscuous_disable(uint8_t port_id)
1303 struct rte_eth_dev *dev;
1305 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1306 dev = &rte_eth_devices[port_id];
1308 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1309 dev->data->promiscuous = 0;
1310 (*dev->dev_ops->promiscuous_disable)(dev);
1314 rte_eth_promiscuous_get(uint8_t port_id)
1316 struct rte_eth_dev *dev;
1318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1320 dev = &rte_eth_devices[port_id];
1321 return dev->data->promiscuous;
1325 rte_eth_allmulticast_enable(uint8_t port_id)
1327 struct rte_eth_dev *dev;
1329 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1330 dev = &rte_eth_devices[port_id];
1332 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1333 (*dev->dev_ops->allmulticast_enable)(dev);
1334 dev->data->all_multicast = 1;
1338 rte_eth_allmulticast_disable(uint8_t port_id)
1340 struct rte_eth_dev *dev;
1342 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1343 dev = &rte_eth_devices[port_id];
1345 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1346 dev->data->all_multicast = 0;
1347 (*dev->dev_ops->allmulticast_disable)(dev);
1351 rte_eth_allmulticast_get(uint8_t port_id)
1353 struct rte_eth_dev *dev;
1355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1357 dev = &rte_eth_devices[port_id];
1358 return dev->data->all_multicast;
1362 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1363 struct rte_eth_link *link)
1365 struct rte_eth_link *dst = link;
1366 struct rte_eth_link *src = &(dev->data->dev_link);
1368 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1369 *(uint64_t *)src) == 0)
1376 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1378 struct rte_eth_dev *dev;
1380 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1381 dev = &rte_eth_devices[port_id];
1383 if (dev->data->dev_conf.intr_conf.lsc != 0)
1384 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1386 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1387 (*dev->dev_ops->link_update)(dev, 1);
1388 *eth_link = dev->data->dev_link;
1393 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1395 struct rte_eth_dev *dev;
1397 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1398 dev = &rte_eth_devices[port_id];
1400 if (dev->data->dev_conf.intr_conf.lsc != 0)
1401 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1403 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1404 (*dev->dev_ops->link_update)(dev, 0);
1405 *eth_link = dev->data->dev_link;
1410 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1412 struct rte_eth_dev *dev;
1414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1416 dev = &rte_eth_devices[port_id];
1417 memset(stats, 0, sizeof(*stats));
1419 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1420 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1421 (*dev->dev_ops->stats_get)(dev, stats);
1426 rte_eth_stats_reset(uint8_t port_id)
1428 struct rte_eth_dev *dev;
1430 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1431 dev = &rte_eth_devices[port_id];
1433 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1434 (*dev->dev_ops->stats_reset)(dev);
1435 dev->data->rx_mbuf_alloc_failed = 0;
1439 get_xstats_count(uint8_t port_id)
1441 struct rte_eth_dev *dev;
1444 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1445 dev = &rte_eth_devices[port_id];
1446 if (dev->dev_ops->xstats_get_names != NULL) {
1447 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1452 count += RTE_NB_STATS;
1453 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1455 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1461 rte_eth_xstats_get_names(uint8_t port_id,
1462 struct rte_eth_xstat_name *xstats_names,
1465 struct rte_eth_dev *dev;
1466 int cnt_used_entries;
1467 int cnt_expected_entries;
1468 int cnt_driver_entries;
1469 uint32_t idx, id_queue;
1472 cnt_expected_entries = get_xstats_count(port_id);
1473 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1474 (int)size < cnt_expected_entries)
1475 return cnt_expected_entries;
1477 /* port_id checked in get_xstats_count() */
1478 dev = &rte_eth_devices[port_id];
1479 cnt_used_entries = 0;
1481 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1482 snprintf(xstats_names[cnt_used_entries].name,
1483 sizeof(xstats_names[0].name),
1484 "%s", rte_stats_strings[idx].name);
1487 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1488 for (id_queue = 0; id_queue < num_q; id_queue++) {
1489 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1490 snprintf(xstats_names[cnt_used_entries].name,
1491 sizeof(xstats_names[0].name),
1493 id_queue, rte_rxq_stats_strings[idx].name);
1498 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1499 for (id_queue = 0; id_queue < num_q; id_queue++) {
1500 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1501 snprintf(xstats_names[cnt_used_entries].name,
1502 sizeof(xstats_names[0].name),
1504 id_queue, rte_txq_stats_strings[idx].name);
1509 if (dev->dev_ops->xstats_get_names != NULL) {
1510 /* If there are any driver-specific xstats, append them
1513 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1515 xstats_names + cnt_used_entries,
1516 size - cnt_used_entries);
1517 if (cnt_driver_entries < 0)
1518 return cnt_driver_entries;
1519 cnt_used_entries += cnt_driver_entries;
1522 return cnt_used_entries;
1525 /* retrieve ethdev extended statistics */
1527 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1530 struct rte_eth_stats eth_stats;
1531 struct rte_eth_dev *dev;
1532 unsigned count = 0, i, q;
1534 uint64_t val, *stats_ptr;
1535 uint16_t nb_rxqs, nb_txqs;
1537 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1539 dev = &rte_eth_devices[port_id];
1541 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1542 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1544 /* Return generic statistics */
1545 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1546 (nb_txqs * RTE_NB_TXQ_STATS);
1548 /* implemented by the driver */
1549 if (dev->dev_ops->xstats_get != NULL) {
1550 /* Retrieve the xstats from the driver at the end of the
1553 xcount = (*dev->dev_ops->xstats_get)(dev,
1554 xstats ? xstats + count : NULL,
1555 (n > count) ? n - count : 0);
1561 if (n < count + xcount || xstats == NULL)
1562 return count + xcount;
1564 /* now fill the xstats structure */
1566 rte_eth_stats_get(port_id, ð_stats);
1569 for (i = 0; i < RTE_NB_STATS; i++) {
1570 stats_ptr = RTE_PTR_ADD(ð_stats,
1571 rte_stats_strings[i].offset);
1573 xstats[count++].value = val;
1577 for (q = 0; q < nb_rxqs; q++) {
1578 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1579 stats_ptr = RTE_PTR_ADD(ð_stats,
1580 rte_rxq_stats_strings[i].offset +
1581 q * sizeof(uint64_t));
1583 xstats[count++].value = val;
1588 for (q = 0; q < nb_txqs; q++) {
1589 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1590 stats_ptr = RTE_PTR_ADD(ð_stats,
1591 rte_txq_stats_strings[i].offset +
1592 q * sizeof(uint64_t));
1594 xstats[count++].value = val;
1598 for (i = 0; i < count; i++)
1600 /* add an offset to driver-specific stats */
1601 for ( ; i < count + xcount; i++)
1602 xstats[i].id += count;
1604 return count + xcount;
1607 /* reset ethdev extended statistics */
1609 rte_eth_xstats_reset(uint8_t port_id)
1611 struct rte_eth_dev *dev;
1613 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1614 dev = &rte_eth_devices[port_id];
1616 /* implemented by the driver */
1617 if (dev->dev_ops->xstats_reset != NULL) {
1618 (*dev->dev_ops->xstats_reset)(dev);
1622 /* fallback to default */
1623 rte_eth_stats_reset(port_id);
1627 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1630 struct rte_eth_dev *dev;
1632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1634 dev = &rte_eth_devices[port_id];
1636 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1637 return (*dev->dev_ops->queue_stats_mapping_set)
1638 (dev, queue_id, stat_idx, is_rx);
1643 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1646 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1652 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1655 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1660 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1662 struct rte_eth_dev *dev;
1664 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1665 dev = &rte_eth_devices[port_id];
1667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1668 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1672 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1674 struct rte_eth_dev *dev;
1675 const struct rte_eth_desc_lim lim = {
1676 .nb_max = UINT16_MAX,
1681 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1682 dev = &rte_eth_devices[port_id];
1684 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1685 dev_info->rx_desc_lim = lim;
1686 dev_info->tx_desc_lim = lim;
1688 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1689 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1690 dev_info->driver_name = dev->data->drv_name;
1691 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1692 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1696 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1697 uint32_t *ptypes, int num)
1700 struct rte_eth_dev *dev;
1701 const uint32_t *all_ptypes;
1703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1704 dev = &rte_eth_devices[port_id];
1705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1706 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1711 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1712 if (all_ptypes[i] & ptype_mask) {
1714 ptypes[j] = all_ptypes[i];
1722 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1724 struct rte_eth_dev *dev;
1726 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1727 dev = &rte_eth_devices[port_id];
1728 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1733 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1735 struct rte_eth_dev *dev;
1737 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1739 dev = &rte_eth_devices[port_id];
1740 *mtu = dev->data->mtu;
1745 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1748 struct rte_eth_dev *dev;
1750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1751 dev = &rte_eth_devices[port_id];
1752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1754 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1756 dev->data->mtu = mtu;
1762 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1764 struct rte_eth_dev *dev;
1766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1767 dev = &rte_eth_devices[port_id];
1768 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1769 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1773 if (vlan_id > 4095) {
1774 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1775 port_id, (unsigned) vlan_id);
1778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1780 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1784 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1786 struct rte_eth_dev *dev;
1788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1789 dev = &rte_eth_devices[port_id];
1790 if (rx_queue_id >= dev->data->nb_rx_queues) {
1791 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1796 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1802 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1803 enum rte_vlan_type vlan_type,
1806 struct rte_eth_dev *dev;
1808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1809 dev = &rte_eth_devices[port_id];
1810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1812 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1816 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1818 struct rte_eth_dev *dev;
1823 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1824 dev = &rte_eth_devices[port_id];
1826 /*check which option changed by application*/
1827 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1828 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1830 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1831 mask |= ETH_VLAN_STRIP_MASK;
1834 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1835 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1837 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1838 mask |= ETH_VLAN_FILTER_MASK;
1841 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1842 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1844 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1845 mask |= ETH_VLAN_EXTEND_MASK;
1852 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1853 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1859 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1861 struct rte_eth_dev *dev;
1864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1865 dev = &rte_eth_devices[port_id];
1867 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1868 ret |= ETH_VLAN_STRIP_OFFLOAD;
1870 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1871 ret |= ETH_VLAN_FILTER_OFFLOAD;
1873 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1874 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1880 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1882 struct rte_eth_dev *dev;
1884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1885 dev = &rte_eth_devices[port_id];
1886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1887 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1893 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1895 struct rte_eth_dev *dev;
1897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1898 dev = &rte_eth_devices[port_id];
1899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1900 memset(fc_conf, 0, sizeof(*fc_conf));
1901 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1905 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1907 struct rte_eth_dev *dev;
1909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1910 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1911 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1915 dev = &rte_eth_devices[port_id];
1916 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1917 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1921 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1923 struct rte_eth_dev *dev;
1925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1926 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1927 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1931 dev = &rte_eth_devices[port_id];
1932 /* High water, low water validation are device specific */
1933 if (*dev->dev_ops->priority_flow_ctrl_set)
1934 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1939 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1947 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
1948 for (i = 0; i < num; i++) {
1949 if (reta_conf[i].mask)
1957 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1961 uint16_t i, idx, shift;
1967 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1971 for (i = 0; i < reta_size; i++) {
1972 idx = i / RTE_RETA_GROUP_SIZE;
1973 shift = i % RTE_RETA_GROUP_SIZE;
1974 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1975 (reta_conf[idx].reta[shift] >= max_rxq)) {
1976 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1977 "the maximum rxq index: %u\n", idx, shift,
1978 reta_conf[idx].reta[shift], max_rxq);
1987 rte_eth_dev_rss_reta_update(uint8_t port_id,
1988 struct rte_eth_rss_reta_entry64 *reta_conf,
1991 struct rte_eth_dev *dev;
1994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1995 /* Check mask bits */
1996 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2000 dev = &rte_eth_devices[port_id];
2002 /* Check entry value */
2003 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2004 dev->data->nb_rx_queues);
2008 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2009 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2013 rte_eth_dev_rss_reta_query(uint8_t port_id,
2014 struct rte_eth_rss_reta_entry64 *reta_conf,
2017 struct rte_eth_dev *dev;
2020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2022 /* Check mask bits */
2023 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2027 dev = &rte_eth_devices[port_id];
2028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2029 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2033 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2035 struct rte_eth_dev *dev;
2036 uint16_t rss_hash_protos;
2038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2039 rss_hash_protos = rss_conf->rss_hf;
2040 if ((rss_hash_protos != 0) &&
2041 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2042 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2046 dev = &rte_eth_devices[port_id];
2047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2048 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2052 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2053 struct rte_eth_rss_conf *rss_conf)
2055 struct rte_eth_dev *dev;
2057 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2058 dev = &rte_eth_devices[port_id];
2059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2060 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2064 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2065 struct rte_eth_udp_tunnel *udp_tunnel)
2067 struct rte_eth_dev *dev;
2069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2070 if (udp_tunnel == NULL) {
2071 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2075 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2076 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2080 dev = &rte_eth_devices[port_id];
2081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2082 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2086 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2087 struct rte_eth_udp_tunnel *udp_tunnel)
2089 struct rte_eth_dev *dev;
2091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2092 dev = &rte_eth_devices[port_id];
2094 if (udp_tunnel == NULL) {
2095 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2099 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2100 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2105 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2109 rte_eth_led_on(uint8_t port_id)
2111 struct rte_eth_dev *dev;
2113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2114 dev = &rte_eth_devices[port_id];
2115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2116 return (*dev->dev_ops->dev_led_on)(dev);
2120 rte_eth_led_off(uint8_t port_id)
2122 struct rte_eth_dev *dev;
2124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2125 dev = &rte_eth_devices[port_id];
2126 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2127 return (*dev->dev_ops->dev_led_off)(dev);
2131 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2135 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2137 struct rte_eth_dev_info dev_info;
2138 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2141 rte_eth_dev_info_get(port_id, &dev_info);
2143 for (i = 0; i < dev_info.max_mac_addrs; i++)
2144 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2150 static const struct ether_addr null_mac_addr;
2153 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2156 struct rte_eth_dev *dev;
2160 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2161 dev = &rte_eth_devices[port_id];
2162 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2164 if (is_zero_ether_addr(addr)) {
2165 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2169 if (pool >= ETH_64_POOLS) {
2170 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2174 index = get_mac_addr_index(port_id, addr);
2176 index = get_mac_addr_index(port_id, &null_mac_addr);
2178 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2183 pool_mask = dev->data->mac_pool_sel[index];
2185 /* Check if both MAC address and pool is already there, and do nothing */
2186 if (pool_mask & (1ULL << pool))
2191 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2193 /* Update address in NIC data structure */
2194 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2196 /* Update pool bitmap in NIC data structure */
2197 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2203 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2205 struct rte_eth_dev *dev;
2208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2209 dev = &rte_eth_devices[port_id];
2210 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2212 index = get_mac_addr_index(port_id, addr);
2214 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2216 } else if (index < 0)
2217 return 0; /* Do nothing if address wasn't found */
2220 (*dev->dev_ops->mac_addr_remove)(dev, index);
2222 /* Update address in NIC data structure */
2223 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2225 /* reset pool bitmap */
2226 dev->data->mac_pool_sel[index] = 0;
2232 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2234 struct rte_eth_dev *dev;
2236 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2238 if (!is_valid_assigned_ether_addr(addr))
2241 dev = &rte_eth_devices[port_id];
2242 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2244 /* Update default address in NIC data structure */
2245 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2247 (*dev->dev_ops->mac_addr_set)(dev, addr);
2254 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2258 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2260 struct rte_eth_dev_info dev_info;
2261 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2264 rte_eth_dev_info_get(port_id, &dev_info);
2265 if (!dev->data->hash_mac_addrs)
2268 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2269 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2270 ETHER_ADDR_LEN) == 0)
2277 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2282 struct rte_eth_dev *dev;
2284 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2286 dev = &rte_eth_devices[port_id];
2287 if (is_zero_ether_addr(addr)) {
2288 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2293 index = get_hash_mac_addr_index(port_id, addr);
2294 /* Check if it's already there, and do nothing */
2295 if ((index >= 0) && (on))
2300 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2301 "set in UTA\n", port_id);
2305 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2307 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2313 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2314 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2316 /* Update address in NIC data structure */
2318 ether_addr_copy(addr,
2319 &dev->data->hash_mac_addrs[index]);
2321 ether_addr_copy(&null_mac_addr,
2322 &dev->data->hash_mac_addrs[index]);
2329 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2331 struct rte_eth_dev *dev;
2333 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2335 dev = &rte_eth_devices[port_id];
2337 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2338 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2341 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2344 struct rte_eth_dev *dev;
2345 struct rte_eth_dev_info dev_info;
2346 struct rte_eth_link link;
2348 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2350 dev = &rte_eth_devices[port_id];
2351 rte_eth_dev_info_get(port_id, &dev_info);
2352 link = dev->data->dev_link;
2354 if (queue_idx > dev_info.max_tx_queues) {
2355 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2356 "invalid queue id=%d\n", port_id, queue_idx);
2360 if (tx_rate > link.link_speed) {
2361 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2362 "bigger than link speed= %d\n",
2363 tx_rate, link.link_speed);
2367 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2368 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2372 rte_eth_mirror_rule_set(uint8_t port_id,
2373 struct rte_eth_mirror_conf *mirror_conf,
2374 uint8_t rule_id, uint8_t on)
2376 struct rte_eth_dev *dev;
2378 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2379 if (mirror_conf->rule_type == 0) {
2380 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2384 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2385 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2390 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2391 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2392 (mirror_conf->pool_mask == 0)) {
2393 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2397 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2398 mirror_conf->vlan.vlan_mask == 0) {
2399 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2403 dev = &rte_eth_devices[port_id];
2404 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2406 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2410 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2412 struct rte_eth_dev *dev;
2414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2416 dev = &rte_eth_devices[port_id];
2417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2419 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2423 rte_eth_dev_callback_register(uint8_t port_id,
2424 enum rte_eth_event_type event,
2425 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2427 struct rte_eth_dev *dev;
2428 struct rte_eth_dev_callback *user_cb;
2433 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2435 dev = &rte_eth_devices[port_id];
2436 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2438 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2439 if (user_cb->cb_fn == cb_fn &&
2440 user_cb->cb_arg == cb_arg &&
2441 user_cb->event == event) {
2446 /* create a new callback. */
2447 if (user_cb == NULL) {
2448 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2449 sizeof(struct rte_eth_dev_callback), 0);
2450 if (user_cb != NULL) {
2451 user_cb->cb_fn = cb_fn;
2452 user_cb->cb_arg = cb_arg;
2453 user_cb->event = event;
2454 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2458 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2459 return (user_cb == NULL) ? -ENOMEM : 0;
2463 rte_eth_dev_callback_unregister(uint8_t port_id,
2464 enum rte_eth_event_type event,
2465 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2468 struct rte_eth_dev *dev;
2469 struct rte_eth_dev_callback *cb, *next;
2474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2476 dev = &rte_eth_devices[port_id];
2477 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2480 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2482 next = TAILQ_NEXT(cb, next);
2484 if (cb->cb_fn != cb_fn || cb->event != event ||
2485 (cb->cb_arg != (void *)-1 &&
2486 cb->cb_arg != cb_arg))
2490 * if this callback is not executing right now,
2493 if (cb->active == 0) {
2494 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2501 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2506 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2507 enum rte_eth_event_type event, void *cb_arg)
2509 struct rte_eth_dev_callback *cb_lst;
2510 struct rte_eth_dev_callback dev_cb;
2512 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2513 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2514 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2519 dev_cb.cb_arg = (void *) cb_arg;
2521 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2522 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2524 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2527 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2531 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2534 struct rte_eth_dev *dev;
2535 struct rte_intr_handle *intr_handle;
2539 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2541 dev = &rte_eth_devices[port_id];
2543 if (!dev->intr_handle) {
2544 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2548 intr_handle = dev->intr_handle;
2549 if (!intr_handle->intr_vec) {
2550 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2554 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2555 vec = intr_handle->intr_vec[qid];
2556 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2557 if (rc && rc != -EEXIST) {
2558 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2559 " op %d epfd %d vec %u\n",
2560 port_id, qid, op, epfd, vec);
2567 const struct rte_memzone *
2568 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2569 uint16_t queue_id, size_t size, unsigned align,
2572 char z_name[RTE_MEMZONE_NAMESIZE];
2573 const struct rte_memzone *mz;
2575 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2576 dev->data->drv_name, ring_name,
2577 dev->data->port_id, queue_id);
2579 mz = rte_memzone_lookup(z_name);
2583 if (rte_xen_dom0_supported())
2584 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2585 0, align, RTE_PGSIZE_2M);
2587 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2592 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2593 int epfd, int op, void *data)
2596 struct rte_eth_dev *dev;
2597 struct rte_intr_handle *intr_handle;
2600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2602 dev = &rte_eth_devices[port_id];
2603 if (queue_id >= dev->data->nb_rx_queues) {
2604 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2608 if (!dev->intr_handle) {
2609 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2613 intr_handle = dev->intr_handle;
2614 if (!intr_handle->intr_vec) {
2615 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2619 vec = intr_handle->intr_vec[queue_id];
2620 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2621 if (rc && rc != -EEXIST) {
2622 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2623 " op %d epfd %d vec %u\n",
2624 port_id, queue_id, op, epfd, vec);
2632 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2635 struct rte_eth_dev *dev;
2637 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2639 dev = &rte_eth_devices[port_id];
2641 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2642 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2646 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2649 struct rte_eth_dev *dev;
2651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2653 dev = &rte_eth_devices[port_id];
2655 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2656 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2659 #ifdef RTE_NIC_BYPASS
2660 int rte_eth_dev_bypass_init(uint8_t port_id)
2662 struct rte_eth_dev *dev;
2664 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2666 dev = &rte_eth_devices[port_id];
2667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2668 (*dev->dev_ops->bypass_init)(dev);
2673 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2675 struct rte_eth_dev *dev;
2677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2679 dev = &rte_eth_devices[port_id];
2680 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2681 (*dev->dev_ops->bypass_state_show)(dev, state);
2686 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2688 struct rte_eth_dev *dev;
2690 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2692 dev = &rte_eth_devices[port_id];
2693 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2694 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2699 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2701 struct rte_eth_dev *dev;
2703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2705 dev = &rte_eth_devices[port_id];
2706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2707 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2712 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2714 struct rte_eth_dev *dev;
2716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2718 dev = &rte_eth_devices[port_id];
2720 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2721 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2726 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2728 struct rte_eth_dev *dev;
2730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2732 dev = &rte_eth_devices[port_id];
2734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2735 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2740 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2742 struct rte_eth_dev *dev;
2744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2746 dev = &rte_eth_devices[port_id];
2748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2749 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2754 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2756 struct rte_eth_dev *dev;
2758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2760 dev = &rte_eth_devices[port_id];
2762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2763 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2768 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2770 struct rte_eth_dev *dev;
2772 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2774 dev = &rte_eth_devices[port_id];
2776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2777 (*dev->dev_ops->bypass_wd_reset)(dev);
2783 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2785 struct rte_eth_dev *dev;
2787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2789 dev = &rte_eth_devices[port_id];
2790 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2791 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2792 RTE_ETH_FILTER_NOP, NULL);
2796 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2797 enum rte_filter_op filter_op, void *arg)
2799 struct rte_eth_dev *dev;
2801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2803 dev = &rte_eth_devices[port_id];
2804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2805 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2809 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2810 rte_rx_callback_fn fn, void *user_param)
2812 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2813 rte_errno = ENOTSUP;
2816 /* check input parameters */
2817 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2818 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2822 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2830 cb->param = user_param;
2832 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2833 /* Add the callbacks in fifo order. */
2834 struct rte_eth_rxtx_callback *tail =
2835 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2838 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2845 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2851 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2852 rte_rx_callback_fn fn, void *user_param)
2854 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2855 rte_errno = ENOTSUP;
2858 /* check input parameters */
2859 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2860 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2865 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2873 cb->param = user_param;
2875 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2876 /* Add the callbacks at fisrt position*/
2877 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2879 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2880 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2886 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2887 rte_tx_callback_fn fn, void *user_param)
2889 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2890 rte_errno = ENOTSUP;
2893 /* check input parameters */
2894 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2895 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2900 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2908 cb->param = user_param;
2910 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2911 /* Add the callbacks in fifo order. */
2912 struct rte_eth_rxtx_callback *tail =
2913 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2916 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2923 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2929 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2930 struct rte_eth_rxtx_callback *user_cb)
2932 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2935 /* Check input parameters. */
2936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2937 if (user_cb == NULL ||
2938 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2941 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2942 struct rte_eth_rxtx_callback *cb;
2943 struct rte_eth_rxtx_callback **prev_cb;
2946 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2947 prev_cb = &dev->post_rx_burst_cbs[queue_id];
2948 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2950 if (cb == user_cb) {
2951 /* Remove the user cb from the callback list. */
2952 *prev_cb = cb->next;
2957 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2963 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
2964 struct rte_eth_rxtx_callback *user_cb)
2966 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2969 /* Check input parameters. */
2970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2971 if (user_cb == NULL ||
2972 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
2975 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2977 struct rte_eth_rxtx_callback *cb;
2978 struct rte_eth_rxtx_callback **prev_cb;
2980 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2981 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
2982 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2984 if (cb == user_cb) {
2985 /* Remove the user cb from the callback list. */
2986 *prev_cb = cb->next;
2991 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2997 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
2998 struct rte_eth_rxq_info *qinfo)
3000 struct rte_eth_dev *dev;
3002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3007 dev = &rte_eth_devices[port_id];
3008 if (queue_id >= dev->data->nb_rx_queues) {
3009 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3015 memset(qinfo, 0, sizeof(*qinfo));
3016 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3021 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3022 struct rte_eth_txq_info *qinfo)
3024 struct rte_eth_dev *dev;
3026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3031 dev = &rte_eth_devices[port_id];
3032 if (queue_id >= dev->data->nb_tx_queues) {
3033 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3039 memset(qinfo, 0, sizeof(*qinfo));
3040 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3045 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3046 struct ether_addr *mc_addr_set,
3047 uint32_t nb_mc_addr)
3049 struct rte_eth_dev *dev;
3051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3053 dev = &rte_eth_devices[port_id];
3054 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3055 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3059 rte_eth_timesync_enable(uint8_t port_id)
3061 struct rte_eth_dev *dev;
3063 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3064 dev = &rte_eth_devices[port_id];
3066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3067 return (*dev->dev_ops->timesync_enable)(dev);
3071 rte_eth_timesync_disable(uint8_t port_id)
3073 struct rte_eth_dev *dev;
3075 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3076 dev = &rte_eth_devices[port_id];
3078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3079 return (*dev->dev_ops->timesync_disable)(dev);
3083 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3086 struct rte_eth_dev *dev;
3088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3089 dev = &rte_eth_devices[port_id];
3091 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3092 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3096 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3098 struct rte_eth_dev *dev;
3100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3101 dev = &rte_eth_devices[port_id];
3103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3104 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3108 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3110 struct rte_eth_dev *dev;
3112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3113 dev = &rte_eth_devices[port_id];
3115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3116 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3120 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3122 struct rte_eth_dev *dev;
3124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3125 dev = &rte_eth_devices[port_id];
3127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3128 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3132 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3134 struct rte_eth_dev *dev;
3136 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3137 dev = &rte_eth_devices[port_id];
3139 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3140 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3144 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3146 struct rte_eth_dev *dev;
3148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3150 dev = &rte_eth_devices[port_id];
3151 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3152 return (*dev->dev_ops->get_reg)(dev, info);
3156 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3158 struct rte_eth_dev *dev;
3160 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3162 dev = &rte_eth_devices[port_id];
3163 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3164 return (*dev->dev_ops->get_eeprom_length)(dev);
3168 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3170 struct rte_eth_dev *dev;
3172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3174 dev = &rte_eth_devices[port_id];
3175 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3176 return (*dev->dev_ops->get_eeprom)(dev, info);
3180 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3182 struct rte_eth_dev *dev;
3184 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3186 dev = &rte_eth_devices[port_id];
3187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3188 return (*dev->dev_ops->set_eeprom)(dev, info);
3192 rte_eth_dev_get_dcb_info(uint8_t port_id,
3193 struct rte_eth_dcb_info *dcb_info)
3195 struct rte_eth_dev *dev;
3197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3199 dev = &rte_eth_devices[port_id];
3200 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3203 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3207 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3209 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3210 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3215 eth_dev->intr_handle = &pci_dev->intr_handle;
3217 eth_dev->data->dev_flags = 0;
3218 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3219 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3221 eth_dev->data->kdrv = pci_dev->kdrv;
3222 eth_dev->data->numa_node = pci_dev->device.numa_node;
3223 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3227 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3228 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3230 struct rte_eth_dev *dev;
3232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3233 if (l2_tunnel == NULL) {
3234 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3238 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3239 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3243 dev = &rte_eth_devices[port_id];
3244 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3246 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3250 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3251 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3255 struct rte_eth_dev *dev;
3257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3259 if (l2_tunnel == NULL) {
3260 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3264 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3265 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3270 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3274 dev = &rte_eth_devices[port_id];
3275 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3277 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);