4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
142 rte_eth_find_next(uint8_t port_id)
144 while (port_id < RTE_MAX_ETHPORTS &&
145 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
148 if (port_id >= RTE_MAX_ETHPORTS)
149 return RTE_MAX_ETHPORTS;
155 rte_eth_dev_data_alloc(void)
157 const unsigned flags = 0;
158 const struct rte_memzone *mz;
160 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
161 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
162 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
163 rte_socket_id(), flags);
165 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
167 rte_panic("Cannot allocate memzone for ethernet port data\n");
169 rte_eth_dev_data = mz->addr;
170 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
171 memset(rte_eth_dev_data, 0,
172 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
176 rte_eth_dev_allocated(const char *name)
180 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
181 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
182 strcmp(rte_eth_devices[i].data->name, name) == 0)
183 return &rte_eth_devices[i];
189 rte_eth_dev_find_free_port(void)
193 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
194 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
197 return RTE_MAX_ETHPORTS;
200 static struct rte_eth_dev *
201 eth_dev_get(uint8_t port_id)
203 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
205 eth_dev->data = &rte_eth_dev_data[port_id];
206 eth_dev->state = RTE_ETH_DEV_ATTACHED;
207 TAILQ_INIT(&(eth_dev->link_intr_cbs));
209 eth_dev_last_created_port = port_id;
216 rte_eth_dev_allocate(const char *name)
219 struct rte_eth_dev *eth_dev;
221 port_id = rte_eth_dev_find_free_port();
222 if (port_id == RTE_MAX_ETHPORTS) {
223 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
227 if (rte_eth_dev_data == NULL)
228 rte_eth_dev_data_alloc();
230 if (rte_eth_dev_allocated(name) != NULL) {
231 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
236 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
237 eth_dev = eth_dev_get(port_id);
238 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
239 eth_dev->data->port_id = port_id;
240 eth_dev->data->mtu = ETHER_MTU;
246 * Attach to a port already registered by the primary process, which
247 * makes sure that the same device would have the same port id both
248 * in the primary and secondary process.
251 rte_eth_dev_attach_secondary(const char *name)
254 struct rte_eth_dev *eth_dev;
256 if (rte_eth_dev_data == NULL)
257 rte_eth_dev_data_alloc();
259 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
260 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
263 if (i == RTE_MAX_ETHPORTS) {
265 "device %s is not driven by the primary process\n",
270 eth_dev = eth_dev_get(i);
271 RTE_ASSERT(eth_dev->data->port_id == i);
277 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
282 eth_dev->state = RTE_ETH_DEV_UNUSED;
288 rte_eth_dev_is_valid_port(uint8_t port_id)
290 if (port_id >= RTE_MAX_ETHPORTS ||
291 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
298 rte_eth_dev_socket_id(uint8_t port_id)
300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
301 return rte_eth_devices[port_id].data->numa_node;
305 rte_eth_dev_count(void)
311 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
318 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
322 /* shouldn't check 'rte_eth_devices[i].data',
323 * because it might be overwritten by VDEV PMD */
324 tmp = rte_eth_dev_data[port_id].name;
330 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
335 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
342 *port_id = RTE_MAX_ETHPORTS;
343 RTE_ETH_FOREACH_DEV(i) {
345 rte_eth_dev_data[i].name, strlen(name))) {
356 rte_eth_dev_is_detachable(uint8_t port_id)
360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
362 switch (rte_eth_devices[port_id].data->kdrv) {
363 case RTE_KDRV_IGB_UIO:
364 case RTE_KDRV_UIO_GENERIC:
365 case RTE_KDRV_NIC_UIO:
372 dev_flags = rte_eth_devices[port_id].data->dev_flags;
373 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
374 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
380 /* attach the new device, then store port_id of the device */
382 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
385 int current = rte_eth_dev_count();
389 if ((devargs == NULL) || (port_id == NULL)) {
394 /* parse devargs, then retrieve device name and args */
395 if (rte_eal_parse_devargs_str(devargs, &name, &args))
398 ret = rte_eal_dev_attach(name, args);
402 /* no point looking at the port count if no port exists */
403 if (!rte_eth_dev_count()) {
404 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
409 /* if nothing happened, there is a bug here, since some driver told us
410 * it did attach a device, but did not create a port.
412 if (current == rte_eth_dev_count()) {
417 *port_id = eth_dev_last_created_port;
426 /* detach the device, then store the name of the device */
428 rte_eth_dev_detach(uint8_t port_id, char *name)
437 /* FIXME: move this to eal, once device flags are relocated there */
438 if (rte_eth_dev_is_detachable(port_id))
441 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
442 "%s", rte_eth_devices[port_id].data->name);
443 ret = rte_eal_dev_detach(name);
454 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
456 uint16_t old_nb_queues = dev->data->nb_rx_queues;
460 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
461 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
462 sizeof(dev->data->rx_queues[0]) * nb_queues,
463 RTE_CACHE_LINE_SIZE);
464 if (dev->data->rx_queues == NULL) {
465 dev->data->nb_rx_queues = 0;
468 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
471 rxq = dev->data->rx_queues;
473 for (i = nb_queues; i < old_nb_queues; i++)
474 (*dev->dev_ops->rx_queue_release)(rxq[i]);
475 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
476 RTE_CACHE_LINE_SIZE);
479 if (nb_queues > old_nb_queues) {
480 uint16_t new_qs = nb_queues - old_nb_queues;
482 memset(rxq + old_nb_queues, 0,
483 sizeof(rxq[0]) * new_qs);
486 dev->data->rx_queues = rxq;
488 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
491 rxq = dev->data->rx_queues;
493 for (i = nb_queues; i < old_nb_queues; i++)
494 (*dev->dev_ops->rx_queue_release)(rxq[i]);
496 rte_free(dev->data->rx_queues);
497 dev->data->rx_queues = NULL;
499 dev->data->nb_rx_queues = nb_queues;
504 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
506 struct rte_eth_dev *dev;
508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
510 dev = &rte_eth_devices[port_id];
511 if (rx_queue_id >= dev->data->nb_rx_queues) {
512 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
518 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
519 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
520 " already started\n",
521 rx_queue_id, port_id);
525 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
530 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
532 struct rte_eth_dev *dev;
534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
536 dev = &rte_eth_devices[port_id];
537 if (rx_queue_id >= dev->data->nb_rx_queues) {
538 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
544 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
545 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
546 " already stopped\n",
547 rx_queue_id, port_id);
551 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
556 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
558 struct rte_eth_dev *dev;
560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
562 dev = &rte_eth_devices[port_id];
563 if (tx_queue_id >= dev->data->nb_tx_queues) {
564 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
570 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
571 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
572 " already started\n",
573 tx_queue_id, port_id);
577 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
582 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
584 struct rte_eth_dev *dev;
586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
588 dev = &rte_eth_devices[port_id];
589 if (tx_queue_id >= dev->data->nb_tx_queues) {
590 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
596 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
597 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
598 " already stopped\n",
599 tx_queue_id, port_id);
603 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
608 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
610 uint16_t old_nb_queues = dev->data->nb_tx_queues;
614 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
615 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
616 sizeof(dev->data->tx_queues[0]) * nb_queues,
617 RTE_CACHE_LINE_SIZE);
618 if (dev->data->tx_queues == NULL) {
619 dev->data->nb_tx_queues = 0;
622 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
625 txq = dev->data->tx_queues;
627 for (i = nb_queues; i < old_nb_queues; i++)
628 (*dev->dev_ops->tx_queue_release)(txq[i]);
629 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
630 RTE_CACHE_LINE_SIZE);
633 if (nb_queues > old_nb_queues) {
634 uint16_t new_qs = nb_queues - old_nb_queues;
636 memset(txq + old_nb_queues, 0,
637 sizeof(txq[0]) * new_qs);
640 dev->data->tx_queues = txq;
642 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
645 txq = dev->data->tx_queues;
647 for (i = nb_queues; i < old_nb_queues; i++)
648 (*dev->dev_ops->tx_queue_release)(txq[i]);
650 rte_free(dev->data->tx_queues);
651 dev->data->tx_queues = NULL;
653 dev->data->nb_tx_queues = nb_queues;
658 rte_eth_speed_bitflag(uint32_t speed, int duplex)
661 case ETH_SPEED_NUM_10M:
662 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
663 case ETH_SPEED_NUM_100M:
664 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
665 case ETH_SPEED_NUM_1G:
666 return ETH_LINK_SPEED_1G;
667 case ETH_SPEED_NUM_2_5G:
668 return ETH_LINK_SPEED_2_5G;
669 case ETH_SPEED_NUM_5G:
670 return ETH_LINK_SPEED_5G;
671 case ETH_SPEED_NUM_10G:
672 return ETH_LINK_SPEED_10G;
673 case ETH_SPEED_NUM_20G:
674 return ETH_LINK_SPEED_20G;
675 case ETH_SPEED_NUM_25G:
676 return ETH_LINK_SPEED_25G;
677 case ETH_SPEED_NUM_40G:
678 return ETH_LINK_SPEED_40G;
679 case ETH_SPEED_NUM_50G:
680 return ETH_LINK_SPEED_50G;
681 case ETH_SPEED_NUM_56G:
682 return ETH_LINK_SPEED_56G;
683 case ETH_SPEED_NUM_100G:
684 return ETH_LINK_SPEED_100G;
691 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
692 const struct rte_eth_conf *dev_conf)
694 struct rte_eth_dev *dev;
695 struct rte_eth_dev_info dev_info;
698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
700 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
702 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
703 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
707 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
709 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
710 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
714 dev = &rte_eth_devices[port_id];
716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
719 if (dev->data->dev_started) {
721 "port %d must be stopped to allow configuration\n", port_id);
725 /* Copy the dev_conf parameter into the dev structure */
726 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
729 * Check that the numbers of RX and TX queues are not greater
730 * than the maximum number of RX and TX queues supported by the
733 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
735 if (nb_rx_q == 0 && nb_tx_q == 0) {
736 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
740 if (nb_rx_q > dev_info.max_rx_queues) {
741 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
742 port_id, nb_rx_q, dev_info.max_rx_queues);
746 if (nb_tx_q > dev_info.max_tx_queues) {
747 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
748 port_id, nb_tx_q, dev_info.max_tx_queues);
752 /* Check that the device supports requested interrupts */
753 if ((dev_conf->intr_conf.lsc == 1) &&
754 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
755 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
756 dev->data->drv_name);
759 if ((dev_conf->intr_conf.rmv == 1) &&
760 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
761 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
762 dev->data->drv_name);
767 * If jumbo frames are enabled, check that the maximum RX packet
768 * length is supported by the configured device.
770 if (dev_conf->rxmode.jumbo_frame == 1) {
771 if (dev_conf->rxmode.max_rx_pkt_len >
772 dev_info.max_rx_pktlen) {
773 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
774 " > max valid value %u\n",
776 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
777 (unsigned)dev_info.max_rx_pktlen);
779 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
780 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
781 " < min valid value %u\n",
783 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
784 (unsigned)ETHER_MIN_LEN);
788 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
789 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
790 /* Use default value */
791 dev->data->dev_conf.rxmode.max_rx_pkt_len =
796 * Setup new number of RX/TX queues and reconfigure device.
798 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
800 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
805 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
807 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
809 rte_eth_dev_rx_queue_config(dev, 0);
813 diag = (*dev->dev_ops->dev_configure)(dev);
815 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
817 rte_eth_dev_rx_queue_config(dev, 0);
818 rte_eth_dev_tx_queue_config(dev, 0);
826 _rte_eth_dev_reset(struct rte_eth_dev *dev)
828 if (dev->data->dev_started) {
830 "port %d must be stopped to allow reset\n",
835 rte_eth_dev_rx_queue_config(dev, 0);
836 rte_eth_dev_tx_queue_config(dev, 0);
838 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
842 rte_eth_dev_config_restore(uint8_t port_id)
844 struct rte_eth_dev *dev;
845 struct rte_eth_dev_info dev_info;
846 struct ether_addr *addr;
851 dev = &rte_eth_devices[port_id];
853 rte_eth_dev_info_get(port_id, &dev_info);
855 /* replay MAC address configuration including default MAC */
856 addr = &dev->data->mac_addrs[0];
857 if (*dev->dev_ops->mac_addr_set != NULL)
858 (*dev->dev_ops->mac_addr_set)(dev, addr);
859 else if (*dev->dev_ops->mac_addr_add != NULL)
860 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
862 if (*dev->dev_ops->mac_addr_add != NULL) {
863 for (i = 1; i < dev_info.max_mac_addrs; i++) {
864 addr = &dev->data->mac_addrs[i];
866 /* skip zero address */
867 if (is_zero_ether_addr(addr))
871 pool_mask = dev->data->mac_pool_sel[i];
874 if (pool_mask & 1ULL)
875 (*dev->dev_ops->mac_addr_add)(dev,
883 /* replay promiscuous configuration */
884 if (rte_eth_promiscuous_get(port_id) == 1)
885 rte_eth_promiscuous_enable(port_id);
886 else if (rte_eth_promiscuous_get(port_id) == 0)
887 rte_eth_promiscuous_disable(port_id);
889 /* replay all multicast configuration */
890 if (rte_eth_allmulticast_get(port_id) == 1)
891 rte_eth_allmulticast_enable(port_id);
892 else if (rte_eth_allmulticast_get(port_id) == 0)
893 rte_eth_allmulticast_disable(port_id);
897 rte_eth_dev_start(uint8_t port_id)
899 struct rte_eth_dev *dev;
902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
904 dev = &rte_eth_devices[port_id];
906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
908 if (dev->data->dev_started != 0) {
909 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
910 " already started\n",
915 diag = (*dev->dev_ops->dev_start)(dev);
917 dev->data->dev_started = 1;
921 rte_eth_dev_config_restore(port_id);
923 if (dev->data->dev_conf.intr_conf.lsc == 0) {
924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
925 (*dev->dev_ops->link_update)(dev, 0);
931 rte_eth_dev_stop(uint8_t port_id)
933 struct rte_eth_dev *dev;
935 RTE_ETH_VALID_PORTID_OR_RET(port_id);
936 dev = &rte_eth_devices[port_id];
938 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
940 if (dev->data->dev_started == 0) {
941 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
942 " already stopped\n",
947 dev->data->dev_started = 0;
948 (*dev->dev_ops->dev_stop)(dev);
952 rte_eth_dev_set_link_up(uint8_t port_id)
954 struct rte_eth_dev *dev;
956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
958 dev = &rte_eth_devices[port_id];
960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
961 return (*dev->dev_ops->dev_set_link_up)(dev);
965 rte_eth_dev_set_link_down(uint8_t port_id)
967 struct rte_eth_dev *dev;
969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
971 dev = &rte_eth_devices[port_id];
973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
974 return (*dev->dev_ops->dev_set_link_down)(dev);
978 rte_eth_dev_close(uint8_t port_id)
980 struct rte_eth_dev *dev;
982 RTE_ETH_VALID_PORTID_OR_RET(port_id);
983 dev = &rte_eth_devices[port_id];
985 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
986 dev->data->dev_started = 0;
987 (*dev->dev_ops->dev_close)(dev);
989 dev->data->nb_rx_queues = 0;
990 rte_free(dev->data->rx_queues);
991 dev->data->rx_queues = NULL;
992 dev->data->nb_tx_queues = 0;
993 rte_free(dev->data->tx_queues);
994 dev->data->tx_queues = NULL;
998 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
999 uint16_t nb_rx_desc, unsigned int socket_id,
1000 const struct rte_eth_rxconf *rx_conf,
1001 struct rte_mempool *mp)
1004 uint32_t mbp_buf_size;
1005 struct rte_eth_dev *dev;
1006 struct rte_eth_dev_info dev_info;
1009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1011 dev = &rte_eth_devices[port_id];
1012 if (rx_queue_id >= dev->data->nb_rx_queues) {
1013 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1017 if (dev->data->dev_started) {
1018 RTE_PMD_DEBUG_TRACE(
1019 "port %d must be stopped to allow configuration\n", port_id);
1023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1027 * Check the size of the mbuf data buffer.
1028 * This value must be provided in the private data of the memory pool.
1029 * First check that the memory pool has a valid private data.
1031 rte_eth_dev_info_get(port_id, &dev_info);
1032 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1033 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1034 mp->name, (int) mp->private_data_size,
1035 (int) sizeof(struct rte_pktmbuf_pool_private));
1038 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1040 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1041 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1042 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1046 (int)(RTE_PKTMBUF_HEADROOM +
1047 dev_info.min_rx_bufsize),
1048 (int)RTE_PKTMBUF_HEADROOM,
1049 (int)dev_info.min_rx_bufsize);
1053 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1054 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1055 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1057 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1058 "should be: <= %hu, = %hu, and a product of %hu\n",
1060 dev_info.rx_desc_lim.nb_max,
1061 dev_info.rx_desc_lim.nb_min,
1062 dev_info.rx_desc_lim.nb_align);
1066 rxq = dev->data->rx_queues;
1067 if (rxq[rx_queue_id]) {
1068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1070 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1071 rxq[rx_queue_id] = NULL;
1074 if (rx_conf == NULL)
1075 rx_conf = &dev_info.default_rxconf;
1077 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1078 socket_id, rx_conf, mp);
1080 if (!dev->data->min_rx_buf_size ||
1081 dev->data->min_rx_buf_size > mbp_buf_size)
1082 dev->data->min_rx_buf_size = mbp_buf_size;
1089 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1090 uint16_t nb_tx_desc, unsigned int socket_id,
1091 const struct rte_eth_txconf *tx_conf)
1093 struct rte_eth_dev *dev;
1094 struct rte_eth_dev_info dev_info;
1097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1099 dev = &rte_eth_devices[port_id];
1100 if (tx_queue_id >= dev->data->nb_tx_queues) {
1101 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1105 if (dev->data->dev_started) {
1106 RTE_PMD_DEBUG_TRACE(
1107 "port %d must be stopped to allow configuration\n", port_id);
1111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1114 rte_eth_dev_info_get(port_id, &dev_info);
1116 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1117 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1118 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1119 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1120 "should be: <= %hu, = %hu, and a product of %hu\n",
1122 dev_info.tx_desc_lim.nb_max,
1123 dev_info.tx_desc_lim.nb_min,
1124 dev_info.tx_desc_lim.nb_align);
1128 txq = dev->data->tx_queues;
1129 if (txq[tx_queue_id]) {
1130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1132 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1133 txq[tx_queue_id] = NULL;
1136 if (tx_conf == NULL)
1137 tx_conf = &dev_info.default_txconf;
1139 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1140 socket_id, tx_conf);
1144 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1145 void *userdata __rte_unused)
1149 for (i = 0; i < unsent; i++)
1150 rte_pktmbuf_free(pkts[i]);
1154 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1157 uint64_t *count = userdata;
1160 for (i = 0; i < unsent; i++)
1161 rte_pktmbuf_free(pkts[i]);
1167 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1168 buffer_tx_error_fn cbfn, void *userdata)
1170 buffer->error_callback = cbfn;
1171 buffer->error_userdata = userdata;
1176 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1183 buffer->size = size;
1184 if (buffer->error_callback == NULL) {
1185 ret = rte_eth_tx_buffer_set_err_callback(
1186 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1193 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1195 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1197 /* Validate Input Data. Bail if not valid or not supported. */
1198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1199 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1201 /* Call driver to free pending mbufs. */
1202 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1207 rte_eth_promiscuous_enable(uint8_t port_id)
1209 struct rte_eth_dev *dev;
1211 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1212 dev = &rte_eth_devices[port_id];
1214 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1215 (*dev->dev_ops->promiscuous_enable)(dev);
1216 dev->data->promiscuous = 1;
1220 rte_eth_promiscuous_disable(uint8_t port_id)
1222 struct rte_eth_dev *dev;
1224 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1225 dev = &rte_eth_devices[port_id];
1227 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1228 dev->data->promiscuous = 0;
1229 (*dev->dev_ops->promiscuous_disable)(dev);
1233 rte_eth_promiscuous_get(uint8_t port_id)
1235 struct rte_eth_dev *dev;
1237 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1239 dev = &rte_eth_devices[port_id];
1240 return dev->data->promiscuous;
1244 rte_eth_allmulticast_enable(uint8_t port_id)
1246 struct rte_eth_dev *dev;
1248 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1249 dev = &rte_eth_devices[port_id];
1251 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1252 (*dev->dev_ops->allmulticast_enable)(dev);
1253 dev->data->all_multicast = 1;
1257 rte_eth_allmulticast_disable(uint8_t port_id)
1259 struct rte_eth_dev *dev;
1261 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1262 dev = &rte_eth_devices[port_id];
1264 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1265 dev->data->all_multicast = 0;
1266 (*dev->dev_ops->allmulticast_disable)(dev);
1270 rte_eth_allmulticast_get(uint8_t port_id)
1272 struct rte_eth_dev *dev;
1274 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1276 dev = &rte_eth_devices[port_id];
1277 return dev->data->all_multicast;
1281 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1282 struct rte_eth_link *link)
1284 struct rte_eth_link *dst = link;
1285 struct rte_eth_link *src = &(dev->data->dev_link);
1287 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1288 *(uint64_t *)src) == 0)
1295 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1297 struct rte_eth_dev *dev;
1299 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1300 dev = &rte_eth_devices[port_id];
1302 if (dev->data->dev_conf.intr_conf.lsc != 0)
1303 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1305 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1306 (*dev->dev_ops->link_update)(dev, 1);
1307 *eth_link = dev->data->dev_link;
1312 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1314 struct rte_eth_dev *dev;
1316 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1317 dev = &rte_eth_devices[port_id];
1319 if (dev->data->dev_conf.intr_conf.lsc != 0)
1320 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1322 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1323 (*dev->dev_ops->link_update)(dev, 0);
1324 *eth_link = dev->data->dev_link;
1329 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1331 struct rte_eth_dev *dev;
1333 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1335 dev = &rte_eth_devices[port_id];
1336 memset(stats, 0, sizeof(*stats));
1338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1339 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1340 (*dev->dev_ops->stats_get)(dev, stats);
1345 rte_eth_stats_reset(uint8_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1350 dev = &rte_eth_devices[port_id];
1352 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1353 (*dev->dev_ops->stats_reset)(dev);
1354 dev->data->rx_mbuf_alloc_failed = 0;
1358 get_xstats_count(uint8_t port_id)
1360 struct rte_eth_dev *dev;
1363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1364 dev = &rte_eth_devices[port_id];
1365 if (dev->dev_ops->xstats_get_names_by_ids != NULL) {
1366 count = (*dev->dev_ops->xstats_get_names_by_ids)(dev, NULL,
1371 if (dev->dev_ops->xstats_get_names != NULL) {
1372 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1378 count += RTE_NB_STATS;
1379 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1381 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1387 rte_eth_xstats_get_id_by_name(uint8_t port_id, const char *xstat_name,
1390 int cnt_xstats, idx_xstat;
1392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1395 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1400 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1405 cnt_xstats = rte_eth_xstats_get_names(port_id, NULL, 0, NULL);
1406 if (cnt_xstats < 0) {
1407 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1411 /* Get id-name lookup table */
1412 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1414 if (cnt_xstats != rte_eth_xstats_get_names(
1415 port_id, xstats_names, cnt_xstats, NULL)) {
1416 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1420 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1421 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1431 rte_eth_xstats_get_names_v1607(uint8_t port_id,
1432 struct rte_eth_xstat_name *xstats_names,
1435 return rte_eth_xstats_get_names(port_id, xstats_names, size, NULL);
1437 VERSION_SYMBOL(rte_eth_xstats_get_names, _v1607, 16.07);
1440 rte_eth_xstats_get_names_v1705(uint8_t port_id,
1441 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1444 /* Get all xstats */
1446 struct rte_eth_dev *dev;
1447 int cnt_used_entries;
1448 int cnt_expected_entries;
1449 int cnt_driver_entries;
1450 uint32_t idx, id_queue;
1453 cnt_expected_entries = get_xstats_count(port_id);
1454 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1455 (int)size < cnt_expected_entries)
1456 return cnt_expected_entries;
1458 /* port_id checked in get_xstats_count() */
1459 dev = &rte_eth_devices[port_id];
1460 cnt_used_entries = 0;
1462 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1463 snprintf(xstats_names[cnt_used_entries].name,
1464 sizeof(xstats_names[0].name),
1465 "%s", rte_stats_strings[idx].name);
1468 num_q = RTE_MIN(dev->data->nb_rx_queues,
1469 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1470 for (id_queue = 0; id_queue < num_q; id_queue++) {
1471 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1472 snprintf(xstats_names[cnt_used_entries].name,
1473 sizeof(xstats_names[0].name),
1476 rte_rxq_stats_strings[idx].name);
1481 num_q = RTE_MIN(dev->data->nb_tx_queues,
1482 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1483 for (id_queue = 0; id_queue < num_q; id_queue++) {
1484 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1485 snprintf(xstats_names[cnt_used_entries].name,
1486 sizeof(xstats_names[0].name),
1489 rte_txq_stats_strings[idx].name);
1494 if (dev->dev_ops->xstats_get_names_by_ids != NULL) {
1495 /* If there are any driver-specific xstats, append them
1498 cnt_driver_entries =
1499 (*dev->dev_ops->xstats_get_names_by_ids)(
1501 xstats_names + cnt_used_entries,
1503 size - cnt_used_entries);
1504 if (cnt_driver_entries < 0)
1505 return cnt_driver_entries;
1506 cnt_used_entries += cnt_driver_entries;
1508 } else if (dev->dev_ops->xstats_get_names != NULL) {
1509 /* If there are any driver-specific xstats, append them
1512 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1514 xstats_names + cnt_used_entries,
1515 size - cnt_used_entries);
1516 if (cnt_driver_entries < 0)
1517 return cnt_driver_entries;
1518 cnt_used_entries += cnt_driver_entries;
1521 return cnt_used_entries;
1523 /* Get only xstats given by IDS */
1526 struct rte_eth_xstat_name *xstats_names_copy;
1528 len = rte_eth_xstats_get_names_v1705(port_id, NULL, 0, NULL);
1531 malloc(sizeof(struct rte_eth_xstat_name) * len);
1532 if (!xstats_names_copy) {
1533 RTE_PMD_DEBUG_TRACE(
1534 "ERROR: can't allocate memory for values_copy\n");
1535 free(xstats_names_copy);
1539 rte_eth_xstats_get_names_v1705(port_id, xstats_names_copy,
1542 for (i = 0; i < size; i++) {
1543 if (ids[i] >= len) {
1544 RTE_PMD_DEBUG_TRACE(
1545 "ERROR: id value isn't valid\n");
1548 strcpy(xstats_names[i].name,
1549 xstats_names_copy[ids[i]].name);
1551 free(xstats_names_copy);
1555 BIND_DEFAULT_SYMBOL(rte_eth_xstats_get_names, _v1705, 17.05);
1557 MAP_STATIC_SYMBOL(int
1558 rte_eth_xstats_get_names(uint8_t port_id,
1559 struct rte_eth_xstat_name *xstats_names,
1561 uint64_t *ids), rte_eth_xstats_get_names_v1705);
1563 /* retrieve ethdev extended statistics */
1565 rte_eth_xstats_get_v22(uint8_t port_id, struct rte_eth_xstat *xstats,
1568 uint64_t *values_copy;
1571 values_copy = malloc(sizeof(values_copy) * n);
1573 RTE_PMD_DEBUG_TRACE(
1574 "ERROR: Cannot allocate memory for xstats\n");
1577 size = rte_eth_xstats_get(port_id, 0, values_copy, n);
1579 for (i = 0; i < n; i++) {
1581 xstats[i].value = values_copy[i];
1586 VERSION_SYMBOL(rte_eth_xstats_get, _v22, 2.2);
1588 /* retrieve ethdev extended statistics */
1590 rte_eth_xstats_get_v1705(uint8_t port_id, uint64_t *ids, uint64_t *values,
1593 /* If need all xstats */
1595 struct rte_eth_stats eth_stats;
1596 struct rte_eth_dev *dev;
1597 unsigned int count = 0, i, q;
1598 signed int xcount = 0;
1599 uint64_t val, *stats_ptr;
1600 uint16_t nb_rxqs, nb_txqs;
1602 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1603 dev = &rte_eth_devices[port_id];
1605 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1606 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1607 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1608 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1610 /* Return generic statistics */
1611 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1612 (nb_txqs * RTE_NB_TXQ_STATS);
1615 /* implemented by the driver */
1616 if (dev->dev_ops->xstats_get_by_ids != NULL) {
1617 /* Retrieve the xstats from the driver at the end of the
1618 * xstats struct. Retrieve all xstats.
1620 xcount = (*dev->dev_ops->xstats_get_by_ids)(dev,
1622 values ? values + count : NULL,
1623 (n > count) ? n - count : 0);
1627 /* implemented by the driver */
1628 } else if (dev->dev_ops->xstats_get != NULL) {
1629 /* Retrieve the xstats from the driver at the end of the
1630 * xstats struct. Retrieve all xstats.
1631 * Compatibility for PMD without xstats_get_by_ids
1633 unsigned int size = (n > count) ? n - count : 1;
1634 struct rte_eth_xstat xstats[size];
1636 xcount = (*dev->dev_ops->xstats_get)(dev,
1637 values ? xstats : NULL, size);
1643 for (i = 0 ; i < (unsigned int)xcount; i++)
1644 values[i + count] = xstats[i].value;
1647 if (n < count + xcount || values == NULL)
1648 return count + xcount;
1650 /* now fill the xstats structure */
1652 rte_eth_stats_get(port_id, ð_stats);
1655 for (i = 0; i < RTE_NB_STATS; i++) {
1656 stats_ptr = RTE_PTR_ADD(ð_stats,
1657 rte_stats_strings[i].offset);
1659 values[count++] = val;
1663 for (q = 0; q < nb_rxqs; q++) {
1664 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1665 stats_ptr = RTE_PTR_ADD(ð_stats,
1666 rte_rxq_stats_strings[i].offset +
1667 q * sizeof(uint64_t));
1669 values[count++] = val;
1674 for (q = 0; q < nb_txqs; q++) {
1675 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1676 stats_ptr = RTE_PTR_ADD(ð_stats,
1677 rte_txq_stats_strings[i].offset +
1678 q * sizeof(uint64_t));
1680 values[count++] = val;
1684 return count + xcount;
1686 /* Need only xstats given by IDS array */
1689 uint64_t *values_copy;
1691 size = rte_eth_xstats_get_v1705(port_id, NULL, NULL, 0);
1693 values_copy = malloc(sizeof(values_copy) * size);
1695 RTE_PMD_DEBUG_TRACE(
1696 "ERROR: can't allocate memory for values_copy\n");
1700 rte_eth_xstats_get_v1705(port_id, NULL, values_copy, size);
1702 for (i = 0; i < n; i++) {
1703 if (ids[i] >= size) {
1704 RTE_PMD_DEBUG_TRACE(
1705 "ERROR: id value isn't valid\n");
1708 values[i] = values_copy[ids[i]];
1714 BIND_DEFAULT_SYMBOL(rte_eth_xstats_get, _v1705, 17.05);
1716 MAP_STATIC_SYMBOL(int
1717 rte_eth_xstats_get(uint8_t port_id, uint64_t *ids,
1718 uint64_t *values, unsigned int n), rte_eth_xstats_get_v1705);
1720 __rte_deprecated int
1721 rte_eth_xstats_get_all(uint8_t port_id, struct rte_eth_xstat *xstats,
1724 uint64_t *values_copy;
1727 values_copy = malloc(sizeof(values_copy) * n);
1729 RTE_PMD_DEBUG_TRACE(
1730 "ERROR: Cannot allocate memory for xstats\n");
1733 size = rte_eth_xstats_get(port_id, 0, values_copy, n);
1735 for (i = 0; i < n; i++) {
1737 xstats[i].value = values_copy[i];
1743 __rte_deprecated int
1744 rte_eth_xstats_get_names_all(uint8_t port_id,
1745 struct rte_eth_xstat_name *xstats_names, unsigned int n)
1747 return rte_eth_xstats_get_names(port_id, xstats_names, n, NULL);
1750 /* reset ethdev extended statistics */
1752 rte_eth_xstats_reset(uint8_t port_id)
1754 struct rte_eth_dev *dev;
1756 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1757 dev = &rte_eth_devices[port_id];
1759 /* implemented by the driver */
1760 if (dev->dev_ops->xstats_reset != NULL) {
1761 (*dev->dev_ops->xstats_reset)(dev);
1765 /* fallback to default */
1766 rte_eth_stats_reset(port_id);
1770 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1773 struct rte_eth_dev *dev;
1775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1777 dev = &rte_eth_devices[port_id];
1779 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1780 return (*dev->dev_ops->queue_stats_mapping_set)
1781 (dev, queue_id, stat_idx, is_rx);
1786 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1789 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1795 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1798 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1803 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
1805 struct rte_eth_dev *dev;
1807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1808 dev = &rte_eth_devices[port_id];
1810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
1811 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
1815 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1817 struct rte_eth_dev *dev;
1818 const struct rte_eth_desc_lim lim = {
1819 .nb_max = UINT16_MAX,
1824 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1825 dev = &rte_eth_devices[port_id];
1827 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1828 dev_info->rx_desc_lim = lim;
1829 dev_info->tx_desc_lim = lim;
1831 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1832 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1833 dev_info->driver_name = dev->data->drv_name;
1834 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1835 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1839 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1840 uint32_t *ptypes, int num)
1843 struct rte_eth_dev *dev;
1844 const uint32_t *all_ptypes;
1846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1847 dev = &rte_eth_devices[port_id];
1848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1849 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1854 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1855 if (all_ptypes[i] & ptype_mask) {
1857 ptypes[j] = all_ptypes[i];
1865 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1867 struct rte_eth_dev *dev;
1869 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1870 dev = &rte_eth_devices[port_id];
1871 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1876 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1878 struct rte_eth_dev *dev;
1880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1882 dev = &rte_eth_devices[port_id];
1883 *mtu = dev->data->mtu;
1888 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1891 struct rte_eth_dev *dev;
1893 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1894 dev = &rte_eth_devices[port_id];
1895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1897 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1899 dev->data->mtu = mtu;
1905 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1907 struct rte_eth_dev *dev;
1909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1910 dev = &rte_eth_devices[port_id];
1911 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1912 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1916 if (vlan_id > 4095) {
1917 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1918 port_id, (unsigned) vlan_id);
1921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1923 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1927 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1929 struct rte_eth_dev *dev;
1931 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1932 dev = &rte_eth_devices[port_id];
1933 if (rx_queue_id >= dev->data->nb_rx_queues) {
1934 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1938 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1939 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1945 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1946 enum rte_vlan_type vlan_type,
1949 struct rte_eth_dev *dev;
1951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1952 dev = &rte_eth_devices[port_id];
1953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1955 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1959 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1961 struct rte_eth_dev *dev;
1966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1967 dev = &rte_eth_devices[port_id];
1969 /*check which option changed by application*/
1970 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1971 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1973 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1974 mask |= ETH_VLAN_STRIP_MASK;
1977 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1978 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1980 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1981 mask |= ETH_VLAN_FILTER_MASK;
1984 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1985 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1987 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1988 mask |= ETH_VLAN_EXTEND_MASK;
1995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1996 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2002 rte_eth_dev_get_vlan_offload(uint8_t port_id)
2004 struct rte_eth_dev *dev;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2008 dev = &rte_eth_devices[port_id];
2010 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
2011 ret |= ETH_VLAN_STRIP_OFFLOAD;
2013 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
2014 ret |= ETH_VLAN_FILTER_OFFLOAD;
2016 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
2017 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2023 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
2025 struct rte_eth_dev *dev;
2027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2028 dev = &rte_eth_devices[port_id];
2029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2030 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2036 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2038 struct rte_eth_dev *dev;
2040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2041 dev = &rte_eth_devices[port_id];
2042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2043 memset(fc_conf, 0, sizeof(*fc_conf));
2044 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2048 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2050 struct rte_eth_dev *dev;
2052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2053 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2054 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2058 dev = &rte_eth_devices[port_id];
2059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2060 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2064 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
2066 struct rte_eth_dev *dev;
2068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2069 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2070 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2074 dev = &rte_eth_devices[port_id];
2075 /* High water, low water validation are device specific */
2076 if (*dev->dev_ops->priority_flow_ctrl_set)
2077 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2082 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2090 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2091 for (i = 0; i < num; i++) {
2092 if (reta_conf[i].mask)
2100 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2104 uint16_t i, idx, shift;
2110 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2114 for (i = 0; i < reta_size; i++) {
2115 idx = i / RTE_RETA_GROUP_SIZE;
2116 shift = i % RTE_RETA_GROUP_SIZE;
2117 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2118 (reta_conf[idx].reta[shift] >= max_rxq)) {
2119 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2120 "the maximum rxq index: %u\n", idx, shift,
2121 reta_conf[idx].reta[shift], max_rxq);
2130 rte_eth_dev_rss_reta_update(uint8_t port_id,
2131 struct rte_eth_rss_reta_entry64 *reta_conf,
2134 struct rte_eth_dev *dev;
2137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2138 /* Check mask bits */
2139 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2143 dev = &rte_eth_devices[port_id];
2145 /* Check entry value */
2146 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2147 dev->data->nb_rx_queues);
2151 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2152 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2156 rte_eth_dev_rss_reta_query(uint8_t port_id,
2157 struct rte_eth_rss_reta_entry64 *reta_conf,
2160 struct rte_eth_dev *dev;
2163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2165 /* Check mask bits */
2166 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2170 dev = &rte_eth_devices[port_id];
2171 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2172 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2176 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2178 struct rte_eth_dev *dev;
2179 uint16_t rss_hash_protos;
2181 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2182 rss_hash_protos = rss_conf->rss_hf;
2183 if ((rss_hash_protos != 0) &&
2184 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2185 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2189 dev = &rte_eth_devices[port_id];
2190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2191 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2195 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2196 struct rte_eth_rss_conf *rss_conf)
2198 struct rte_eth_dev *dev;
2200 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2201 dev = &rte_eth_devices[port_id];
2202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2203 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2207 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2208 struct rte_eth_udp_tunnel *udp_tunnel)
2210 struct rte_eth_dev *dev;
2212 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2213 if (udp_tunnel == NULL) {
2214 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2218 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2219 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2223 dev = &rte_eth_devices[port_id];
2224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2225 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2229 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2230 struct rte_eth_udp_tunnel *udp_tunnel)
2232 struct rte_eth_dev *dev;
2234 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2235 dev = &rte_eth_devices[port_id];
2237 if (udp_tunnel == NULL) {
2238 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2242 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2243 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2247 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2248 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2252 rte_eth_led_on(uint8_t port_id)
2254 struct rte_eth_dev *dev;
2256 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2257 dev = &rte_eth_devices[port_id];
2258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2259 return (*dev->dev_ops->dev_led_on)(dev);
2263 rte_eth_led_off(uint8_t port_id)
2265 struct rte_eth_dev *dev;
2267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2268 dev = &rte_eth_devices[port_id];
2269 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2270 return (*dev->dev_ops->dev_led_off)(dev);
2274 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2278 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2280 struct rte_eth_dev_info dev_info;
2281 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2284 rte_eth_dev_info_get(port_id, &dev_info);
2286 for (i = 0; i < dev_info.max_mac_addrs; i++)
2287 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2293 static const struct ether_addr null_mac_addr;
2296 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2299 struct rte_eth_dev *dev;
2303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2304 dev = &rte_eth_devices[port_id];
2305 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2307 if (is_zero_ether_addr(addr)) {
2308 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2312 if (pool >= ETH_64_POOLS) {
2313 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2317 index = get_mac_addr_index(port_id, addr);
2319 index = get_mac_addr_index(port_id, &null_mac_addr);
2321 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2326 pool_mask = dev->data->mac_pool_sel[index];
2328 /* Check if both MAC address and pool is already there, and do nothing */
2329 if (pool_mask & (1ULL << pool))
2334 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2336 /* Update address in NIC data structure */
2337 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2339 /* Update pool bitmap in NIC data structure */
2340 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2346 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2348 struct rte_eth_dev *dev;
2351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2352 dev = &rte_eth_devices[port_id];
2353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2355 index = get_mac_addr_index(port_id, addr);
2357 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2359 } else if (index < 0)
2360 return 0; /* Do nothing if address wasn't found */
2363 (*dev->dev_ops->mac_addr_remove)(dev, index);
2365 /* Update address in NIC data structure */
2366 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2368 /* reset pool bitmap */
2369 dev->data->mac_pool_sel[index] = 0;
2375 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2377 struct rte_eth_dev *dev;
2379 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2381 if (!is_valid_assigned_ether_addr(addr))
2384 dev = &rte_eth_devices[port_id];
2385 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2387 /* Update default address in NIC data structure */
2388 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2390 (*dev->dev_ops->mac_addr_set)(dev, addr);
2397 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2401 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2403 struct rte_eth_dev_info dev_info;
2404 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2407 rte_eth_dev_info_get(port_id, &dev_info);
2408 if (!dev->data->hash_mac_addrs)
2411 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2412 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2413 ETHER_ADDR_LEN) == 0)
2420 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2425 struct rte_eth_dev *dev;
2427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2429 dev = &rte_eth_devices[port_id];
2430 if (is_zero_ether_addr(addr)) {
2431 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2436 index = get_hash_mac_addr_index(port_id, addr);
2437 /* Check if it's already there, and do nothing */
2438 if ((index >= 0) && (on))
2443 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2444 "set in UTA\n", port_id);
2448 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2450 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2457 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2459 /* Update address in NIC data structure */
2461 ether_addr_copy(addr,
2462 &dev->data->hash_mac_addrs[index]);
2464 ether_addr_copy(&null_mac_addr,
2465 &dev->data->hash_mac_addrs[index]);
2472 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2474 struct rte_eth_dev *dev;
2476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2478 dev = &rte_eth_devices[port_id];
2480 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2481 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2484 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2487 struct rte_eth_dev *dev;
2488 struct rte_eth_dev_info dev_info;
2489 struct rte_eth_link link;
2491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2493 dev = &rte_eth_devices[port_id];
2494 rte_eth_dev_info_get(port_id, &dev_info);
2495 link = dev->data->dev_link;
2497 if (queue_idx > dev_info.max_tx_queues) {
2498 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2499 "invalid queue id=%d\n", port_id, queue_idx);
2503 if (tx_rate > link.link_speed) {
2504 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2505 "bigger than link speed= %d\n",
2506 tx_rate, link.link_speed);
2510 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2511 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2515 rte_eth_mirror_rule_set(uint8_t port_id,
2516 struct rte_eth_mirror_conf *mirror_conf,
2517 uint8_t rule_id, uint8_t on)
2519 struct rte_eth_dev *dev;
2521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2522 if (mirror_conf->rule_type == 0) {
2523 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2527 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2528 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2533 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2534 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2535 (mirror_conf->pool_mask == 0)) {
2536 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2540 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2541 mirror_conf->vlan.vlan_mask == 0) {
2542 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2546 dev = &rte_eth_devices[port_id];
2547 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2549 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2553 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2555 struct rte_eth_dev *dev;
2557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2559 dev = &rte_eth_devices[port_id];
2560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2562 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2566 rte_eth_dev_callback_register(uint8_t port_id,
2567 enum rte_eth_event_type event,
2568 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2570 struct rte_eth_dev *dev;
2571 struct rte_eth_dev_callback *user_cb;
2576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2578 dev = &rte_eth_devices[port_id];
2579 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2581 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2582 if (user_cb->cb_fn == cb_fn &&
2583 user_cb->cb_arg == cb_arg &&
2584 user_cb->event == event) {
2589 /* create a new callback. */
2590 if (user_cb == NULL) {
2591 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2592 sizeof(struct rte_eth_dev_callback), 0);
2593 if (user_cb != NULL) {
2594 user_cb->cb_fn = cb_fn;
2595 user_cb->cb_arg = cb_arg;
2596 user_cb->event = event;
2597 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2601 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2602 return (user_cb == NULL) ? -ENOMEM : 0;
2606 rte_eth_dev_callback_unregister(uint8_t port_id,
2607 enum rte_eth_event_type event,
2608 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2611 struct rte_eth_dev *dev;
2612 struct rte_eth_dev_callback *cb, *next;
2617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2619 dev = &rte_eth_devices[port_id];
2620 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2623 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2625 next = TAILQ_NEXT(cb, next);
2627 if (cb->cb_fn != cb_fn || cb->event != event ||
2628 (cb->cb_arg != (void *)-1 &&
2629 cb->cb_arg != cb_arg))
2633 * if this callback is not executing right now,
2636 if (cb->active == 0) {
2637 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2644 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2649 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2650 enum rte_eth_event_type event, void *cb_arg)
2652 struct rte_eth_dev_callback *cb_lst;
2653 struct rte_eth_dev_callback dev_cb;
2655 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2656 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2657 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2662 dev_cb.cb_arg = cb_arg;
2664 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2665 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2667 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2670 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2674 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2677 struct rte_eth_dev *dev;
2678 struct rte_intr_handle *intr_handle;
2682 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2684 dev = &rte_eth_devices[port_id];
2686 if (!dev->intr_handle) {
2687 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2691 intr_handle = dev->intr_handle;
2692 if (!intr_handle->intr_vec) {
2693 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2697 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2698 vec = intr_handle->intr_vec[qid];
2699 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2700 if (rc && rc != -EEXIST) {
2701 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2702 " op %d epfd %d vec %u\n",
2703 port_id, qid, op, epfd, vec);
2710 const struct rte_memzone *
2711 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2712 uint16_t queue_id, size_t size, unsigned align,
2715 char z_name[RTE_MEMZONE_NAMESIZE];
2716 const struct rte_memzone *mz;
2718 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2719 dev->data->drv_name, ring_name,
2720 dev->data->port_id, queue_id);
2722 mz = rte_memzone_lookup(z_name);
2726 if (rte_xen_dom0_supported())
2727 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2728 0, align, RTE_PGSIZE_2M);
2730 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2735 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2736 int epfd, int op, void *data)
2739 struct rte_eth_dev *dev;
2740 struct rte_intr_handle *intr_handle;
2743 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2745 dev = &rte_eth_devices[port_id];
2746 if (queue_id >= dev->data->nb_rx_queues) {
2747 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2751 if (!dev->intr_handle) {
2752 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2756 intr_handle = dev->intr_handle;
2757 if (!intr_handle->intr_vec) {
2758 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2762 vec = intr_handle->intr_vec[queue_id];
2763 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2764 if (rc && rc != -EEXIST) {
2765 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2766 " op %d epfd %d vec %u\n",
2767 port_id, queue_id, op, epfd, vec);
2775 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2778 struct rte_eth_dev *dev;
2780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2782 dev = &rte_eth_devices[port_id];
2784 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2785 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2789 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2792 struct rte_eth_dev *dev;
2794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2796 dev = &rte_eth_devices[port_id];
2798 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2799 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2802 #ifdef RTE_NIC_BYPASS
2803 int rte_eth_dev_bypass_init(uint8_t port_id)
2805 struct rte_eth_dev *dev;
2807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2811 (*dev->dev_ops->bypass_init)(dev);
2816 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2818 struct rte_eth_dev *dev;
2820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822 dev = &rte_eth_devices[port_id];
2823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2824 (*dev->dev_ops->bypass_state_show)(dev, state);
2829 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2831 struct rte_eth_dev *dev;
2833 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2835 dev = &rte_eth_devices[port_id];
2836 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2837 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2842 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2844 struct rte_eth_dev *dev;
2846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2848 dev = &rte_eth_devices[port_id];
2849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2850 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2855 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2857 struct rte_eth_dev *dev;
2859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2861 dev = &rte_eth_devices[port_id];
2863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2864 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2869 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2871 struct rte_eth_dev *dev;
2873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2875 dev = &rte_eth_devices[port_id];
2877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2878 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2883 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2885 struct rte_eth_dev *dev;
2887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2889 dev = &rte_eth_devices[port_id];
2891 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2892 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2897 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2899 struct rte_eth_dev *dev;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2903 dev = &rte_eth_devices[port_id];
2905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2906 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2911 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2913 struct rte_eth_dev *dev;
2915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2917 dev = &rte_eth_devices[port_id];
2919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2920 (*dev->dev_ops->bypass_wd_reset)(dev);
2926 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2928 struct rte_eth_dev *dev;
2930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2932 dev = &rte_eth_devices[port_id];
2933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2934 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2935 RTE_ETH_FILTER_NOP, NULL);
2939 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2940 enum rte_filter_op filter_op, void *arg)
2942 struct rte_eth_dev *dev;
2944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2946 dev = &rte_eth_devices[port_id];
2947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2948 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2952 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2953 rte_rx_callback_fn fn, void *user_param)
2955 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2956 rte_errno = ENOTSUP;
2959 /* check input parameters */
2960 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2961 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2965 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2973 cb->param = user_param;
2975 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2976 /* Add the callbacks in fifo order. */
2977 struct rte_eth_rxtx_callback *tail =
2978 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2981 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2988 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2994 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2995 rte_rx_callback_fn fn, void *user_param)
2997 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2998 rte_errno = ENOTSUP;
3001 /* check input parameters */
3002 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3003 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3008 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3016 cb->param = user_param;
3018 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3019 /* Add the callbacks at fisrt position*/
3020 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3022 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3023 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3029 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3030 rte_tx_callback_fn fn, void *user_param)
3032 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3033 rte_errno = ENOTSUP;
3036 /* check input parameters */
3037 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3038 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3043 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3051 cb->param = user_param;
3053 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3054 /* Add the callbacks in fifo order. */
3055 struct rte_eth_rxtx_callback *tail =
3056 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3059 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3066 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3072 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3073 struct rte_eth_rxtx_callback *user_cb)
3075 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3078 /* Check input parameters. */
3079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3080 if (user_cb == NULL ||
3081 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3084 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3085 struct rte_eth_rxtx_callback *cb;
3086 struct rte_eth_rxtx_callback **prev_cb;
3089 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3090 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3091 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3093 if (cb == user_cb) {
3094 /* Remove the user cb from the callback list. */
3095 *prev_cb = cb->next;
3100 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3106 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3107 struct rte_eth_rxtx_callback *user_cb)
3109 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3112 /* Check input parameters. */
3113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3114 if (user_cb == NULL ||
3115 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3118 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3120 struct rte_eth_rxtx_callback *cb;
3121 struct rte_eth_rxtx_callback **prev_cb;
3123 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3124 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3125 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3127 if (cb == user_cb) {
3128 /* Remove the user cb from the callback list. */
3129 *prev_cb = cb->next;
3134 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3140 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3141 struct rte_eth_rxq_info *qinfo)
3143 struct rte_eth_dev *dev;
3145 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3150 dev = &rte_eth_devices[port_id];
3151 if (queue_id >= dev->data->nb_rx_queues) {
3152 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3158 memset(qinfo, 0, sizeof(*qinfo));
3159 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3164 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3165 struct rte_eth_txq_info *qinfo)
3167 struct rte_eth_dev *dev;
3169 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3174 dev = &rte_eth_devices[port_id];
3175 if (queue_id >= dev->data->nb_tx_queues) {
3176 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3180 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3182 memset(qinfo, 0, sizeof(*qinfo));
3183 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3188 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3189 struct ether_addr *mc_addr_set,
3190 uint32_t nb_mc_addr)
3192 struct rte_eth_dev *dev;
3194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3196 dev = &rte_eth_devices[port_id];
3197 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3198 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3202 rte_eth_timesync_enable(uint8_t port_id)
3204 struct rte_eth_dev *dev;
3206 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3207 dev = &rte_eth_devices[port_id];
3209 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3210 return (*dev->dev_ops->timesync_enable)(dev);
3214 rte_eth_timesync_disable(uint8_t port_id)
3216 struct rte_eth_dev *dev;
3218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3219 dev = &rte_eth_devices[port_id];
3221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3222 return (*dev->dev_ops->timesync_disable)(dev);
3226 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3229 struct rte_eth_dev *dev;
3231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3232 dev = &rte_eth_devices[port_id];
3234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3235 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3239 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3241 struct rte_eth_dev *dev;
3243 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3244 dev = &rte_eth_devices[port_id];
3246 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3247 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3251 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3253 struct rte_eth_dev *dev;
3255 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3256 dev = &rte_eth_devices[port_id];
3258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3259 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3263 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3265 struct rte_eth_dev *dev;
3267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3268 dev = &rte_eth_devices[port_id];
3270 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3271 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3275 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3277 struct rte_eth_dev *dev;
3279 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3280 dev = &rte_eth_devices[port_id];
3282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3283 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3287 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3289 struct rte_eth_dev *dev;
3291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3293 dev = &rte_eth_devices[port_id];
3294 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3295 return (*dev->dev_ops->get_reg)(dev, info);
3299 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3301 struct rte_eth_dev *dev;
3303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3305 dev = &rte_eth_devices[port_id];
3306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3307 return (*dev->dev_ops->get_eeprom_length)(dev);
3311 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3313 struct rte_eth_dev *dev;
3315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3317 dev = &rte_eth_devices[port_id];
3318 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3319 return (*dev->dev_ops->get_eeprom)(dev, info);
3323 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3325 struct rte_eth_dev *dev;
3327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3329 dev = &rte_eth_devices[port_id];
3330 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3331 return (*dev->dev_ops->set_eeprom)(dev, info);
3335 rte_eth_dev_get_dcb_info(uint8_t port_id,
3336 struct rte_eth_dcb_info *dcb_info)
3338 struct rte_eth_dev *dev;
3340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3342 dev = &rte_eth_devices[port_id];
3343 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3345 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3346 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3350 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3351 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3353 struct rte_eth_dev *dev;
3355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3356 if (l2_tunnel == NULL) {
3357 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3361 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3362 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3366 dev = &rte_eth_devices[port_id];
3367 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3369 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3373 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3374 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3378 struct rte_eth_dev *dev;
3380 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3382 if (l2_tunnel == NULL) {
3383 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3387 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3388 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3393 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3397 dev = &rte_eth_devices[port_id];
3398 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3400 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);