1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "rte_ethdev_driver.h"
41 #include "ethdev_profile.h"
43 static int ethdev_logtype;
45 #define ethdev_log(level, fmt, ...) \
46 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
48 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
49 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
50 static uint8_t eth_dev_last_created_port;
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 rte_eth_dev_allocated(const char *name)
234 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
235 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
236 strcmp(rte_eth_devices[i].data->name, name) == 0)
237 return &rte_eth_devices[i];
243 rte_eth_dev_find_free_port(void)
247 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
248 /* Using shared name field to find a free port. */
249 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
250 RTE_ASSERT(rte_eth_devices[i].state ==
255 return RTE_MAX_ETHPORTS;
258 static struct rte_eth_dev *
259 eth_dev_get(uint16_t port_id)
261 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
263 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
264 eth_dev->state = RTE_ETH_DEV_ATTACHED;
266 eth_dev_last_created_port = port_id;
272 rte_eth_dev_allocate(const char *name)
275 struct rte_eth_dev *eth_dev = NULL;
277 rte_eth_dev_shared_data_prepare();
279 /* Synchronize port creation between primary and secondary threads. */
280 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
282 port_id = rte_eth_dev_find_free_port();
283 if (port_id == RTE_MAX_ETHPORTS) {
284 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
288 if (rte_eth_dev_allocated(name) != NULL) {
290 "Ethernet Device with name %s already allocated!",
295 eth_dev = eth_dev_get(port_id);
296 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
297 eth_dev->data->port_id = port_id;
298 eth_dev->data->mtu = ETHER_MTU;
301 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
304 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
310 * Attach to a port already registered by the primary process, which
311 * makes sure that the same device would have the same port id both
312 * in the primary and secondary process.
315 rte_eth_dev_attach_secondary(const char *name)
318 struct rte_eth_dev *eth_dev = NULL;
320 rte_eth_dev_shared_data_prepare();
322 /* Synchronize port attachment to primary port creation and release. */
323 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
325 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
326 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
329 if (i == RTE_MAX_ETHPORTS) {
331 "device %s is not driven by the primary process\n",
334 eth_dev = eth_dev_get(i);
335 RTE_ASSERT(eth_dev->data->port_id == i);
338 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
343 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
348 rte_eth_dev_shared_data_prepare();
350 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
352 eth_dev->state = RTE_ETH_DEV_UNUSED;
354 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
356 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
358 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
364 rte_eth_dev_is_valid_port(uint16_t port_id)
366 if (port_id >= RTE_MAX_ETHPORTS ||
367 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
374 rte_eth_is_valid_owner_id(uint64_t owner_id)
376 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
377 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
378 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
384 uint64_t __rte_experimental
385 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
387 while (port_id < RTE_MAX_ETHPORTS &&
388 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
389 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
390 rte_eth_devices[port_id].data->owner.id != owner_id))
393 if (port_id >= RTE_MAX_ETHPORTS)
394 return RTE_MAX_ETHPORTS;
399 int __rte_experimental
400 rte_eth_dev_owner_new(uint64_t *owner_id)
402 rte_eth_dev_shared_data_prepare();
404 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
406 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
408 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
413 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
414 const struct rte_eth_dev_owner *new_owner)
416 struct rte_eth_dev_owner *port_owner;
419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
421 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
422 !rte_eth_is_valid_owner_id(old_owner_id))
425 port_owner = &rte_eth_devices[port_id].data->owner;
426 if (port_owner->id != old_owner_id) {
427 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
428 " by %s_%016lX.\n", port_id,
429 port_owner->name, port_owner->id);
433 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
435 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
436 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
439 port_owner->id = new_owner->id;
441 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
442 new_owner->name, new_owner->id);
447 int __rte_experimental
448 rte_eth_dev_owner_set(const uint16_t port_id,
449 const struct rte_eth_dev_owner *owner)
453 rte_eth_dev_shared_data_prepare();
455 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
457 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
459 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
463 int __rte_experimental
464 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
466 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
467 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
470 rte_eth_dev_shared_data_prepare();
472 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
474 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
476 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
480 void __rte_experimental
481 rte_eth_dev_owner_delete(const uint64_t owner_id)
485 rte_eth_dev_shared_data_prepare();
487 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
489 if (rte_eth_is_valid_owner_id(owner_id)) {
490 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
491 memset(&rte_eth_devices[port_id].data->owner, 0,
492 sizeof(struct rte_eth_dev_owner));
493 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
494 " have removed.\n", owner_id);
497 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
500 int __rte_experimental
501 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
505 rte_eth_dev_shared_data_prepare();
507 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
509 if (!rte_eth_dev_is_valid_port(port_id)) {
510 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
513 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
517 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
522 rte_eth_dev_socket_id(uint16_t port_id)
524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
525 return rte_eth_devices[port_id].data->numa_node;
529 rte_eth_dev_get_sec_ctx(uint16_t port_id)
531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
532 return rte_eth_devices[port_id].security_ctx;
536 rte_eth_dev_count(void)
538 return rte_eth_dev_count_avail();
542 rte_eth_dev_count_avail(void)
549 RTE_ETH_FOREACH_DEV(p)
556 rte_eth_dev_count_total(void)
558 uint16_t port, count = 0;
560 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
561 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
568 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
575 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
579 /* shouldn't check 'rte_eth_devices[i].data',
580 * because it might be overwritten by VDEV PMD */
581 tmp = rte_eth_dev_shared_data->data[port_id].name;
587 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
592 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
596 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
597 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
598 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
608 eth_err(uint16_t port_id, int ret)
612 if (rte_eth_dev_is_removed(port_id))
617 /* attach the new device, then store port_id of the device */
619 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
621 int current = rte_eth_dev_count_total();
622 struct rte_devargs da;
625 memset(&da, 0, sizeof(da));
627 if ((devargs == NULL) || (port_id == NULL)) {
633 if (rte_devargs_parse(&da, "%s", devargs))
636 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
640 /* no point looking at the port count if no port exists */
641 if (!rte_eth_dev_count_total()) {
642 ethdev_log(ERR, "No port found for device (%s)", da.name);
647 /* if nothing happened, there is a bug here, since some driver told us
648 * it did attach a device, but did not create a port.
649 * FIXME: race condition in case of plug-out of another device
651 if (current == rte_eth_dev_count_total()) {
656 *port_id = eth_dev_last_created_port;
664 /* detach the device, then store the name of the device */
666 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
668 struct rte_device *dev;
673 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
675 dev_flags = rte_eth_devices[port_id].data->dev_flags;
676 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
678 "Port %" PRIu16 " is bonded, cannot detach", port_id);
682 dev = rte_eth_devices[port_id].device;
686 bus = rte_bus_find_by_device(dev);
690 ret = rte_eal_hotplug_remove(bus->name, dev->name);
694 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
699 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
701 uint16_t old_nb_queues = dev->data->nb_rx_queues;
705 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
706 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
707 sizeof(dev->data->rx_queues[0]) * nb_queues,
708 RTE_CACHE_LINE_SIZE);
709 if (dev->data->rx_queues == NULL) {
710 dev->data->nb_rx_queues = 0;
713 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
716 rxq = dev->data->rx_queues;
718 for (i = nb_queues; i < old_nb_queues; i++)
719 (*dev->dev_ops->rx_queue_release)(rxq[i]);
720 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
721 RTE_CACHE_LINE_SIZE);
724 if (nb_queues > old_nb_queues) {
725 uint16_t new_qs = nb_queues - old_nb_queues;
727 memset(rxq + old_nb_queues, 0,
728 sizeof(rxq[0]) * new_qs);
731 dev->data->rx_queues = rxq;
733 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
736 rxq = dev->data->rx_queues;
738 for (i = nb_queues; i < old_nb_queues; i++)
739 (*dev->dev_ops->rx_queue_release)(rxq[i]);
741 rte_free(dev->data->rx_queues);
742 dev->data->rx_queues = NULL;
744 dev->data->nb_rx_queues = nb_queues;
749 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
751 struct rte_eth_dev *dev;
753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
755 dev = &rte_eth_devices[port_id];
756 if (!dev->data->dev_started) {
758 "port %d must be started before start any queue\n", port_id);
762 if (rx_queue_id >= dev->data->nb_rx_queues) {
763 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
769 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
770 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
771 " already started\n",
772 rx_queue_id, port_id);
776 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
782 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
784 struct rte_eth_dev *dev;
786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
788 dev = &rte_eth_devices[port_id];
789 if (rx_queue_id >= dev->data->nb_rx_queues) {
790 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
796 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
797 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
798 " already stopped\n",
799 rx_queue_id, port_id);
803 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
808 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
810 struct rte_eth_dev *dev;
812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
814 dev = &rte_eth_devices[port_id];
815 if (!dev->data->dev_started) {
817 "port %d must be started before start any queue\n", port_id);
821 if (tx_queue_id >= dev->data->nb_tx_queues) {
822 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
826 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
828 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
829 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
830 " already started\n",
831 tx_queue_id, port_id);
835 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
841 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
843 struct rte_eth_dev *dev;
845 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
847 dev = &rte_eth_devices[port_id];
848 if (tx_queue_id >= dev->data->nb_tx_queues) {
849 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
855 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
856 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
857 " already stopped\n",
858 tx_queue_id, port_id);
862 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
867 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
869 uint16_t old_nb_queues = dev->data->nb_tx_queues;
873 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
874 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
875 sizeof(dev->data->tx_queues[0]) * nb_queues,
876 RTE_CACHE_LINE_SIZE);
877 if (dev->data->tx_queues == NULL) {
878 dev->data->nb_tx_queues = 0;
881 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
884 txq = dev->data->tx_queues;
886 for (i = nb_queues; i < old_nb_queues; i++)
887 (*dev->dev_ops->tx_queue_release)(txq[i]);
888 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
889 RTE_CACHE_LINE_SIZE);
892 if (nb_queues > old_nb_queues) {
893 uint16_t new_qs = nb_queues - old_nb_queues;
895 memset(txq + old_nb_queues, 0,
896 sizeof(txq[0]) * new_qs);
899 dev->data->tx_queues = txq;
901 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
904 txq = dev->data->tx_queues;
906 for (i = nb_queues; i < old_nb_queues; i++)
907 (*dev->dev_ops->tx_queue_release)(txq[i]);
909 rte_free(dev->data->tx_queues);
910 dev->data->tx_queues = NULL;
912 dev->data->nb_tx_queues = nb_queues;
917 rte_eth_speed_bitflag(uint32_t speed, int duplex)
920 case ETH_SPEED_NUM_10M:
921 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
922 case ETH_SPEED_NUM_100M:
923 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
924 case ETH_SPEED_NUM_1G:
925 return ETH_LINK_SPEED_1G;
926 case ETH_SPEED_NUM_2_5G:
927 return ETH_LINK_SPEED_2_5G;
928 case ETH_SPEED_NUM_5G:
929 return ETH_LINK_SPEED_5G;
930 case ETH_SPEED_NUM_10G:
931 return ETH_LINK_SPEED_10G;
932 case ETH_SPEED_NUM_20G:
933 return ETH_LINK_SPEED_20G;
934 case ETH_SPEED_NUM_25G:
935 return ETH_LINK_SPEED_25G;
936 case ETH_SPEED_NUM_40G:
937 return ETH_LINK_SPEED_40G;
938 case ETH_SPEED_NUM_50G:
939 return ETH_LINK_SPEED_50G;
940 case ETH_SPEED_NUM_56G:
941 return ETH_LINK_SPEED_56G;
942 case ETH_SPEED_NUM_100G:
943 return ETH_LINK_SPEED_100G;
950 * A conversion function from rxmode bitfield API.
953 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
954 uint64_t *rx_offloads)
956 uint64_t offloads = 0;
958 if (rxmode->header_split == 1)
959 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
960 if (rxmode->hw_ip_checksum == 1)
961 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
962 if (rxmode->hw_vlan_filter == 1)
963 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
964 if (rxmode->hw_vlan_strip == 1)
965 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
966 if (rxmode->hw_vlan_extend == 1)
967 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
968 if (rxmode->jumbo_frame == 1)
969 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
970 if (rxmode->hw_strip_crc == 1)
971 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
972 if (rxmode->enable_scatter == 1)
973 offloads |= DEV_RX_OFFLOAD_SCATTER;
974 if (rxmode->enable_lro == 1)
975 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
976 if (rxmode->hw_timestamp == 1)
977 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
978 if (rxmode->security == 1)
979 offloads |= DEV_RX_OFFLOAD_SECURITY;
981 *rx_offloads = offloads;
985 * A conversion function from rxmode offloads API.
988 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
989 struct rte_eth_rxmode *rxmode)
992 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
993 rxmode->header_split = 1;
995 rxmode->header_split = 0;
996 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
997 rxmode->hw_ip_checksum = 1;
999 rxmode->hw_ip_checksum = 0;
1000 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1001 rxmode->hw_vlan_filter = 1;
1003 rxmode->hw_vlan_filter = 0;
1004 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1005 rxmode->hw_vlan_strip = 1;
1007 rxmode->hw_vlan_strip = 0;
1008 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
1009 rxmode->hw_vlan_extend = 1;
1011 rxmode->hw_vlan_extend = 0;
1012 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
1013 rxmode->jumbo_frame = 1;
1015 rxmode->jumbo_frame = 0;
1016 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
1017 rxmode->hw_strip_crc = 1;
1019 rxmode->hw_strip_crc = 0;
1020 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
1021 rxmode->enable_scatter = 1;
1023 rxmode->enable_scatter = 0;
1024 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
1025 rxmode->enable_lro = 1;
1027 rxmode->enable_lro = 0;
1028 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
1029 rxmode->hw_timestamp = 1;
1031 rxmode->hw_timestamp = 0;
1032 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
1033 rxmode->security = 1;
1035 rxmode->security = 0;
1038 const char * __rte_experimental
1039 rte_eth_dev_rx_offload_name(uint64_t offload)
1041 const char *name = "UNKNOWN";
1044 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1045 if (offload == rte_rx_offload_names[i].offload) {
1046 name = rte_rx_offload_names[i].name;
1054 const char * __rte_experimental
1055 rte_eth_dev_tx_offload_name(uint64_t offload)
1057 const char *name = "UNKNOWN";
1060 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1061 if (offload == rte_tx_offload_names[i].offload) {
1062 name = rte_tx_offload_names[i].name;
1071 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1072 const struct rte_eth_conf *dev_conf)
1074 struct rte_eth_dev *dev;
1075 struct rte_eth_dev_info dev_info;
1076 struct rte_eth_conf local_conf = *dev_conf;
1079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1081 dev = &rte_eth_devices[port_id];
1083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1084 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1086 /* If number of queues specified by application for both Rx and Tx is
1087 * zero, use driver preferred values. This cannot be done individually
1088 * as it is valid for either Tx or Rx (but not both) to be zero.
1089 * If driver does not provide any preferred valued, fall back on
1092 if (nb_rx_q == 0 && nb_tx_q == 0) {
1093 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1095 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1096 nb_tx_q = dev_info.default_txportconf.nb_queues;
1098 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1101 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1102 RTE_PMD_DEBUG_TRACE(
1103 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1104 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1108 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1109 RTE_PMD_DEBUG_TRACE(
1110 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1111 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1116 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1118 if (dev->data->dev_started) {
1119 RTE_PMD_DEBUG_TRACE(
1120 "port %d must be stopped to allow configuration\n", port_id);
1125 * Convert between the offloads API to enable PMDs to support
1128 if (dev_conf->rxmode.ignore_offload_bitfield == 0) {
1129 rte_eth_convert_rx_offload_bitfield(
1130 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1132 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
1133 &local_conf.rxmode);
1136 /* Copy the dev_conf parameter into the dev structure */
1137 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1140 * Check that the numbers of RX and TX queues are not greater
1141 * than the maximum number of RX and TX queues supported by the
1142 * configured device.
1144 if (nb_rx_q > dev_info.max_rx_queues) {
1145 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1146 port_id, nb_rx_q, dev_info.max_rx_queues);
1150 if (nb_tx_q > dev_info.max_tx_queues) {
1151 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1152 port_id, nb_tx_q, dev_info.max_tx_queues);
1156 /* Check that the device supports requested interrupts */
1157 if ((dev_conf->intr_conf.lsc == 1) &&
1158 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1159 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1160 dev->device->driver->name);
1163 if ((dev_conf->intr_conf.rmv == 1) &&
1164 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1165 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1166 dev->device->driver->name);
1171 * If jumbo frames are enabled, check that the maximum RX packet
1172 * length is supported by the configured device.
1174 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1175 if (dev_conf->rxmode.max_rx_pkt_len >
1176 dev_info.max_rx_pktlen) {
1177 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1178 " > max valid value %u\n",
1180 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1181 (unsigned)dev_info.max_rx_pktlen);
1183 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1184 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1185 " < min valid value %u\n",
1187 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1188 (unsigned)ETHER_MIN_LEN);
1192 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1193 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1194 /* Use default value */
1195 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1200 * Setup new number of RX/TX queues and reconfigure device.
1202 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1204 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1209 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1211 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1213 rte_eth_dev_rx_queue_config(dev, 0);
1217 diag = (*dev->dev_ops->dev_configure)(dev);
1219 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1221 rte_eth_dev_rx_queue_config(dev, 0);
1222 rte_eth_dev_tx_queue_config(dev, 0);
1223 return eth_err(port_id, diag);
1226 /* Initialize Rx profiling if enabled at compilation time. */
1227 diag = __rte_eth_profile_rx_init(port_id, dev);
1229 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1231 rte_eth_dev_rx_queue_config(dev, 0);
1232 rte_eth_dev_tx_queue_config(dev, 0);
1233 return eth_err(port_id, diag);
1240 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1242 if (dev->data->dev_started) {
1243 RTE_PMD_DEBUG_TRACE(
1244 "port %d must be stopped to allow reset\n",
1245 dev->data->port_id);
1249 rte_eth_dev_rx_queue_config(dev, 0);
1250 rte_eth_dev_tx_queue_config(dev, 0);
1252 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1256 rte_eth_dev_config_restore(uint16_t port_id)
1258 struct rte_eth_dev *dev;
1259 struct rte_eth_dev_info dev_info;
1260 struct ether_addr *addr;
1265 dev = &rte_eth_devices[port_id];
1267 rte_eth_dev_info_get(port_id, &dev_info);
1269 /* replay MAC address configuration including default MAC */
1270 addr = &dev->data->mac_addrs[0];
1271 if (*dev->dev_ops->mac_addr_set != NULL)
1272 (*dev->dev_ops->mac_addr_set)(dev, addr);
1273 else if (*dev->dev_ops->mac_addr_add != NULL)
1274 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1276 if (*dev->dev_ops->mac_addr_add != NULL) {
1277 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1278 addr = &dev->data->mac_addrs[i];
1280 /* skip zero address */
1281 if (is_zero_ether_addr(addr))
1285 pool_mask = dev->data->mac_pool_sel[i];
1288 if (pool_mask & 1ULL)
1289 (*dev->dev_ops->mac_addr_add)(dev,
1293 } while (pool_mask);
1297 /* replay promiscuous configuration */
1298 if (rte_eth_promiscuous_get(port_id) == 1)
1299 rte_eth_promiscuous_enable(port_id);
1300 else if (rte_eth_promiscuous_get(port_id) == 0)
1301 rte_eth_promiscuous_disable(port_id);
1303 /* replay all multicast configuration */
1304 if (rte_eth_allmulticast_get(port_id) == 1)
1305 rte_eth_allmulticast_enable(port_id);
1306 else if (rte_eth_allmulticast_get(port_id) == 0)
1307 rte_eth_allmulticast_disable(port_id);
1311 rte_eth_dev_start(uint16_t port_id)
1313 struct rte_eth_dev *dev;
1316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1318 dev = &rte_eth_devices[port_id];
1320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1322 if (dev->data->dev_started != 0) {
1323 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1324 " already started\n",
1329 diag = (*dev->dev_ops->dev_start)(dev);
1331 dev->data->dev_started = 1;
1333 return eth_err(port_id, diag);
1335 rte_eth_dev_config_restore(port_id);
1337 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1339 (*dev->dev_ops->link_update)(dev, 0);
1345 rte_eth_dev_stop(uint16_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1350 dev = &rte_eth_devices[port_id];
1352 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1354 if (dev->data->dev_started == 0) {
1355 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1356 " already stopped\n",
1361 dev->data->dev_started = 0;
1362 (*dev->dev_ops->dev_stop)(dev);
1366 rte_eth_dev_set_link_up(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1375 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1379 rte_eth_dev_set_link_down(uint16_t port_id)
1381 struct rte_eth_dev *dev;
1383 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1385 dev = &rte_eth_devices[port_id];
1387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1388 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1392 rte_eth_dev_close(uint16_t port_id)
1394 struct rte_eth_dev *dev;
1396 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1397 dev = &rte_eth_devices[port_id];
1399 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1400 dev->data->dev_started = 0;
1401 (*dev->dev_ops->dev_close)(dev);
1403 dev->data->nb_rx_queues = 0;
1404 rte_free(dev->data->rx_queues);
1405 dev->data->rx_queues = NULL;
1406 dev->data->nb_tx_queues = 0;
1407 rte_free(dev->data->tx_queues);
1408 dev->data->tx_queues = NULL;
1412 rte_eth_dev_reset(uint16_t port_id)
1414 struct rte_eth_dev *dev;
1417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1418 dev = &rte_eth_devices[port_id];
1420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1422 rte_eth_dev_stop(port_id);
1423 ret = dev->dev_ops->dev_reset(dev);
1425 return eth_err(port_id, ret);
1428 int __rte_experimental
1429 rte_eth_dev_is_removed(uint16_t port_id)
1431 struct rte_eth_dev *dev;
1434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1436 dev = &rte_eth_devices[port_id];
1438 if (dev->state == RTE_ETH_DEV_REMOVED)
1441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1443 ret = dev->dev_ops->is_removed(dev);
1445 /* Device is physically removed. */
1446 dev->state = RTE_ETH_DEV_REMOVED;
1452 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1453 uint16_t nb_rx_desc, unsigned int socket_id,
1454 const struct rte_eth_rxconf *rx_conf,
1455 struct rte_mempool *mp)
1458 uint32_t mbp_buf_size;
1459 struct rte_eth_dev *dev;
1460 struct rte_eth_dev_info dev_info;
1461 struct rte_eth_rxconf local_conf;
1464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1466 dev = &rte_eth_devices[port_id];
1467 if (rx_queue_id >= dev->data->nb_rx_queues) {
1468 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1472 if (dev->data->dev_started) {
1473 RTE_PMD_DEBUG_TRACE(
1474 "port %d must be stopped to allow configuration\n", port_id);
1478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1479 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1482 * Check the size of the mbuf data buffer.
1483 * This value must be provided in the private data of the memory pool.
1484 * First check that the memory pool has a valid private data.
1486 rte_eth_dev_info_get(port_id, &dev_info);
1487 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1488 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1489 mp->name, (int) mp->private_data_size,
1490 (int) sizeof(struct rte_pktmbuf_pool_private));
1493 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1495 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1496 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1497 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1501 (int)(RTE_PKTMBUF_HEADROOM +
1502 dev_info.min_rx_bufsize),
1503 (int)RTE_PKTMBUF_HEADROOM,
1504 (int)dev_info.min_rx_bufsize);
1508 /* Use default specified by driver, if nb_rx_desc is zero */
1509 if (nb_rx_desc == 0) {
1510 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1511 /* If driver default is also zero, fall back on EAL default */
1512 if (nb_rx_desc == 0)
1513 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1516 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1517 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1518 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1520 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1521 "should be: <= %hu, = %hu, and a product of %hu\n",
1523 dev_info.rx_desc_lim.nb_max,
1524 dev_info.rx_desc_lim.nb_min,
1525 dev_info.rx_desc_lim.nb_align);
1529 rxq = dev->data->rx_queues;
1530 if (rxq[rx_queue_id]) {
1531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1533 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1534 rxq[rx_queue_id] = NULL;
1537 if (rx_conf == NULL)
1538 rx_conf = &dev_info.default_rxconf;
1540 local_conf = *rx_conf;
1541 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1543 * Reflect port offloads to queue offloads in order for
1544 * offloads to not be discarded.
1546 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1547 &local_conf.offloads);
1550 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1551 socket_id, &local_conf, mp);
1553 if (!dev->data->min_rx_buf_size ||
1554 dev->data->min_rx_buf_size > mbp_buf_size)
1555 dev->data->min_rx_buf_size = mbp_buf_size;
1558 return eth_err(port_id, ret);
1562 * A conversion function from txq_flags API.
1565 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1567 uint64_t offloads = 0;
1569 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1570 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1571 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1572 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1573 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1574 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1575 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1576 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1577 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1578 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1579 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1580 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1581 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1583 *tx_offloads = offloads;
1587 * A conversion function from offloads API.
1590 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1594 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1595 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1596 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1597 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1598 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1599 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1600 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1601 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1602 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1603 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1604 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1605 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1611 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1612 uint16_t nb_tx_desc, unsigned int socket_id,
1613 const struct rte_eth_txconf *tx_conf)
1615 struct rte_eth_dev *dev;
1616 struct rte_eth_dev_info dev_info;
1617 struct rte_eth_txconf local_conf;
1620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1622 dev = &rte_eth_devices[port_id];
1623 if (tx_queue_id >= dev->data->nb_tx_queues) {
1624 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1628 if (dev->data->dev_started) {
1629 RTE_PMD_DEBUG_TRACE(
1630 "port %d must be stopped to allow configuration\n", port_id);
1634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1635 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1637 rte_eth_dev_info_get(port_id, &dev_info);
1639 /* Use default specified by driver, if nb_tx_desc is zero */
1640 if (nb_tx_desc == 0) {
1641 nb_tx_desc = dev_info.default_txportconf.ring_size;
1642 /* If driver default is zero, fall back on EAL default */
1643 if (nb_tx_desc == 0)
1644 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1646 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1647 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1648 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1649 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1650 "should be: <= %hu, = %hu, and a product of %hu\n",
1652 dev_info.tx_desc_lim.nb_max,
1653 dev_info.tx_desc_lim.nb_min,
1654 dev_info.tx_desc_lim.nb_align);
1658 txq = dev->data->tx_queues;
1659 if (txq[tx_queue_id]) {
1660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1662 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1663 txq[tx_queue_id] = NULL;
1666 if (tx_conf == NULL)
1667 tx_conf = &dev_info.default_txconf;
1670 * Convert between the offloads API to enable PMDs to support
1673 local_conf = *tx_conf;
1674 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1675 rte_eth_convert_txq_offloads(tx_conf->offloads,
1676 &local_conf.txq_flags);
1677 /* Keep the ignore flag. */
1678 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1680 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1681 &local_conf.offloads);
1684 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1685 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1689 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1690 void *userdata __rte_unused)
1694 for (i = 0; i < unsent; i++)
1695 rte_pktmbuf_free(pkts[i]);
1699 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1702 uint64_t *count = userdata;
1705 for (i = 0; i < unsent; i++)
1706 rte_pktmbuf_free(pkts[i]);
1712 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1713 buffer_tx_error_fn cbfn, void *userdata)
1715 buffer->error_callback = cbfn;
1716 buffer->error_userdata = userdata;
1721 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1728 buffer->size = size;
1729 if (buffer->error_callback == NULL) {
1730 ret = rte_eth_tx_buffer_set_err_callback(
1731 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1738 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1740 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1743 /* Validate Input Data. Bail if not valid or not supported. */
1744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1745 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1747 /* Call driver to free pending mbufs. */
1748 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1750 return eth_err(port_id, ret);
1754 rte_eth_promiscuous_enable(uint16_t port_id)
1756 struct rte_eth_dev *dev;
1758 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1759 dev = &rte_eth_devices[port_id];
1761 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1762 (*dev->dev_ops->promiscuous_enable)(dev);
1763 dev->data->promiscuous = 1;
1767 rte_eth_promiscuous_disable(uint16_t port_id)
1769 struct rte_eth_dev *dev;
1771 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1772 dev = &rte_eth_devices[port_id];
1774 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1775 dev->data->promiscuous = 0;
1776 (*dev->dev_ops->promiscuous_disable)(dev);
1780 rte_eth_promiscuous_get(uint16_t port_id)
1782 struct rte_eth_dev *dev;
1784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1786 dev = &rte_eth_devices[port_id];
1787 return dev->data->promiscuous;
1791 rte_eth_allmulticast_enable(uint16_t port_id)
1793 struct rte_eth_dev *dev;
1795 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1796 dev = &rte_eth_devices[port_id];
1798 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1799 (*dev->dev_ops->allmulticast_enable)(dev);
1800 dev->data->all_multicast = 1;
1804 rte_eth_allmulticast_disable(uint16_t port_id)
1806 struct rte_eth_dev *dev;
1808 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1809 dev = &rte_eth_devices[port_id];
1811 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1812 dev->data->all_multicast = 0;
1813 (*dev->dev_ops->allmulticast_disable)(dev);
1817 rte_eth_allmulticast_get(uint16_t port_id)
1819 struct rte_eth_dev *dev;
1821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1823 dev = &rte_eth_devices[port_id];
1824 return dev->data->all_multicast;
1828 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1830 struct rte_eth_dev *dev;
1832 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1833 dev = &rte_eth_devices[port_id];
1835 if (dev->data->dev_conf.intr_conf.lsc &&
1836 dev->data->dev_started)
1837 rte_eth_linkstatus_get(dev, eth_link);
1839 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1840 (*dev->dev_ops->link_update)(dev, 1);
1841 *eth_link = dev->data->dev_link;
1846 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1848 struct rte_eth_dev *dev;
1850 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1851 dev = &rte_eth_devices[port_id];
1853 if (dev->data->dev_conf.intr_conf.lsc &&
1854 dev->data->dev_started)
1855 rte_eth_linkstatus_get(dev, eth_link);
1857 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1858 (*dev->dev_ops->link_update)(dev, 0);
1859 *eth_link = dev->data->dev_link;
1864 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1866 struct rte_eth_dev *dev;
1868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1870 dev = &rte_eth_devices[port_id];
1871 memset(stats, 0, sizeof(*stats));
1873 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1874 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1875 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1879 rte_eth_stats_reset(uint16_t port_id)
1881 struct rte_eth_dev *dev;
1883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1884 dev = &rte_eth_devices[port_id];
1886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1887 (*dev->dev_ops->stats_reset)(dev);
1888 dev->data->rx_mbuf_alloc_failed = 0;
1894 get_xstats_basic_count(struct rte_eth_dev *dev)
1896 uint16_t nb_rxqs, nb_txqs;
1899 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1900 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1902 count = RTE_NB_STATS;
1903 count += nb_rxqs * RTE_NB_RXQ_STATS;
1904 count += nb_txqs * RTE_NB_TXQ_STATS;
1910 get_xstats_count(uint16_t port_id)
1912 struct rte_eth_dev *dev;
1915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1916 dev = &rte_eth_devices[port_id];
1917 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1918 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1921 return eth_err(port_id, count);
1923 if (dev->dev_ops->xstats_get_names != NULL) {
1924 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1926 return eth_err(port_id, count);
1931 count += get_xstats_basic_count(dev);
1937 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1940 int cnt_xstats, idx_xstat;
1942 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1945 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1950 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1955 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1956 if (cnt_xstats < 0) {
1957 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1961 /* Get id-name lookup table */
1962 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1964 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1965 port_id, xstats_names, cnt_xstats, NULL)) {
1966 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1970 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1971 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1980 /* retrieve basic stats names */
1982 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1983 struct rte_eth_xstat_name *xstats_names)
1985 int cnt_used_entries = 0;
1986 uint32_t idx, id_queue;
1989 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1990 snprintf(xstats_names[cnt_used_entries].name,
1991 sizeof(xstats_names[0].name),
1992 "%s", rte_stats_strings[idx].name);
1995 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1996 for (id_queue = 0; id_queue < num_q; id_queue++) {
1997 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1998 snprintf(xstats_names[cnt_used_entries].name,
1999 sizeof(xstats_names[0].name),
2001 id_queue, rte_rxq_stats_strings[idx].name);
2006 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2007 for (id_queue = 0; id_queue < num_q; id_queue++) {
2008 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2009 snprintf(xstats_names[cnt_used_entries].name,
2010 sizeof(xstats_names[0].name),
2012 id_queue, rte_txq_stats_strings[idx].name);
2016 return cnt_used_entries;
2019 /* retrieve ethdev extended statistics names */
2021 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2022 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2025 struct rte_eth_xstat_name *xstats_names_copy;
2026 unsigned int no_basic_stat_requested = 1;
2027 unsigned int no_ext_stat_requested = 1;
2028 unsigned int expected_entries;
2029 unsigned int basic_count;
2030 struct rte_eth_dev *dev;
2034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2035 dev = &rte_eth_devices[port_id];
2037 basic_count = get_xstats_basic_count(dev);
2038 ret = get_xstats_count(port_id);
2041 expected_entries = (unsigned int)ret;
2043 /* Return max number of stats if no ids given */
2046 return expected_entries;
2047 else if (xstats_names && size < expected_entries)
2048 return expected_entries;
2051 if (ids && !xstats_names)
2054 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2055 uint64_t ids_copy[size];
2057 for (i = 0; i < size; i++) {
2058 if (ids[i] < basic_count) {
2059 no_basic_stat_requested = 0;
2064 * Convert ids to xstats ids that PMD knows.
2065 * ids known by user are basic + extended stats.
2067 ids_copy[i] = ids[i] - basic_count;
2070 if (no_basic_stat_requested)
2071 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2072 xstats_names, ids_copy, size);
2075 /* Retrieve all stats */
2077 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2079 if (num_stats < 0 || num_stats > (int)expected_entries)
2082 return expected_entries;
2085 xstats_names_copy = calloc(expected_entries,
2086 sizeof(struct rte_eth_xstat_name));
2088 if (!xstats_names_copy) {
2089 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2094 for (i = 0; i < size; i++) {
2095 if (ids[i] >= basic_count) {
2096 no_ext_stat_requested = 0;
2102 /* Fill xstats_names_copy structure */
2103 if (ids && no_ext_stat_requested) {
2104 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2106 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2109 free(xstats_names_copy);
2115 for (i = 0; i < size; i++) {
2116 if (ids[i] >= expected_entries) {
2117 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2118 free(xstats_names_copy);
2121 xstats_names[i] = xstats_names_copy[ids[i]];
2124 free(xstats_names_copy);
2129 rte_eth_xstats_get_names(uint16_t port_id,
2130 struct rte_eth_xstat_name *xstats_names,
2133 struct rte_eth_dev *dev;
2134 int cnt_used_entries;
2135 int cnt_expected_entries;
2136 int cnt_driver_entries;
2138 cnt_expected_entries = get_xstats_count(port_id);
2139 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2140 (int)size < cnt_expected_entries)
2141 return cnt_expected_entries;
2143 /* port_id checked in get_xstats_count() */
2144 dev = &rte_eth_devices[port_id];
2146 cnt_used_entries = rte_eth_basic_stats_get_names(
2149 if (dev->dev_ops->xstats_get_names != NULL) {
2150 /* If there are any driver-specific xstats, append them
2153 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2155 xstats_names + cnt_used_entries,
2156 size - cnt_used_entries);
2157 if (cnt_driver_entries < 0)
2158 return eth_err(port_id, cnt_driver_entries);
2159 cnt_used_entries += cnt_driver_entries;
2162 return cnt_used_entries;
2167 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2169 struct rte_eth_dev *dev;
2170 struct rte_eth_stats eth_stats;
2171 unsigned int count = 0, i, q;
2172 uint64_t val, *stats_ptr;
2173 uint16_t nb_rxqs, nb_txqs;
2176 ret = rte_eth_stats_get(port_id, ð_stats);
2180 dev = &rte_eth_devices[port_id];
2182 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2183 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2186 for (i = 0; i < RTE_NB_STATS; i++) {
2187 stats_ptr = RTE_PTR_ADD(ð_stats,
2188 rte_stats_strings[i].offset);
2190 xstats[count++].value = val;
2194 for (q = 0; q < nb_rxqs; q++) {
2195 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2196 stats_ptr = RTE_PTR_ADD(ð_stats,
2197 rte_rxq_stats_strings[i].offset +
2198 q * sizeof(uint64_t));
2200 xstats[count++].value = val;
2205 for (q = 0; q < nb_txqs; q++) {
2206 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2207 stats_ptr = RTE_PTR_ADD(ð_stats,
2208 rte_txq_stats_strings[i].offset +
2209 q * sizeof(uint64_t));
2211 xstats[count++].value = val;
2217 /* retrieve ethdev extended statistics */
2219 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2220 uint64_t *values, unsigned int size)
2222 unsigned int no_basic_stat_requested = 1;
2223 unsigned int no_ext_stat_requested = 1;
2224 unsigned int num_xstats_filled;
2225 unsigned int basic_count;
2226 uint16_t expected_entries;
2227 struct rte_eth_dev *dev;
2231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2232 ret = get_xstats_count(port_id);
2235 expected_entries = (uint16_t)ret;
2236 struct rte_eth_xstat xstats[expected_entries];
2237 dev = &rte_eth_devices[port_id];
2238 basic_count = get_xstats_basic_count(dev);
2240 /* Return max number of stats if no ids given */
2243 return expected_entries;
2244 else if (values && size < expected_entries)
2245 return expected_entries;
2251 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2252 unsigned int basic_count = get_xstats_basic_count(dev);
2253 uint64_t ids_copy[size];
2255 for (i = 0; i < size; i++) {
2256 if (ids[i] < basic_count) {
2257 no_basic_stat_requested = 0;
2262 * Convert ids to xstats ids that PMD knows.
2263 * ids known by user are basic + extended stats.
2265 ids_copy[i] = ids[i] - basic_count;
2268 if (no_basic_stat_requested)
2269 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2274 for (i = 0; i < size; i++) {
2275 if (ids[i] >= basic_count) {
2276 no_ext_stat_requested = 0;
2282 /* Fill the xstats structure */
2283 if (ids && no_ext_stat_requested)
2284 ret = rte_eth_basic_stats_get(port_id, xstats);
2286 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2290 num_xstats_filled = (unsigned int)ret;
2292 /* Return all stats */
2294 for (i = 0; i < num_xstats_filled; i++)
2295 values[i] = xstats[i].value;
2296 return expected_entries;
2300 for (i = 0; i < size; i++) {
2301 if (ids[i] >= expected_entries) {
2302 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2305 values[i] = xstats[ids[i]].value;
2311 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2314 struct rte_eth_dev *dev;
2315 unsigned int count = 0, i;
2316 signed int xcount = 0;
2317 uint16_t nb_rxqs, nb_txqs;
2320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2322 dev = &rte_eth_devices[port_id];
2324 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2325 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2327 /* Return generic statistics */
2328 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2329 (nb_txqs * RTE_NB_TXQ_STATS);
2331 /* implemented by the driver */
2332 if (dev->dev_ops->xstats_get != NULL) {
2333 /* Retrieve the xstats from the driver at the end of the
2336 xcount = (*dev->dev_ops->xstats_get)(dev,
2337 xstats ? xstats + count : NULL,
2338 (n > count) ? n - count : 0);
2341 return eth_err(port_id, xcount);
2344 if (n < count + xcount || xstats == NULL)
2345 return count + xcount;
2347 /* now fill the xstats structure */
2348 ret = rte_eth_basic_stats_get(port_id, xstats);
2353 for (i = 0; i < count; i++)
2355 /* add an offset to driver-specific stats */
2356 for ( ; i < count + xcount; i++)
2357 xstats[i].id += count;
2359 return count + xcount;
2362 /* reset ethdev extended statistics */
2364 rte_eth_xstats_reset(uint16_t port_id)
2366 struct rte_eth_dev *dev;
2368 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2369 dev = &rte_eth_devices[port_id];
2371 /* implemented by the driver */
2372 if (dev->dev_ops->xstats_reset != NULL) {
2373 (*dev->dev_ops->xstats_reset)(dev);
2377 /* fallback to default */
2378 rte_eth_stats_reset(port_id);
2382 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2385 struct rte_eth_dev *dev;
2387 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2389 dev = &rte_eth_devices[port_id];
2391 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2392 return (*dev->dev_ops->queue_stats_mapping_set)
2393 (dev, queue_id, stat_idx, is_rx);
2398 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2401 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2402 stat_idx, STAT_QMAP_TX));
2407 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2410 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2411 stat_idx, STAT_QMAP_RX));
2415 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2417 struct rte_eth_dev *dev;
2419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2420 dev = &rte_eth_devices[port_id];
2422 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2423 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2424 fw_version, fw_size));
2428 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2430 struct rte_eth_dev *dev;
2431 const struct rte_eth_desc_lim lim = {
2432 .nb_max = UINT16_MAX,
2437 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2438 dev = &rte_eth_devices[port_id];
2440 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2441 dev_info->rx_desc_lim = lim;
2442 dev_info->tx_desc_lim = lim;
2443 dev_info->device = dev->device;
2445 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2446 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2447 dev_info->driver_name = dev->device->driver->name;
2448 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2449 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2453 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2454 uint32_t *ptypes, int num)
2457 struct rte_eth_dev *dev;
2458 const uint32_t *all_ptypes;
2460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2461 dev = &rte_eth_devices[port_id];
2462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2463 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2468 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2469 if (all_ptypes[i] & ptype_mask) {
2471 ptypes[j] = all_ptypes[i];
2479 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2481 struct rte_eth_dev *dev;
2483 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2484 dev = &rte_eth_devices[port_id];
2485 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2490 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2492 struct rte_eth_dev *dev;
2494 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2496 dev = &rte_eth_devices[port_id];
2497 *mtu = dev->data->mtu;
2502 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2505 struct rte_eth_dev *dev;
2507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2508 dev = &rte_eth_devices[port_id];
2509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2511 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2513 dev->data->mtu = mtu;
2515 return eth_err(port_id, ret);
2519 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2521 struct rte_eth_dev *dev;
2524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2525 dev = &rte_eth_devices[port_id];
2526 if (!(dev->data->dev_conf.rxmode.offloads &
2527 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2528 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2532 if (vlan_id > 4095) {
2533 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2534 port_id, (unsigned) vlan_id);
2537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2539 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2541 struct rte_vlan_filter_conf *vfc;
2545 vfc = &dev->data->vlan_filter_conf;
2546 vidx = vlan_id / 64;
2547 vbit = vlan_id % 64;
2550 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2552 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2555 return eth_err(port_id, ret);
2559 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2562 struct rte_eth_dev *dev;
2564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2565 dev = &rte_eth_devices[port_id];
2566 if (rx_queue_id >= dev->data->nb_rx_queues) {
2567 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2571 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2572 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2578 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2579 enum rte_vlan_type vlan_type,
2582 struct rte_eth_dev *dev;
2584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2585 dev = &rte_eth_devices[port_id];
2586 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2588 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2593 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2595 struct rte_eth_dev *dev;
2599 uint64_t orig_offloads;
2601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2602 dev = &rte_eth_devices[port_id];
2604 /* save original values in case of failure */
2605 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2607 /*check which option changed by application*/
2608 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2609 org = !!(dev->data->dev_conf.rxmode.offloads &
2610 DEV_RX_OFFLOAD_VLAN_STRIP);
2613 dev->data->dev_conf.rxmode.offloads |=
2614 DEV_RX_OFFLOAD_VLAN_STRIP;
2616 dev->data->dev_conf.rxmode.offloads &=
2617 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2618 mask |= ETH_VLAN_STRIP_MASK;
2621 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2622 org = !!(dev->data->dev_conf.rxmode.offloads &
2623 DEV_RX_OFFLOAD_VLAN_FILTER);
2626 dev->data->dev_conf.rxmode.offloads |=
2627 DEV_RX_OFFLOAD_VLAN_FILTER;
2629 dev->data->dev_conf.rxmode.offloads &=
2630 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2631 mask |= ETH_VLAN_FILTER_MASK;
2634 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2635 org = !!(dev->data->dev_conf.rxmode.offloads &
2636 DEV_RX_OFFLOAD_VLAN_EXTEND);
2639 dev->data->dev_conf.rxmode.offloads |=
2640 DEV_RX_OFFLOAD_VLAN_EXTEND;
2642 dev->data->dev_conf.rxmode.offloads &=
2643 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2644 mask |= ETH_VLAN_EXTEND_MASK;
2651 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2654 * Convert to the offload bitfield API just in case the underlying PMD
2655 * still supporting it.
2657 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2658 &dev->data->dev_conf.rxmode);
2659 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2661 /* hit an error restore original values */
2662 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2663 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2664 &dev->data->dev_conf.rxmode);
2667 return eth_err(port_id, ret);
2671 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2673 struct rte_eth_dev *dev;
2676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2677 dev = &rte_eth_devices[port_id];
2679 if (dev->data->dev_conf.rxmode.offloads &
2680 DEV_RX_OFFLOAD_VLAN_STRIP)
2681 ret |= ETH_VLAN_STRIP_OFFLOAD;
2683 if (dev->data->dev_conf.rxmode.offloads &
2684 DEV_RX_OFFLOAD_VLAN_FILTER)
2685 ret |= ETH_VLAN_FILTER_OFFLOAD;
2687 if (dev->data->dev_conf.rxmode.offloads &
2688 DEV_RX_OFFLOAD_VLAN_EXTEND)
2689 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2695 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2697 struct rte_eth_dev *dev;
2699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2700 dev = &rte_eth_devices[port_id];
2701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2703 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2707 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2709 struct rte_eth_dev *dev;
2711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2712 dev = &rte_eth_devices[port_id];
2713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2714 memset(fc_conf, 0, sizeof(*fc_conf));
2715 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2719 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2721 struct rte_eth_dev *dev;
2723 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2724 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2725 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2729 dev = &rte_eth_devices[port_id];
2730 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2731 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2735 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2736 struct rte_eth_pfc_conf *pfc_conf)
2738 struct rte_eth_dev *dev;
2740 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2741 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2742 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2746 dev = &rte_eth_devices[port_id];
2747 /* High water, low water validation are device specific */
2748 if (*dev->dev_ops->priority_flow_ctrl_set)
2749 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2755 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2763 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2764 for (i = 0; i < num; i++) {
2765 if (reta_conf[i].mask)
2773 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2777 uint16_t i, idx, shift;
2783 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2787 for (i = 0; i < reta_size; i++) {
2788 idx = i / RTE_RETA_GROUP_SIZE;
2789 shift = i % RTE_RETA_GROUP_SIZE;
2790 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2791 (reta_conf[idx].reta[shift] >= max_rxq)) {
2792 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2793 "the maximum rxq index: %u\n", idx, shift,
2794 reta_conf[idx].reta[shift], max_rxq);
2803 rte_eth_dev_rss_reta_update(uint16_t port_id,
2804 struct rte_eth_rss_reta_entry64 *reta_conf,
2807 struct rte_eth_dev *dev;
2810 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2811 /* Check mask bits */
2812 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2816 dev = &rte_eth_devices[port_id];
2818 /* Check entry value */
2819 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2820 dev->data->nb_rx_queues);
2824 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2825 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2830 rte_eth_dev_rss_reta_query(uint16_t port_id,
2831 struct rte_eth_rss_reta_entry64 *reta_conf,
2834 struct rte_eth_dev *dev;
2837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2839 /* Check mask bits */
2840 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2844 dev = &rte_eth_devices[port_id];
2845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2846 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2851 rte_eth_dev_rss_hash_update(uint16_t port_id,
2852 struct rte_eth_rss_conf *rss_conf)
2854 struct rte_eth_dev *dev;
2856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2857 dev = &rte_eth_devices[port_id];
2858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2859 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2864 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2865 struct rte_eth_rss_conf *rss_conf)
2867 struct rte_eth_dev *dev;
2869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2870 dev = &rte_eth_devices[port_id];
2871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2872 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2877 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2878 struct rte_eth_udp_tunnel *udp_tunnel)
2880 struct rte_eth_dev *dev;
2882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2883 if (udp_tunnel == NULL) {
2884 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2888 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2889 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2893 dev = &rte_eth_devices[port_id];
2894 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2895 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2900 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2901 struct rte_eth_udp_tunnel *udp_tunnel)
2903 struct rte_eth_dev *dev;
2905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2906 dev = &rte_eth_devices[port_id];
2908 if (udp_tunnel == NULL) {
2909 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2913 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2914 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2918 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2919 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2924 rte_eth_led_on(uint16_t port_id)
2926 struct rte_eth_dev *dev;
2928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2929 dev = &rte_eth_devices[port_id];
2930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2931 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2935 rte_eth_led_off(uint16_t port_id)
2937 struct rte_eth_dev *dev;
2939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2940 dev = &rte_eth_devices[port_id];
2941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2942 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2946 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2950 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2952 struct rte_eth_dev_info dev_info;
2953 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2957 rte_eth_dev_info_get(port_id, &dev_info);
2959 for (i = 0; i < dev_info.max_mac_addrs; i++)
2960 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2966 static const struct ether_addr null_mac_addr;
2969 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2972 struct rte_eth_dev *dev;
2977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2978 dev = &rte_eth_devices[port_id];
2979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2981 if (is_zero_ether_addr(addr)) {
2982 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2986 if (pool >= ETH_64_POOLS) {
2987 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2991 index = get_mac_addr_index(port_id, addr);
2993 index = get_mac_addr_index(port_id, &null_mac_addr);
2995 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3000 pool_mask = dev->data->mac_pool_sel[index];
3002 /* Check if both MAC address and pool is already there, and do nothing */
3003 if (pool_mask & (1ULL << pool))
3008 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3011 /* Update address in NIC data structure */
3012 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3014 /* Update pool bitmap in NIC data structure */
3015 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3018 return eth_err(port_id, ret);
3022 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3024 struct rte_eth_dev *dev;
3027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3028 dev = &rte_eth_devices[port_id];
3029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3031 index = get_mac_addr_index(port_id, addr);
3033 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
3035 } else if (index < 0)
3036 return 0; /* Do nothing if address wasn't found */
3039 (*dev->dev_ops->mac_addr_remove)(dev, index);
3041 /* Update address in NIC data structure */
3042 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3044 /* reset pool bitmap */
3045 dev->data->mac_pool_sel[index] = 0;
3051 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3053 struct rte_eth_dev *dev;
3056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3058 if (!is_valid_assigned_ether_addr(addr))
3061 dev = &rte_eth_devices[port_id];
3062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3064 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3068 /* Update default address in NIC data structure */
3069 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3076 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3080 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3082 struct rte_eth_dev_info dev_info;
3083 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3086 rte_eth_dev_info_get(port_id, &dev_info);
3087 if (!dev->data->hash_mac_addrs)
3090 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3091 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3092 ETHER_ADDR_LEN) == 0)
3099 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3104 struct rte_eth_dev *dev;
3106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3108 dev = &rte_eth_devices[port_id];
3109 if (is_zero_ether_addr(addr)) {
3110 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3115 index = get_hash_mac_addr_index(port_id, addr);
3116 /* Check if it's already there, and do nothing */
3117 if ((index >= 0) && on)
3122 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3123 "set in UTA\n", port_id);
3127 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3129 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3135 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3136 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3138 /* Update address in NIC data structure */
3140 ether_addr_copy(addr,
3141 &dev->data->hash_mac_addrs[index]);
3143 ether_addr_copy(&null_mac_addr,
3144 &dev->data->hash_mac_addrs[index]);
3147 return eth_err(port_id, ret);
3151 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3153 struct rte_eth_dev *dev;
3155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3157 dev = &rte_eth_devices[port_id];
3159 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3160 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3164 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3167 struct rte_eth_dev *dev;
3168 struct rte_eth_dev_info dev_info;
3169 struct rte_eth_link link;
3171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3173 dev = &rte_eth_devices[port_id];
3174 rte_eth_dev_info_get(port_id, &dev_info);
3175 link = dev->data->dev_link;
3177 if (queue_idx > dev_info.max_tx_queues) {
3178 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3179 "invalid queue id=%d\n", port_id, queue_idx);
3183 if (tx_rate > link.link_speed) {
3184 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3185 "bigger than link speed= %d\n",
3186 tx_rate, link.link_speed);
3190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3191 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3192 queue_idx, tx_rate));
3196 rte_eth_mirror_rule_set(uint16_t port_id,
3197 struct rte_eth_mirror_conf *mirror_conf,
3198 uint8_t rule_id, uint8_t on)
3200 struct rte_eth_dev *dev;
3202 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3203 if (mirror_conf->rule_type == 0) {
3204 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3208 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3209 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3214 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3215 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3216 (mirror_conf->pool_mask == 0)) {
3217 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3221 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3222 mirror_conf->vlan.vlan_mask == 0) {
3223 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3227 dev = &rte_eth_devices[port_id];
3228 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3230 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3231 mirror_conf, rule_id, on));
3235 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3237 struct rte_eth_dev *dev;
3239 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3241 dev = &rte_eth_devices[port_id];
3242 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3244 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3248 RTE_INIT(eth_dev_init_cb_lists)
3252 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3253 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3257 rte_eth_dev_callback_register(uint16_t port_id,
3258 enum rte_eth_event_type event,
3259 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3261 struct rte_eth_dev *dev;
3262 struct rte_eth_dev_callback *user_cb;
3263 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3269 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3270 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3274 if (port_id == RTE_ETH_ALL) {
3276 last_port = RTE_MAX_ETHPORTS - 1;
3278 next_port = last_port = port_id;
3281 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3284 dev = &rte_eth_devices[next_port];
3286 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3287 if (user_cb->cb_fn == cb_fn &&
3288 user_cb->cb_arg == cb_arg &&
3289 user_cb->event == event) {
3294 /* create a new callback. */
3295 if (user_cb == NULL) {
3296 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3297 sizeof(struct rte_eth_dev_callback), 0);
3298 if (user_cb != NULL) {
3299 user_cb->cb_fn = cb_fn;
3300 user_cb->cb_arg = cb_arg;
3301 user_cb->event = event;
3302 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3305 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3306 rte_eth_dev_callback_unregister(port_id, event,
3312 } while (++next_port <= last_port);
3314 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3319 rte_eth_dev_callback_unregister(uint16_t port_id,
3320 enum rte_eth_event_type event,
3321 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3324 struct rte_eth_dev *dev;
3325 struct rte_eth_dev_callback *cb, *next;
3326 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3332 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3333 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3337 if (port_id == RTE_ETH_ALL) {
3339 last_port = RTE_MAX_ETHPORTS - 1;
3341 next_port = last_port = port_id;
3344 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3347 dev = &rte_eth_devices[next_port];
3349 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3352 next = TAILQ_NEXT(cb, next);
3354 if (cb->cb_fn != cb_fn || cb->event != event ||
3355 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3359 * if this callback is not executing right now,
3362 if (cb->active == 0) {
3363 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3369 } while (++next_port <= last_port);
3371 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3376 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3377 enum rte_eth_event_type event, void *ret_param)
3379 struct rte_eth_dev_callback *cb_lst;
3380 struct rte_eth_dev_callback dev_cb;
3383 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3384 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3385 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3389 if (ret_param != NULL)
3390 dev_cb.ret_param = ret_param;
3392 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3393 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3394 dev_cb.cb_arg, dev_cb.ret_param);
3395 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3398 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3403 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3406 struct rte_eth_dev *dev;
3407 struct rte_intr_handle *intr_handle;
3411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3413 dev = &rte_eth_devices[port_id];
3415 if (!dev->intr_handle) {
3416 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3420 intr_handle = dev->intr_handle;
3421 if (!intr_handle->intr_vec) {
3422 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3426 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3427 vec = intr_handle->intr_vec[qid];
3428 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3429 if (rc && rc != -EEXIST) {
3430 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3431 " op %d epfd %d vec %u\n",
3432 port_id, qid, op, epfd, vec);
3439 const struct rte_memzone *
3440 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3441 uint16_t queue_id, size_t size, unsigned align,
3444 char z_name[RTE_MEMZONE_NAMESIZE];
3445 const struct rte_memzone *mz;
3447 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3448 dev->device->driver->name, ring_name,
3449 dev->data->port_id, queue_id);
3451 mz = rte_memzone_lookup(z_name);
3455 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3456 RTE_MEMZONE_IOVA_CONTIG, align);
3460 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3461 int epfd, int op, void *data)
3464 struct rte_eth_dev *dev;
3465 struct rte_intr_handle *intr_handle;
3468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3470 dev = &rte_eth_devices[port_id];
3471 if (queue_id >= dev->data->nb_rx_queues) {
3472 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3476 if (!dev->intr_handle) {
3477 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3481 intr_handle = dev->intr_handle;
3482 if (!intr_handle->intr_vec) {
3483 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3487 vec = intr_handle->intr_vec[queue_id];
3488 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3489 if (rc && rc != -EEXIST) {
3490 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3491 " op %d epfd %d vec %u\n",
3492 port_id, queue_id, op, epfd, vec);
3500 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3503 struct rte_eth_dev *dev;
3505 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3507 dev = &rte_eth_devices[port_id];
3509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3510 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3515 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3518 struct rte_eth_dev *dev;
3520 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3522 dev = &rte_eth_devices[port_id];
3524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3525 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3531 rte_eth_dev_filter_supported(uint16_t port_id,
3532 enum rte_filter_type filter_type)
3534 struct rte_eth_dev *dev;
3536 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3538 dev = &rte_eth_devices[port_id];
3539 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3540 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3541 RTE_ETH_FILTER_NOP, NULL);
3545 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3546 enum rte_filter_op filter_op, void *arg)
3548 struct rte_eth_dev *dev;
3550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3552 dev = &rte_eth_devices[port_id];
3553 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3554 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3558 const struct rte_eth_rxtx_callback *
3559 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3560 rte_rx_callback_fn fn, void *user_param)
3562 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3563 rte_errno = ENOTSUP;
3566 /* check input parameters */
3567 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3568 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3572 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3580 cb->param = user_param;
3582 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3583 /* Add the callbacks in fifo order. */
3584 struct rte_eth_rxtx_callback *tail =
3585 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3588 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3595 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3600 const struct rte_eth_rxtx_callback *
3601 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3602 rte_rx_callback_fn fn, void *user_param)
3604 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3605 rte_errno = ENOTSUP;
3608 /* check input parameters */
3609 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3610 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3615 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3623 cb->param = user_param;
3625 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3626 /* Add the callbacks at fisrt position*/
3627 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3629 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3630 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3635 const struct rte_eth_rxtx_callback *
3636 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3637 rte_tx_callback_fn fn, void *user_param)
3639 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3640 rte_errno = ENOTSUP;
3643 /* check input parameters */
3644 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3645 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3650 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3658 cb->param = user_param;
3660 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3661 /* Add the callbacks in fifo order. */
3662 struct rte_eth_rxtx_callback *tail =
3663 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3666 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3673 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3679 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3680 const struct rte_eth_rxtx_callback *user_cb)
3682 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3685 /* Check input parameters. */
3686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3687 if (user_cb == NULL ||
3688 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3691 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3692 struct rte_eth_rxtx_callback *cb;
3693 struct rte_eth_rxtx_callback **prev_cb;
3696 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3697 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3698 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3700 if (cb == user_cb) {
3701 /* Remove the user cb from the callback list. */
3702 *prev_cb = cb->next;
3707 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3713 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3714 const struct rte_eth_rxtx_callback *user_cb)
3716 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3719 /* Check input parameters. */
3720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3721 if (user_cb == NULL ||
3722 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3725 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3727 struct rte_eth_rxtx_callback *cb;
3728 struct rte_eth_rxtx_callback **prev_cb;
3730 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3731 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3732 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3734 if (cb == user_cb) {
3735 /* Remove the user cb from the callback list. */
3736 *prev_cb = cb->next;
3741 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3747 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3748 struct rte_eth_rxq_info *qinfo)
3750 struct rte_eth_dev *dev;
3752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3757 dev = &rte_eth_devices[port_id];
3758 if (queue_id >= dev->data->nb_rx_queues) {
3759 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3763 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3765 memset(qinfo, 0, sizeof(*qinfo));
3766 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3771 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3772 struct rte_eth_txq_info *qinfo)
3774 struct rte_eth_dev *dev;
3776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3781 dev = &rte_eth_devices[port_id];
3782 if (queue_id >= dev->data->nb_tx_queues) {
3783 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3787 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3789 memset(qinfo, 0, sizeof(*qinfo));
3790 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3795 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3796 struct ether_addr *mc_addr_set,
3797 uint32_t nb_mc_addr)
3799 struct rte_eth_dev *dev;
3801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3803 dev = &rte_eth_devices[port_id];
3804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3805 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3806 mc_addr_set, nb_mc_addr));
3810 rte_eth_timesync_enable(uint16_t port_id)
3812 struct rte_eth_dev *dev;
3814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3815 dev = &rte_eth_devices[port_id];
3817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3818 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3822 rte_eth_timesync_disable(uint16_t port_id)
3824 struct rte_eth_dev *dev;
3826 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3827 dev = &rte_eth_devices[port_id];
3829 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3830 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3834 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3837 struct rte_eth_dev *dev;
3839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3840 dev = &rte_eth_devices[port_id];
3842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3843 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3844 (dev, timestamp, flags));
3848 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3849 struct timespec *timestamp)
3851 struct rte_eth_dev *dev;
3853 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3854 dev = &rte_eth_devices[port_id];
3856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3857 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3862 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3864 struct rte_eth_dev *dev;
3866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3867 dev = &rte_eth_devices[port_id];
3869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3870 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3875 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3877 struct rte_eth_dev *dev;
3879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3880 dev = &rte_eth_devices[port_id];
3882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3883 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3888 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3890 struct rte_eth_dev *dev;
3892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3893 dev = &rte_eth_devices[port_id];
3895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3896 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3901 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3903 struct rte_eth_dev *dev;
3905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3907 dev = &rte_eth_devices[port_id];
3908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3909 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3913 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3915 struct rte_eth_dev *dev;
3917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3919 dev = &rte_eth_devices[port_id];
3920 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3921 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3925 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3927 struct rte_eth_dev *dev;
3929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3931 dev = &rte_eth_devices[port_id];
3932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3933 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3937 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3939 struct rte_eth_dev *dev;
3941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3943 dev = &rte_eth_devices[port_id];
3944 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3945 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
3949 rte_eth_dev_get_dcb_info(uint16_t port_id,
3950 struct rte_eth_dcb_info *dcb_info)
3952 struct rte_eth_dev *dev;
3954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3956 dev = &rte_eth_devices[port_id];
3957 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3960 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
3964 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3965 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3967 struct rte_eth_dev *dev;
3969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3970 if (l2_tunnel == NULL) {
3971 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3975 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3976 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3980 dev = &rte_eth_devices[port_id];
3981 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3983 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
3988 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3989 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3993 struct rte_eth_dev *dev;
3995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3997 if (l2_tunnel == NULL) {
3998 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4002 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4003 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4008 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4012 dev = &rte_eth_devices[port_id];
4013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4015 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4016 l2_tunnel, mask, en));
4020 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4021 const struct rte_eth_desc_lim *desc_lim)
4023 if (desc_lim->nb_align != 0)
4024 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4026 if (desc_lim->nb_max != 0)
4027 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4029 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4033 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4034 uint16_t *nb_rx_desc,
4035 uint16_t *nb_tx_desc)
4037 struct rte_eth_dev *dev;
4038 struct rte_eth_dev_info dev_info;
4040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4042 dev = &rte_eth_devices[port_id];
4043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4045 rte_eth_dev_info_get(port_id, &dev_info);
4047 if (nb_rx_desc != NULL)
4048 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4050 if (nb_tx_desc != NULL)
4051 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4057 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4059 struct rte_eth_dev *dev;
4061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4066 dev = &rte_eth_devices[port_id];
4068 if (*dev->dev_ops->pool_ops_supported == NULL)
4069 return 1; /* all pools are supported */
4071 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4074 RTE_INIT(ethdev_init_log);
4076 ethdev_init_log(void)
4078 ethdev_logtype = rte_log_register("lib.ethdev");
4079 if (ethdev_logtype >= 0)
4080 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);