4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
70 #include "ethdev_profile.h"
72 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74 static struct rte_eth_dev_data *rte_eth_dev_data;
75 static uint8_t eth_dev_last_created_port;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 void *ret_param; /**< Return parameter */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
143 rte_eth_find_next(uint16_t port_id)
145 while (port_id < RTE_MAX_ETHPORTS &&
146 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
149 if (port_id >= RTE_MAX_ETHPORTS)
150 return RTE_MAX_ETHPORTS;
156 rte_eth_dev_data_alloc(void)
158 const unsigned flags = 0;
159 const struct rte_memzone *mz;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
162 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
164 rte_socket_id(), flags);
166 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
168 rte_panic("Cannot allocate memzone for ethernet port data\n");
170 rte_eth_dev_data = mz->addr;
171 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
172 memset(rte_eth_dev_data, 0,
173 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
177 rte_eth_dev_allocated(const char *name)
181 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
182 if (rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED &&
183 rte_eth_devices[i].device) {
184 if (!strcmp(rte_eth_devices[i].device->name, name))
185 return &rte_eth_devices[i];
192 rte_eth_dev_find_free_port(void)
196 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
197 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
200 return RTE_MAX_ETHPORTS;
203 static struct rte_eth_dev *
204 eth_dev_get(uint16_t port_id)
206 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
208 eth_dev->data = &rte_eth_dev_data[port_id];
209 eth_dev->state = RTE_ETH_DEV_ATTACHED;
210 TAILQ_INIT(&(eth_dev->link_intr_cbs));
212 eth_dev_last_created_port = port_id;
218 rte_eth_dev_allocate(const char *name)
221 struct rte_eth_dev *eth_dev;
223 port_id = rte_eth_dev_find_free_port();
224 if (port_id == RTE_MAX_ETHPORTS) {
225 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
229 if (rte_eth_dev_data == NULL)
230 rte_eth_dev_data_alloc();
232 if (rte_eth_dev_allocated(name) != NULL) {
233 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
238 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
239 eth_dev = eth_dev_get(port_id);
240 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
241 eth_dev->data->port_id = port_id;
242 eth_dev->data->mtu = ETHER_MTU;
248 * Attach to a port already registered by the primary process, which
249 * makes sure that the same device would have the same port id both
250 * in the primary and secondary process.
253 rte_eth_dev_attach_secondary(const char *name)
256 struct rte_eth_dev *eth_dev;
258 if (rte_eth_dev_data == NULL)
259 rte_eth_dev_data_alloc();
261 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
262 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
265 if (i == RTE_MAX_ETHPORTS) {
267 "device %s is not driven by the primary process\n",
272 eth_dev = eth_dev_get(i);
273 RTE_ASSERT(eth_dev->data->port_id == i);
279 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
284 eth_dev->state = RTE_ETH_DEV_UNUSED;
289 rte_eth_dev_is_valid_port(uint16_t port_id)
291 if (port_id >= RTE_MAX_ETHPORTS ||
292 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
293 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
300 rte_eth_dev_socket_id(uint16_t port_id)
302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
303 return rte_eth_devices[port_id].data->numa_node;
307 rte_eth_dev_count(void)
314 RTE_ETH_FOREACH_DEV(p)
321 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
328 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
332 /* shouldn't check 'rte_eth_devices[i].data',
333 * because it might be overwritten by VDEV PMD */
334 tmp = rte_eth_devices[port_id].device->name;
340 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
346 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
350 RTE_ETH_FOREACH_DEV(i) {
351 if (!rte_eth_devices[i].device)
354 ret = strncmp(name, rte_eth_devices[i].device->name,
365 rte_eth_dev_is_detachable(uint16_t port_id)
369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
371 dev_flags = rte_eth_devices[port_id].data->dev_flags;
372 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
373 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
379 /* attach the new device, then store port_id of the device */
381 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
384 int current = rte_eth_dev_count();
388 if ((devargs == NULL) || (port_id == NULL)) {
393 /* parse devargs, then retrieve device name and args */
394 if (rte_eal_parse_devargs_str(devargs, &name, &args))
397 ret = rte_eal_dev_attach(name, args);
401 /* no point looking at the port count if no port exists */
402 if (!rte_eth_dev_count()) {
403 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
408 /* if nothing happened, there is a bug here, since some driver told us
409 * it did attach a device, but did not create a port.
411 if (current == rte_eth_dev_count()) {
416 *port_id = eth_dev_last_created_port;
425 /* detach the device, then store the name of the device */
427 rte_eth_dev_detach(uint16_t port_id, char *name)
436 /* FIXME: move this to eal, once device flags are relocated there */
437 if (rte_eth_dev_is_detachable(port_id))
440 snprintf(name, RTE_DEV_NAME_MAX_LEN, "%s",
441 rte_eth_devices[port_id].device->name);
443 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
447 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
455 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
457 uint16_t old_nb_queues = dev->data->nb_rx_queues;
461 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
462 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
463 sizeof(dev->data->rx_queues[0]) * nb_queues,
464 RTE_CACHE_LINE_SIZE);
465 if (dev->data->rx_queues == NULL) {
466 dev->data->nb_rx_queues = 0;
469 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
472 rxq = dev->data->rx_queues;
474 for (i = nb_queues; i < old_nb_queues; i++)
475 (*dev->dev_ops->rx_queue_release)(rxq[i]);
476 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
477 RTE_CACHE_LINE_SIZE);
480 if (nb_queues > old_nb_queues) {
481 uint16_t new_qs = nb_queues - old_nb_queues;
483 memset(rxq + old_nb_queues, 0,
484 sizeof(rxq[0]) * new_qs);
487 dev->data->rx_queues = rxq;
489 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
492 rxq = dev->data->rx_queues;
494 for (i = nb_queues; i < old_nb_queues; i++)
495 (*dev->dev_ops->rx_queue_release)(rxq[i]);
497 rte_free(dev->data->rx_queues);
498 dev->data->rx_queues = NULL;
500 dev->data->nb_rx_queues = nb_queues;
505 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
507 struct rte_eth_dev *dev;
509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
511 dev = &rte_eth_devices[port_id];
512 if (rx_queue_id >= dev->data->nb_rx_queues) {
513 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
517 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
519 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
520 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
521 " already started\n",
522 rx_queue_id, port_id);
526 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
531 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
533 struct rte_eth_dev *dev;
535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
537 dev = &rte_eth_devices[port_id];
538 if (rx_queue_id >= dev->data->nb_rx_queues) {
539 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
545 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
546 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
547 " already stopped\n",
548 rx_queue_id, port_id);
552 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
557 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
559 struct rte_eth_dev *dev;
561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
563 dev = &rte_eth_devices[port_id];
564 if (tx_queue_id >= dev->data->nb_tx_queues) {
565 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
571 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
572 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
573 " already started\n",
574 tx_queue_id, port_id);
578 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
583 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
585 struct rte_eth_dev *dev;
587 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
589 dev = &rte_eth_devices[port_id];
590 if (tx_queue_id >= dev->data->nb_tx_queues) {
591 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
595 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
597 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
598 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
599 " already stopped\n",
600 tx_queue_id, port_id);
604 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
609 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
611 uint16_t old_nb_queues = dev->data->nb_tx_queues;
615 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
616 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
617 sizeof(dev->data->tx_queues[0]) * nb_queues,
618 RTE_CACHE_LINE_SIZE);
619 if (dev->data->tx_queues == NULL) {
620 dev->data->nb_tx_queues = 0;
623 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
624 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
626 txq = dev->data->tx_queues;
628 for (i = nb_queues; i < old_nb_queues; i++)
629 (*dev->dev_ops->tx_queue_release)(txq[i]);
630 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
631 RTE_CACHE_LINE_SIZE);
634 if (nb_queues > old_nb_queues) {
635 uint16_t new_qs = nb_queues - old_nb_queues;
637 memset(txq + old_nb_queues, 0,
638 sizeof(txq[0]) * new_qs);
641 dev->data->tx_queues = txq;
643 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
646 txq = dev->data->tx_queues;
648 for (i = nb_queues; i < old_nb_queues; i++)
649 (*dev->dev_ops->tx_queue_release)(txq[i]);
651 rte_free(dev->data->tx_queues);
652 dev->data->tx_queues = NULL;
654 dev->data->nb_tx_queues = nb_queues;
659 rte_eth_speed_bitflag(uint32_t speed, int duplex)
662 case ETH_SPEED_NUM_10M:
663 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
664 case ETH_SPEED_NUM_100M:
665 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
666 case ETH_SPEED_NUM_1G:
667 return ETH_LINK_SPEED_1G;
668 case ETH_SPEED_NUM_2_5G:
669 return ETH_LINK_SPEED_2_5G;
670 case ETH_SPEED_NUM_5G:
671 return ETH_LINK_SPEED_5G;
672 case ETH_SPEED_NUM_10G:
673 return ETH_LINK_SPEED_10G;
674 case ETH_SPEED_NUM_20G:
675 return ETH_LINK_SPEED_20G;
676 case ETH_SPEED_NUM_25G:
677 return ETH_LINK_SPEED_25G;
678 case ETH_SPEED_NUM_40G:
679 return ETH_LINK_SPEED_40G;
680 case ETH_SPEED_NUM_50G:
681 return ETH_LINK_SPEED_50G;
682 case ETH_SPEED_NUM_56G:
683 return ETH_LINK_SPEED_56G;
684 case ETH_SPEED_NUM_100G:
685 return ETH_LINK_SPEED_100G;
692 * A conversion function from rxmode bitfield API.
695 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
696 uint64_t *rx_offloads)
698 uint64_t offloads = 0;
700 if (rxmode->header_split == 1)
701 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
702 if (rxmode->hw_ip_checksum == 1)
703 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
704 if (rxmode->hw_vlan_filter == 1)
705 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
706 if (rxmode->hw_vlan_strip == 1)
707 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
708 if (rxmode->hw_vlan_extend == 1)
709 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
710 if (rxmode->jumbo_frame == 1)
711 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
712 if (rxmode->hw_strip_crc == 1)
713 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
714 if (rxmode->enable_scatter == 1)
715 offloads |= DEV_RX_OFFLOAD_SCATTER;
716 if (rxmode->enable_lro == 1)
717 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
719 *rx_offloads = offloads;
723 * A conversion function from rxmode offloads API.
726 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
727 struct rte_eth_rxmode *rxmode)
730 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
731 rxmode->header_split = 1;
733 rxmode->header_split = 0;
734 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
735 rxmode->hw_ip_checksum = 1;
737 rxmode->hw_ip_checksum = 0;
738 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
739 rxmode->hw_vlan_filter = 1;
741 rxmode->hw_vlan_filter = 0;
742 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
743 rxmode->hw_vlan_strip = 1;
745 rxmode->hw_vlan_strip = 0;
746 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
747 rxmode->hw_vlan_extend = 1;
749 rxmode->hw_vlan_extend = 0;
750 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
751 rxmode->jumbo_frame = 1;
753 rxmode->jumbo_frame = 0;
754 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
755 rxmode->hw_strip_crc = 1;
757 rxmode->hw_strip_crc = 0;
758 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
759 rxmode->enable_scatter = 1;
761 rxmode->enable_scatter = 0;
762 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
763 rxmode->enable_lro = 1;
765 rxmode->enable_lro = 0;
769 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
770 const struct rte_eth_conf *dev_conf)
772 struct rte_eth_dev *dev;
773 struct rte_eth_dev_info dev_info;
774 struct rte_eth_conf local_conf = *dev_conf;
777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
779 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
781 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
782 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
786 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
788 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
789 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
793 dev = &rte_eth_devices[port_id];
795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
798 if (dev->data->dev_started) {
800 "port %d must be stopped to allow configuration\n", port_id);
805 * Convert between the offloads API to enable PMDs to support
808 if ((dev_conf->rxmode.ignore_offload_bitfield == 0)) {
809 rte_eth_convert_rx_offload_bitfield(
810 &dev_conf->rxmode, &local_conf.rxmode.offloads);
812 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
816 /* Copy the dev_conf parameter into the dev structure */
817 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
820 * Check that the numbers of RX and TX queues are not greater
821 * than the maximum number of RX and TX queues supported by the
824 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
826 if (nb_rx_q == 0 && nb_tx_q == 0) {
827 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
831 if (nb_rx_q > dev_info.max_rx_queues) {
832 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
833 port_id, nb_rx_q, dev_info.max_rx_queues);
837 if (nb_tx_q > dev_info.max_tx_queues) {
838 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
839 port_id, nb_tx_q, dev_info.max_tx_queues);
843 /* Check that the device supports requested interrupts */
844 if ((dev_conf->intr_conf.lsc == 1) &&
845 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
846 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
847 dev->device->driver->name);
850 if ((dev_conf->intr_conf.rmv == 1) &&
851 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
852 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
853 dev->device->driver->name);
858 * If jumbo frames are enabled, check that the maximum RX packet
859 * length is supported by the configured device.
861 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
862 if (dev_conf->rxmode.max_rx_pkt_len >
863 dev_info.max_rx_pktlen) {
864 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
865 " > max valid value %u\n",
867 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
868 (unsigned)dev_info.max_rx_pktlen);
870 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
871 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
872 " < min valid value %u\n",
874 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
875 (unsigned)ETHER_MIN_LEN);
879 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
880 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
881 /* Use default value */
882 dev->data->dev_conf.rxmode.max_rx_pkt_len =
887 * Setup new number of RX/TX queues and reconfigure device.
889 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
891 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
896 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
898 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
900 rte_eth_dev_rx_queue_config(dev, 0);
904 diag = (*dev->dev_ops->dev_configure)(dev);
906 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
908 rte_eth_dev_rx_queue_config(dev, 0);
909 rte_eth_dev_tx_queue_config(dev, 0);
913 /* Initialize Rx profiling if enabled at compilation time. */
914 diag = __rte_eth_profile_rx_init(port_id, dev);
916 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
918 rte_eth_dev_rx_queue_config(dev, 0);
919 rte_eth_dev_tx_queue_config(dev, 0);
927 _rte_eth_dev_reset(struct rte_eth_dev *dev)
929 if (dev->data->dev_started) {
931 "port %d must be stopped to allow reset\n",
936 rte_eth_dev_rx_queue_config(dev, 0);
937 rte_eth_dev_tx_queue_config(dev, 0);
939 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
943 rte_eth_dev_config_restore(uint16_t port_id)
945 struct rte_eth_dev *dev;
946 struct rte_eth_dev_info dev_info;
947 struct ether_addr *addr;
952 dev = &rte_eth_devices[port_id];
954 rte_eth_dev_info_get(port_id, &dev_info);
956 /* replay MAC address configuration including default MAC */
957 addr = &dev->data->mac_addrs[0];
958 if (*dev->dev_ops->mac_addr_set != NULL)
959 (*dev->dev_ops->mac_addr_set)(dev, addr);
960 else if (*dev->dev_ops->mac_addr_add != NULL)
961 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
963 if (*dev->dev_ops->mac_addr_add != NULL) {
964 for (i = 1; i < dev_info.max_mac_addrs; i++) {
965 addr = &dev->data->mac_addrs[i];
967 /* skip zero address */
968 if (is_zero_ether_addr(addr))
972 pool_mask = dev->data->mac_pool_sel[i];
975 if (pool_mask & 1ULL)
976 (*dev->dev_ops->mac_addr_add)(dev,
984 /* replay promiscuous configuration */
985 if (rte_eth_promiscuous_get(port_id) == 1)
986 rte_eth_promiscuous_enable(port_id);
987 else if (rte_eth_promiscuous_get(port_id) == 0)
988 rte_eth_promiscuous_disable(port_id);
990 /* replay all multicast configuration */
991 if (rte_eth_allmulticast_get(port_id) == 1)
992 rte_eth_allmulticast_enable(port_id);
993 else if (rte_eth_allmulticast_get(port_id) == 0)
994 rte_eth_allmulticast_disable(port_id);
998 rte_eth_dev_start(uint16_t port_id)
1000 struct rte_eth_dev *dev;
1003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1005 dev = &rte_eth_devices[port_id];
1007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1009 if (dev->data->dev_started != 0) {
1010 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1011 " already started\n",
1016 diag = (*dev->dev_ops->dev_start)(dev);
1018 dev->data->dev_started = 1;
1022 rte_eth_dev_config_restore(port_id);
1024 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1026 (*dev->dev_ops->link_update)(dev, 0);
1032 rte_eth_dev_stop(uint16_t port_id)
1034 struct rte_eth_dev *dev;
1036 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1037 dev = &rte_eth_devices[port_id];
1039 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1041 if (dev->data->dev_started == 0) {
1042 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1043 " already stopped\n",
1048 dev->data->dev_started = 0;
1049 (*dev->dev_ops->dev_stop)(dev);
1053 rte_eth_dev_set_link_up(uint16_t port_id)
1055 struct rte_eth_dev *dev;
1057 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1059 dev = &rte_eth_devices[port_id];
1061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1062 return (*dev->dev_ops->dev_set_link_up)(dev);
1066 rte_eth_dev_set_link_down(uint16_t port_id)
1068 struct rte_eth_dev *dev;
1070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1072 dev = &rte_eth_devices[port_id];
1074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1075 return (*dev->dev_ops->dev_set_link_down)(dev);
1079 rte_eth_dev_close(uint16_t port_id)
1081 struct rte_eth_dev *dev;
1083 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1084 dev = &rte_eth_devices[port_id];
1086 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1087 dev->data->dev_started = 0;
1088 (*dev->dev_ops->dev_close)(dev);
1090 dev->data->nb_rx_queues = 0;
1091 rte_free(dev->data->rx_queues);
1092 dev->data->rx_queues = NULL;
1093 dev->data->nb_tx_queues = 0;
1094 rte_free(dev->data->tx_queues);
1095 dev->data->tx_queues = NULL;
1099 rte_eth_dev_reset(uint16_t port_id)
1101 struct rte_eth_dev *dev;
1104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1105 dev = &rte_eth_devices[port_id];
1107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1109 rte_eth_dev_stop(port_id);
1110 ret = dev->dev_ops->dev_reset(dev);
1116 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1117 uint16_t nb_rx_desc, unsigned int socket_id,
1118 const struct rte_eth_rxconf *rx_conf,
1119 struct rte_mempool *mp)
1122 uint32_t mbp_buf_size;
1123 struct rte_eth_dev *dev;
1124 struct rte_eth_dev_info dev_info;
1125 struct rte_eth_rxconf local_conf;
1128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1130 dev = &rte_eth_devices[port_id];
1131 if (rx_queue_id >= dev->data->nb_rx_queues) {
1132 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1136 if (dev->data->dev_started) {
1137 RTE_PMD_DEBUG_TRACE(
1138 "port %d must be stopped to allow configuration\n", port_id);
1142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1146 * Check the size of the mbuf data buffer.
1147 * This value must be provided in the private data of the memory pool.
1148 * First check that the memory pool has a valid private data.
1150 rte_eth_dev_info_get(port_id, &dev_info);
1151 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1152 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1153 mp->name, (int) mp->private_data_size,
1154 (int) sizeof(struct rte_pktmbuf_pool_private));
1157 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1159 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1160 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1161 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1165 (int)(RTE_PKTMBUF_HEADROOM +
1166 dev_info.min_rx_bufsize),
1167 (int)RTE_PKTMBUF_HEADROOM,
1168 (int)dev_info.min_rx_bufsize);
1172 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1173 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1174 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1176 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1177 "should be: <= %hu, = %hu, and a product of %hu\n",
1179 dev_info.rx_desc_lim.nb_max,
1180 dev_info.rx_desc_lim.nb_min,
1181 dev_info.rx_desc_lim.nb_align);
1185 rxq = dev->data->rx_queues;
1186 if (rxq[rx_queue_id]) {
1187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1189 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1190 rxq[rx_queue_id] = NULL;
1193 if (rx_conf == NULL)
1194 rx_conf = &dev_info.default_rxconf;
1196 local_conf = *rx_conf;
1197 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1199 * Reflect port offloads to queue offloads in order for
1200 * offloads to not be discarded.
1202 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1203 &local_conf.offloads);
1206 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1207 socket_id, &local_conf, mp);
1209 if (!dev->data->min_rx_buf_size ||
1210 dev->data->min_rx_buf_size > mbp_buf_size)
1211 dev->data->min_rx_buf_size = mbp_buf_size;
1218 * A conversion function from txq_flags API.
1221 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1223 uint64_t offloads = 0;
1225 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1226 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1227 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1228 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1229 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1230 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1231 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1232 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1233 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1234 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1235 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1236 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1237 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1239 *tx_offloads = offloads;
1243 * A conversion function from offloads API.
1246 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1250 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1251 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1252 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1253 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1254 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1255 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1256 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1257 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1258 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1259 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1260 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1261 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1267 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1268 uint16_t nb_tx_desc, unsigned int socket_id,
1269 const struct rte_eth_txconf *tx_conf)
1271 struct rte_eth_dev *dev;
1272 struct rte_eth_dev_info dev_info;
1273 struct rte_eth_txconf local_conf;
1276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1278 dev = &rte_eth_devices[port_id];
1279 if (tx_queue_id >= dev->data->nb_tx_queues) {
1280 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1284 if (dev->data->dev_started) {
1285 RTE_PMD_DEBUG_TRACE(
1286 "port %d must be stopped to allow configuration\n", port_id);
1290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1293 rte_eth_dev_info_get(port_id, &dev_info);
1295 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1296 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1297 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1298 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1299 "should be: <= %hu, = %hu, and a product of %hu\n",
1301 dev_info.tx_desc_lim.nb_max,
1302 dev_info.tx_desc_lim.nb_min,
1303 dev_info.tx_desc_lim.nb_align);
1307 txq = dev->data->tx_queues;
1308 if (txq[tx_queue_id]) {
1309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1311 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1312 txq[tx_queue_id] = NULL;
1315 if (tx_conf == NULL)
1316 tx_conf = &dev_info.default_txconf;
1319 * Convert between the offloads API to enable PMDs to support
1322 local_conf = *tx_conf;
1323 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1324 rte_eth_convert_txq_offloads(tx_conf->offloads,
1325 &local_conf.txq_flags);
1326 /* Keep the ignore flag. */
1327 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1329 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1330 &local_conf.offloads);
1333 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1334 socket_id, &local_conf);
1338 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1339 void *userdata __rte_unused)
1343 for (i = 0; i < unsent; i++)
1344 rte_pktmbuf_free(pkts[i]);
1348 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1351 uint64_t *count = userdata;
1354 for (i = 0; i < unsent; i++)
1355 rte_pktmbuf_free(pkts[i]);
1361 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1362 buffer_tx_error_fn cbfn, void *userdata)
1364 buffer->error_callback = cbfn;
1365 buffer->error_userdata = userdata;
1370 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1377 buffer->size = size;
1378 if (buffer->error_callback == NULL) {
1379 ret = rte_eth_tx_buffer_set_err_callback(
1380 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1387 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1389 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1391 /* Validate Input Data. Bail if not valid or not supported. */
1392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1393 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1395 /* Call driver to free pending mbufs. */
1396 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1401 rte_eth_promiscuous_enable(uint16_t port_id)
1403 struct rte_eth_dev *dev;
1405 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1406 dev = &rte_eth_devices[port_id];
1408 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1409 (*dev->dev_ops->promiscuous_enable)(dev);
1410 dev->data->promiscuous = 1;
1414 rte_eth_promiscuous_disable(uint16_t port_id)
1416 struct rte_eth_dev *dev;
1418 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1419 dev = &rte_eth_devices[port_id];
1421 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1422 dev->data->promiscuous = 0;
1423 (*dev->dev_ops->promiscuous_disable)(dev);
1427 rte_eth_promiscuous_get(uint16_t port_id)
1429 struct rte_eth_dev *dev;
1431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1433 dev = &rte_eth_devices[port_id];
1434 return dev->data->promiscuous;
1438 rte_eth_allmulticast_enable(uint16_t port_id)
1440 struct rte_eth_dev *dev;
1442 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1443 dev = &rte_eth_devices[port_id];
1445 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1446 (*dev->dev_ops->allmulticast_enable)(dev);
1447 dev->data->all_multicast = 1;
1451 rte_eth_allmulticast_disable(uint16_t port_id)
1453 struct rte_eth_dev *dev;
1455 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1456 dev = &rte_eth_devices[port_id];
1458 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1459 dev->data->all_multicast = 0;
1460 (*dev->dev_ops->allmulticast_disable)(dev);
1464 rte_eth_allmulticast_get(uint16_t port_id)
1466 struct rte_eth_dev *dev;
1468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1470 dev = &rte_eth_devices[port_id];
1471 return dev->data->all_multicast;
1475 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1476 struct rte_eth_link *link)
1478 struct rte_eth_link *dst = link;
1479 struct rte_eth_link *src = &(dev->data->dev_link);
1481 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1482 *(uint64_t *)src) == 0)
1489 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1491 struct rte_eth_dev *dev;
1493 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1494 dev = &rte_eth_devices[port_id];
1496 if (dev->data->dev_conf.intr_conf.lsc != 0)
1497 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1499 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1500 (*dev->dev_ops->link_update)(dev, 1);
1501 *eth_link = dev->data->dev_link;
1506 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1508 struct rte_eth_dev *dev;
1510 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1511 dev = &rte_eth_devices[port_id];
1513 if (dev->data->dev_conf.intr_conf.lsc != 0)
1514 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1516 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1517 (*dev->dev_ops->link_update)(dev, 0);
1518 *eth_link = dev->data->dev_link;
1523 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1525 struct rte_eth_dev *dev;
1527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1529 dev = &rte_eth_devices[port_id];
1530 memset(stats, 0, sizeof(*stats));
1532 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1533 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1534 (*dev->dev_ops->stats_get)(dev, stats);
1539 rte_eth_stats_reset(uint16_t port_id)
1541 struct rte_eth_dev *dev;
1543 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1544 dev = &rte_eth_devices[port_id];
1546 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1547 (*dev->dev_ops->stats_reset)(dev);
1548 dev->data->rx_mbuf_alloc_failed = 0;
1552 get_xstats_count(uint16_t port_id)
1554 struct rte_eth_dev *dev;
1557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1558 dev = &rte_eth_devices[port_id];
1559 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1560 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1565 if (dev->dev_ops->xstats_get_names != NULL) {
1566 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1572 count += RTE_NB_STATS;
1573 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1575 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1581 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1584 int cnt_xstats, idx_xstat;
1586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1589 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1594 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1599 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1600 if (cnt_xstats < 0) {
1601 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1605 /* Get id-name lookup table */
1606 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1608 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1609 port_id, xstats_names, cnt_xstats, NULL)) {
1610 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1614 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1615 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1625 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1626 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1629 /* Get all xstats */
1631 struct rte_eth_dev *dev;
1632 int cnt_used_entries;
1633 int cnt_expected_entries;
1634 int cnt_driver_entries;
1635 uint32_t idx, id_queue;
1638 cnt_expected_entries = get_xstats_count(port_id);
1639 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1640 (int)size < cnt_expected_entries)
1641 return cnt_expected_entries;
1643 /* port_id checked in get_xstats_count() */
1644 dev = &rte_eth_devices[port_id];
1645 cnt_used_entries = 0;
1647 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1648 snprintf(xstats_names[cnt_used_entries].name,
1649 sizeof(xstats_names[0].name),
1650 "%s", rte_stats_strings[idx].name);
1653 num_q = RTE_MIN(dev->data->nb_rx_queues,
1654 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1655 for (id_queue = 0; id_queue < num_q; id_queue++) {
1656 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1657 snprintf(xstats_names[cnt_used_entries].name,
1658 sizeof(xstats_names[0].name),
1661 rte_rxq_stats_strings[idx].name);
1666 num_q = RTE_MIN(dev->data->nb_tx_queues,
1667 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1668 for (id_queue = 0; id_queue < num_q; id_queue++) {
1669 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1670 snprintf(xstats_names[cnt_used_entries].name,
1671 sizeof(xstats_names[0].name),
1674 rte_txq_stats_strings[idx].name);
1679 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1680 /* If there are any driver-specific xstats, append them
1683 cnt_driver_entries =
1684 (*dev->dev_ops->xstats_get_names_by_id)(
1686 xstats_names + cnt_used_entries,
1688 size - cnt_used_entries);
1689 if (cnt_driver_entries < 0)
1690 return cnt_driver_entries;
1691 cnt_used_entries += cnt_driver_entries;
1693 } else if (dev->dev_ops->xstats_get_names != NULL) {
1694 /* If there are any driver-specific xstats, append them
1697 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1699 xstats_names + cnt_used_entries,
1700 size - cnt_used_entries);
1701 if (cnt_driver_entries < 0)
1702 return cnt_driver_entries;
1703 cnt_used_entries += cnt_driver_entries;
1706 return cnt_used_entries;
1708 /* Get only xstats given by IDS */
1711 struct rte_eth_xstat_name *xstats_names_copy;
1713 len = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1716 malloc(sizeof(struct rte_eth_xstat_name) * len);
1717 if (!xstats_names_copy) {
1718 RTE_PMD_DEBUG_TRACE(
1719 "ERROR: can't allocate memory for values_copy\n");
1720 free(xstats_names_copy);
1724 rte_eth_xstats_get_names_by_id(port_id, xstats_names_copy,
1727 for (i = 0; i < size; i++) {
1728 if (ids[i] >= len) {
1729 RTE_PMD_DEBUG_TRACE(
1730 "ERROR: id value isn't valid\n");
1733 strcpy(xstats_names[i].name,
1734 xstats_names_copy[ids[i]].name);
1736 free(xstats_names_copy);
1742 rte_eth_xstats_get_names(uint16_t port_id,
1743 struct rte_eth_xstat_name *xstats_names,
1746 struct rte_eth_dev *dev;
1747 int cnt_used_entries;
1748 int cnt_expected_entries;
1749 int cnt_driver_entries;
1750 uint32_t idx, id_queue;
1753 cnt_expected_entries = get_xstats_count(port_id);
1754 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1755 (int)size < cnt_expected_entries)
1756 return cnt_expected_entries;
1758 /* port_id checked in get_xstats_count() */
1759 dev = &rte_eth_devices[port_id];
1760 cnt_used_entries = 0;
1762 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1763 snprintf(xstats_names[cnt_used_entries].name,
1764 sizeof(xstats_names[0].name),
1765 "%s", rte_stats_strings[idx].name);
1768 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1769 for (id_queue = 0; id_queue < num_q; id_queue++) {
1770 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1771 snprintf(xstats_names[cnt_used_entries].name,
1772 sizeof(xstats_names[0].name),
1774 id_queue, rte_rxq_stats_strings[idx].name);
1779 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1780 for (id_queue = 0; id_queue < num_q; id_queue++) {
1781 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1782 snprintf(xstats_names[cnt_used_entries].name,
1783 sizeof(xstats_names[0].name),
1785 id_queue, rte_txq_stats_strings[idx].name);
1790 if (dev->dev_ops->xstats_get_names != NULL) {
1791 /* If there are any driver-specific xstats, append them
1794 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1796 xstats_names + cnt_used_entries,
1797 size - cnt_used_entries);
1798 if (cnt_driver_entries < 0)
1799 return cnt_driver_entries;
1800 cnt_used_entries += cnt_driver_entries;
1803 return cnt_used_entries;
1806 /* retrieve ethdev extended statistics */
1808 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1809 uint64_t *values, unsigned int n)
1811 /* If need all xstats */
1813 struct rte_eth_stats eth_stats;
1814 struct rte_eth_dev *dev;
1815 unsigned int count = 0, i, q;
1816 signed int xcount = 0;
1817 uint64_t val, *stats_ptr;
1818 uint16_t nb_rxqs, nb_txqs;
1820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1821 dev = &rte_eth_devices[port_id];
1823 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1824 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1825 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1826 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1828 /* Return generic statistics */
1829 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1830 (nb_txqs * RTE_NB_TXQ_STATS);
1833 /* implemented by the driver */
1834 if (dev->dev_ops->xstats_get_by_id != NULL) {
1835 /* Retrieve the xstats from the driver at the end of the
1836 * xstats struct. Retrieve all xstats.
1838 xcount = (*dev->dev_ops->xstats_get_by_id)(dev,
1840 values ? values + count : NULL,
1841 (n > count) ? n - count : 0);
1845 /* implemented by the driver */
1846 } else if (dev->dev_ops->xstats_get != NULL) {
1847 /* Retrieve the xstats from the driver at the end of the
1848 * xstats struct. Retrieve all xstats.
1849 * Compatibility for PMD without xstats_get_by_ids
1851 unsigned int size = (n > count) ? n - count : 1;
1852 struct rte_eth_xstat xstats[size];
1854 xcount = (*dev->dev_ops->xstats_get)(dev,
1855 values ? xstats : NULL, size);
1861 for (i = 0 ; i < (unsigned int)xcount; i++)
1862 values[i + count] = xstats[i].value;
1865 if (n < count + xcount || values == NULL)
1866 return count + xcount;
1868 /* now fill the xstats structure */
1870 rte_eth_stats_get(port_id, ð_stats);
1873 for (i = 0; i < RTE_NB_STATS; i++) {
1874 stats_ptr = RTE_PTR_ADD(ð_stats,
1875 rte_stats_strings[i].offset);
1877 values[count++] = val;
1881 for (q = 0; q < nb_rxqs; q++) {
1882 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1883 stats_ptr = RTE_PTR_ADD(ð_stats,
1884 rte_rxq_stats_strings[i].offset +
1885 q * sizeof(uint64_t));
1887 values[count++] = val;
1892 for (q = 0; q < nb_txqs; q++) {
1893 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1894 stats_ptr = RTE_PTR_ADD(ð_stats,
1895 rte_txq_stats_strings[i].offset +
1896 q * sizeof(uint64_t));
1898 values[count++] = val;
1902 return count + xcount;
1904 /* Need only xstats given by IDS array */
1907 uint64_t *values_copy;
1909 size = rte_eth_xstats_get_by_id(port_id, NULL, NULL, 0);
1911 values_copy = malloc(sizeof(*values_copy) * size);
1913 RTE_PMD_DEBUG_TRACE(
1914 "ERROR: can't allocate memory for values_copy\n");
1918 rte_eth_xstats_get_by_id(port_id, NULL, values_copy, size);
1920 for (i = 0; i < n; i++) {
1921 if (ids[i] >= size) {
1922 RTE_PMD_DEBUG_TRACE(
1923 "ERROR: id value isn't valid\n");
1926 values[i] = values_copy[ids[i]];
1934 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1937 struct rte_eth_stats eth_stats;
1938 struct rte_eth_dev *dev;
1939 unsigned int count = 0, i, q;
1940 signed int xcount = 0;
1941 uint64_t val, *stats_ptr;
1942 uint16_t nb_rxqs, nb_txqs;
1944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1946 dev = &rte_eth_devices[port_id];
1948 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1949 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1951 /* Return generic statistics */
1952 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1953 (nb_txqs * RTE_NB_TXQ_STATS);
1955 /* implemented by the driver */
1956 if (dev->dev_ops->xstats_get != NULL) {
1957 /* Retrieve the xstats from the driver at the end of the
1960 xcount = (*dev->dev_ops->xstats_get)(dev,
1961 xstats ? xstats + count : NULL,
1962 (n > count) ? n - count : 0);
1968 if (n < count + xcount || xstats == NULL)
1969 return count + xcount;
1971 /* now fill the xstats structure */
1973 rte_eth_stats_get(port_id, ð_stats);
1976 for (i = 0; i < RTE_NB_STATS; i++) {
1977 stats_ptr = RTE_PTR_ADD(ð_stats,
1978 rte_stats_strings[i].offset);
1980 xstats[count++].value = val;
1984 for (q = 0; q < nb_rxqs; q++) {
1985 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1986 stats_ptr = RTE_PTR_ADD(ð_stats,
1987 rte_rxq_stats_strings[i].offset +
1988 q * sizeof(uint64_t));
1990 xstats[count++].value = val;
1995 for (q = 0; q < nb_txqs; q++) {
1996 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1997 stats_ptr = RTE_PTR_ADD(ð_stats,
1998 rte_txq_stats_strings[i].offset +
1999 q * sizeof(uint64_t));
2001 xstats[count++].value = val;
2005 for (i = 0; i < count; i++)
2007 /* add an offset to driver-specific stats */
2008 for ( ; i < count + xcount; i++)
2009 xstats[i].id += count;
2011 return count + xcount;
2014 /* reset ethdev extended statistics */
2016 rte_eth_xstats_reset(uint16_t port_id)
2018 struct rte_eth_dev *dev;
2020 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2021 dev = &rte_eth_devices[port_id];
2023 /* implemented by the driver */
2024 if (dev->dev_ops->xstats_reset != NULL) {
2025 (*dev->dev_ops->xstats_reset)(dev);
2029 /* fallback to default */
2030 rte_eth_stats_reset(port_id);
2034 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2037 struct rte_eth_dev *dev;
2039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2041 dev = &rte_eth_devices[port_id];
2043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2044 return (*dev->dev_ops->queue_stats_mapping_set)
2045 (dev, queue_id, stat_idx, is_rx);
2050 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2053 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2059 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2062 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2067 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2069 struct rte_eth_dev *dev;
2071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2072 dev = &rte_eth_devices[port_id];
2074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2075 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2079 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2081 struct rte_eth_dev *dev;
2082 const struct rte_eth_desc_lim lim = {
2083 .nb_max = UINT16_MAX,
2088 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2089 dev = &rte_eth_devices[port_id];
2091 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2092 dev_info->rx_desc_lim = lim;
2093 dev_info->tx_desc_lim = lim;
2095 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2096 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2097 dev_info->driver_name = dev->device->driver->name;
2098 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2099 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2103 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2104 uint32_t *ptypes, int num)
2107 struct rte_eth_dev *dev;
2108 const uint32_t *all_ptypes;
2110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2111 dev = &rte_eth_devices[port_id];
2112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2113 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2118 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2119 if (all_ptypes[i] & ptype_mask) {
2121 ptypes[j] = all_ptypes[i];
2129 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2131 struct rte_eth_dev *dev;
2133 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2134 dev = &rte_eth_devices[port_id];
2135 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2140 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2142 struct rte_eth_dev *dev;
2144 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2146 dev = &rte_eth_devices[port_id];
2147 *mtu = dev->data->mtu;
2152 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2155 struct rte_eth_dev *dev;
2157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2158 dev = &rte_eth_devices[port_id];
2159 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2161 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2163 dev->data->mtu = mtu;
2169 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2171 struct rte_eth_dev *dev;
2174 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2175 dev = &rte_eth_devices[port_id];
2176 if (!(dev->data->dev_conf.rxmode.offloads &
2177 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2178 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2182 if (vlan_id > 4095) {
2183 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2184 port_id, (unsigned) vlan_id);
2187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2189 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2191 struct rte_vlan_filter_conf *vfc;
2195 vfc = &dev->data->vlan_filter_conf;
2196 vidx = vlan_id / 64;
2197 vbit = vlan_id % 64;
2200 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2202 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2209 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2212 struct rte_eth_dev *dev;
2214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2215 dev = &rte_eth_devices[port_id];
2216 if (rx_queue_id >= dev->data->nb_rx_queues) {
2217 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2222 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2228 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2229 enum rte_vlan_type vlan_type,
2232 struct rte_eth_dev *dev;
2234 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2235 dev = &rte_eth_devices[port_id];
2236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2238 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2242 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2244 struct rte_eth_dev *dev;
2249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2250 dev = &rte_eth_devices[port_id];
2252 /*check which option changed by application*/
2253 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2254 org = !!(dev->data->dev_conf.rxmode.offloads &
2255 DEV_RX_OFFLOAD_VLAN_STRIP);
2258 dev->data->dev_conf.rxmode.offloads |=
2259 DEV_RX_OFFLOAD_VLAN_STRIP;
2261 dev->data->dev_conf.rxmode.offloads &=
2262 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2263 mask |= ETH_VLAN_STRIP_MASK;
2266 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2267 org = !!(dev->data->dev_conf.rxmode.offloads &
2268 DEV_RX_OFFLOAD_VLAN_FILTER);
2271 dev->data->dev_conf.rxmode.offloads |=
2272 DEV_RX_OFFLOAD_VLAN_FILTER;
2274 dev->data->dev_conf.rxmode.offloads &=
2275 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2276 mask |= ETH_VLAN_FILTER_MASK;
2279 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2280 org = !!(dev->data->dev_conf.rxmode.offloads &
2281 DEV_RX_OFFLOAD_VLAN_EXTEND);
2284 dev->data->dev_conf.rxmode.offloads |=
2285 DEV_RX_OFFLOAD_VLAN_EXTEND;
2287 dev->data->dev_conf.rxmode.offloads &=
2288 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2289 mask |= ETH_VLAN_EXTEND_MASK;
2296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2299 * Convert to the offload bitfield API just in case the underlying PMD
2300 * still supporting it.
2302 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2303 &dev->data->dev_conf.rxmode);
2304 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2310 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2312 struct rte_eth_dev *dev;
2315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2316 dev = &rte_eth_devices[port_id];
2318 if (dev->data->dev_conf.rxmode.offloads &
2319 DEV_RX_OFFLOAD_VLAN_STRIP)
2320 ret |= ETH_VLAN_STRIP_OFFLOAD;
2322 if (dev->data->dev_conf.rxmode.offloads &
2323 DEV_RX_OFFLOAD_VLAN_FILTER)
2324 ret |= ETH_VLAN_FILTER_OFFLOAD;
2326 if (dev->data->dev_conf.rxmode.offloads &
2327 DEV_RX_OFFLOAD_VLAN_EXTEND)
2328 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2334 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2336 struct rte_eth_dev *dev;
2338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2339 dev = &rte_eth_devices[port_id];
2340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2341 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2347 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2349 struct rte_eth_dev *dev;
2351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2352 dev = &rte_eth_devices[port_id];
2353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2354 memset(fc_conf, 0, sizeof(*fc_conf));
2355 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2359 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2361 struct rte_eth_dev *dev;
2363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2364 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2365 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2369 dev = &rte_eth_devices[port_id];
2370 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2371 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2375 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2376 struct rte_eth_pfc_conf *pfc_conf)
2378 struct rte_eth_dev *dev;
2380 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2381 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2382 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2386 dev = &rte_eth_devices[port_id];
2387 /* High water, low water validation are device specific */
2388 if (*dev->dev_ops->priority_flow_ctrl_set)
2389 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2394 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2402 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2403 for (i = 0; i < num; i++) {
2404 if (reta_conf[i].mask)
2412 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2416 uint16_t i, idx, shift;
2422 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2426 for (i = 0; i < reta_size; i++) {
2427 idx = i / RTE_RETA_GROUP_SIZE;
2428 shift = i % RTE_RETA_GROUP_SIZE;
2429 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2430 (reta_conf[idx].reta[shift] >= max_rxq)) {
2431 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2432 "the maximum rxq index: %u\n", idx, shift,
2433 reta_conf[idx].reta[shift], max_rxq);
2442 rte_eth_dev_rss_reta_update(uint16_t port_id,
2443 struct rte_eth_rss_reta_entry64 *reta_conf,
2446 struct rte_eth_dev *dev;
2449 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2450 /* Check mask bits */
2451 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2455 dev = &rte_eth_devices[port_id];
2457 /* Check entry value */
2458 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2459 dev->data->nb_rx_queues);
2463 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2464 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2468 rte_eth_dev_rss_reta_query(uint16_t port_id,
2469 struct rte_eth_rss_reta_entry64 *reta_conf,
2472 struct rte_eth_dev *dev;
2475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2477 /* Check mask bits */
2478 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2482 dev = &rte_eth_devices[port_id];
2483 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2484 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2488 rte_eth_dev_rss_hash_update(uint16_t port_id,
2489 struct rte_eth_rss_conf *rss_conf)
2491 struct rte_eth_dev *dev;
2493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2494 dev = &rte_eth_devices[port_id];
2495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2496 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2500 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2501 struct rte_eth_rss_conf *rss_conf)
2503 struct rte_eth_dev *dev;
2505 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2506 dev = &rte_eth_devices[port_id];
2507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2508 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2512 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2513 struct rte_eth_udp_tunnel *udp_tunnel)
2515 struct rte_eth_dev *dev;
2517 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2518 if (udp_tunnel == NULL) {
2519 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2523 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2524 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2528 dev = &rte_eth_devices[port_id];
2529 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2530 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2534 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2535 struct rte_eth_udp_tunnel *udp_tunnel)
2537 struct rte_eth_dev *dev;
2539 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2540 dev = &rte_eth_devices[port_id];
2542 if (udp_tunnel == NULL) {
2543 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2547 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2548 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2553 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2557 rte_eth_led_on(uint16_t port_id)
2559 struct rte_eth_dev *dev;
2561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2562 dev = &rte_eth_devices[port_id];
2563 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2564 return (*dev->dev_ops->dev_led_on)(dev);
2568 rte_eth_led_off(uint16_t port_id)
2570 struct rte_eth_dev *dev;
2572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2573 dev = &rte_eth_devices[port_id];
2574 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2575 return (*dev->dev_ops->dev_led_off)(dev);
2579 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2583 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2585 struct rte_eth_dev_info dev_info;
2586 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2589 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2590 rte_eth_dev_info_get(port_id, &dev_info);
2592 for (i = 0; i < dev_info.max_mac_addrs; i++)
2593 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2599 static const struct ether_addr null_mac_addr;
2602 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2605 struct rte_eth_dev *dev;
2610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2611 dev = &rte_eth_devices[port_id];
2612 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2614 if (is_zero_ether_addr(addr)) {
2615 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2619 if (pool >= ETH_64_POOLS) {
2620 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2624 index = get_mac_addr_index(port_id, addr);
2626 index = get_mac_addr_index(port_id, &null_mac_addr);
2628 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2633 pool_mask = dev->data->mac_pool_sel[index];
2635 /* Check if both MAC address and pool is already there, and do nothing */
2636 if (pool_mask & (1ULL << pool))
2641 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2644 /* Update address in NIC data structure */
2645 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2647 /* Update pool bitmap in NIC data structure */
2648 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2655 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2657 struct rte_eth_dev *dev;
2660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2661 dev = &rte_eth_devices[port_id];
2662 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2664 index = get_mac_addr_index(port_id, addr);
2666 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2668 } else if (index < 0)
2669 return 0; /* Do nothing if address wasn't found */
2672 (*dev->dev_ops->mac_addr_remove)(dev, index);
2674 /* Update address in NIC data structure */
2675 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2677 /* reset pool bitmap */
2678 dev->data->mac_pool_sel[index] = 0;
2684 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2686 struct rte_eth_dev *dev;
2688 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2690 if (!is_valid_assigned_ether_addr(addr))
2693 dev = &rte_eth_devices[port_id];
2694 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2696 /* Update default address in NIC data structure */
2697 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2699 (*dev->dev_ops->mac_addr_set)(dev, addr);
2706 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2710 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2712 struct rte_eth_dev_info dev_info;
2713 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2716 rte_eth_dev_info_get(port_id, &dev_info);
2717 if (!dev->data->hash_mac_addrs)
2720 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2721 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2722 ETHER_ADDR_LEN) == 0)
2729 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2734 struct rte_eth_dev *dev;
2736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2738 dev = &rte_eth_devices[port_id];
2739 if (is_zero_ether_addr(addr)) {
2740 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2745 index = get_hash_mac_addr_index(port_id, addr);
2746 /* Check if it's already there, and do nothing */
2747 if ((index >= 0) && (on))
2752 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2753 "set in UTA\n", port_id);
2757 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2759 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2765 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2766 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2768 /* Update address in NIC data structure */
2770 ether_addr_copy(addr,
2771 &dev->data->hash_mac_addrs[index]);
2773 ether_addr_copy(&null_mac_addr,
2774 &dev->data->hash_mac_addrs[index]);
2781 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2783 struct rte_eth_dev *dev;
2785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2787 dev = &rte_eth_devices[port_id];
2789 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2790 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2793 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2796 struct rte_eth_dev *dev;
2797 struct rte_eth_dev_info dev_info;
2798 struct rte_eth_link link;
2800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2802 dev = &rte_eth_devices[port_id];
2803 rte_eth_dev_info_get(port_id, &dev_info);
2804 link = dev->data->dev_link;
2806 if (queue_idx > dev_info.max_tx_queues) {
2807 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2808 "invalid queue id=%d\n", port_id, queue_idx);
2812 if (tx_rate > link.link_speed) {
2813 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2814 "bigger than link speed= %d\n",
2815 tx_rate, link.link_speed);
2819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2820 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2824 rte_eth_mirror_rule_set(uint16_t port_id,
2825 struct rte_eth_mirror_conf *mirror_conf,
2826 uint8_t rule_id, uint8_t on)
2828 struct rte_eth_dev *dev;
2830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2831 if (mirror_conf->rule_type == 0) {
2832 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2836 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2837 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2842 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2843 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2844 (mirror_conf->pool_mask == 0)) {
2845 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2849 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2850 mirror_conf->vlan.vlan_mask == 0) {
2851 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2855 dev = &rte_eth_devices[port_id];
2856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2858 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2862 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2864 struct rte_eth_dev *dev;
2866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2868 dev = &rte_eth_devices[port_id];
2869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2871 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2875 rte_eth_dev_callback_register(uint16_t port_id,
2876 enum rte_eth_event_type event,
2877 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2879 struct rte_eth_dev *dev;
2880 struct rte_eth_dev_callback *user_cb;
2885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2887 dev = &rte_eth_devices[port_id];
2888 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2890 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2891 if (user_cb->cb_fn == cb_fn &&
2892 user_cb->cb_arg == cb_arg &&
2893 user_cb->event == event) {
2898 /* create a new callback. */
2899 if (user_cb == NULL) {
2900 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2901 sizeof(struct rte_eth_dev_callback), 0);
2902 if (user_cb != NULL) {
2903 user_cb->cb_fn = cb_fn;
2904 user_cb->cb_arg = cb_arg;
2905 user_cb->event = event;
2906 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2910 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2911 return (user_cb == NULL) ? -ENOMEM : 0;
2915 rte_eth_dev_callback_unregister(uint16_t port_id,
2916 enum rte_eth_event_type event,
2917 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2920 struct rte_eth_dev *dev;
2921 struct rte_eth_dev_callback *cb, *next;
2926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2928 dev = &rte_eth_devices[port_id];
2929 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2932 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2934 next = TAILQ_NEXT(cb, next);
2936 if (cb->cb_fn != cb_fn || cb->event != event ||
2937 (cb->cb_arg != (void *)-1 &&
2938 cb->cb_arg != cb_arg))
2942 * if this callback is not executing right now,
2945 if (cb->active == 0) {
2946 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2953 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2958 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2959 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2961 struct rte_eth_dev_callback *cb_lst;
2962 struct rte_eth_dev_callback dev_cb;
2965 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2966 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2967 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2972 dev_cb.cb_arg = cb_arg;
2973 if (ret_param != NULL)
2974 dev_cb.ret_param = ret_param;
2976 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2977 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2978 dev_cb.cb_arg, dev_cb.ret_param);
2979 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2982 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2987 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
2990 struct rte_eth_dev *dev;
2991 struct rte_intr_handle *intr_handle;
2995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2997 dev = &rte_eth_devices[port_id];
2999 if (!dev->intr_handle) {
3000 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3004 intr_handle = dev->intr_handle;
3005 if (!intr_handle->intr_vec) {
3006 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3010 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3011 vec = intr_handle->intr_vec[qid];
3012 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3013 if (rc && rc != -EEXIST) {
3014 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3015 " op %d epfd %d vec %u\n",
3016 port_id, qid, op, epfd, vec);
3023 const struct rte_memzone *
3024 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3025 uint16_t queue_id, size_t size, unsigned align,
3028 char z_name[RTE_MEMZONE_NAMESIZE];
3029 const struct rte_memzone *mz;
3031 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3032 dev->device->driver->name, ring_name,
3033 dev->data->port_id, queue_id);
3035 mz = rte_memzone_lookup(z_name);
3039 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3043 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3044 int epfd, int op, void *data)
3047 struct rte_eth_dev *dev;
3048 struct rte_intr_handle *intr_handle;
3051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3053 dev = &rte_eth_devices[port_id];
3054 if (queue_id >= dev->data->nb_rx_queues) {
3055 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3059 if (!dev->intr_handle) {
3060 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3064 intr_handle = dev->intr_handle;
3065 if (!intr_handle->intr_vec) {
3066 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3070 vec = intr_handle->intr_vec[queue_id];
3071 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3072 if (rc && rc != -EEXIST) {
3073 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3074 " op %d epfd %d vec %u\n",
3075 port_id, queue_id, op, epfd, vec);
3083 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3086 struct rte_eth_dev *dev;
3088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3090 dev = &rte_eth_devices[port_id];
3092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3093 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3097 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3100 struct rte_eth_dev *dev;
3102 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3104 dev = &rte_eth_devices[port_id];
3106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3107 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3112 rte_eth_dev_filter_supported(uint16_t port_id,
3113 enum rte_filter_type filter_type)
3115 struct rte_eth_dev *dev;
3117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3119 dev = &rte_eth_devices[port_id];
3120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3121 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3122 RTE_ETH_FILTER_NOP, NULL);
3126 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3127 enum rte_filter_op filter_op, void *arg)
3129 struct rte_eth_dev *dev;
3131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3133 dev = &rte_eth_devices[port_id];
3134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3135 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3139 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3140 rte_rx_callback_fn fn, void *user_param)
3142 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3143 rte_errno = ENOTSUP;
3146 /* check input parameters */
3147 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3148 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3152 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3160 cb->param = user_param;
3162 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3163 /* Add the callbacks in fifo order. */
3164 struct rte_eth_rxtx_callback *tail =
3165 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3168 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3175 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3181 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3182 rte_rx_callback_fn fn, void *user_param)
3184 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3185 rte_errno = ENOTSUP;
3188 /* check input parameters */
3189 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3190 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3195 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3203 cb->param = user_param;
3205 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3206 /* Add the callbacks at fisrt position*/
3207 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3209 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3210 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3216 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3217 rte_tx_callback_fn fn, void *user_param)
3219 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3220 rte_errno = ENOTSUP;
3223 /* check input parameters */
3224 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3225 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3230 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3238 cb->param = user_param;
3240 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3241 /* Add the callbacks in fifo order. */
3242 struct rte_eth_rxtx_callback *tail =
3243 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3246 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3253 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3259 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3260 struct rte_eth_rxtx_callback *user_cb)
3262 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3265 /* Check input parameters. */
3266 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3267 if (user_cb == NULL ||
3268 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3271 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3272 struct rte_eth_rxtx_callback *cb;
3273 struct rte_eth_rxtx_callback **prev_cb;
3276 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3277 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3278 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3280 if (cb == user_cb) {
3281 /* Remove the user cb from the callback list. */
3282 *prev_cb = cb->next;
3287 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3293 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3294 struct rte_eth_rxtx_callback *user_cb)
3296 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3299 /* Check input parameters. */
3300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3301 if (user_cb == NULL ||
3302 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3305 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3307 struct rte_eth_rxtx_callback *cb;
3308 struct rte_eth_rxtx_callback **prev_cb;
3310 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3311 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3312 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3314 if (cb == user_cb) {
3315 /* Remove the user cb from the callback list. */
3316 *prev_cb = cb->next;
3321 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3327 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3328 struct rte_eth_rxq_info *qinfo)
3330 struct rte_eth_dev *dev;
3332 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3337 dev = &rte_eth_devices[port_id];
3338 if (queue_id >= dev->data->nb_rx_queues) {
3339 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3343 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3345 memset(qinfo, 0, sizeof(*qinfo));
3346 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3351 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3352 struct rte_eth_txq_info *qinfo)
3354 struct rte_eth_dev *dev;
3356 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3361 dev = &rte_eth_devices[port_id];
3362 if (queue_id >= dev->data->nb_tx_queues) {
3363 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3367 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3369 memset(qinfo, 0, sizeof(*qinfo));
3370 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3375 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3376 struct ether_addr *mc_addr_set,
3377 uint32_t nb_mc_addr)
3379 struct rte_eth_dev *dev;
3381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3383 dev = &rte_eth_devices[port_id];
3384 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3385 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3389 rte_eth_timesync_enable(uint16_t port_id)
3391 struct rte_eth_dev *dev;
3393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3394 dev = &rte_eth_devices[port_id];
3396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3397 return (*dev->dev_ops->timesync_enable)(dev);
3401 rte_eth_timesync_disable(uint16_t port_id)
3403 struct rte_eth_dev *dev;
3405 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3406 dev = &rte_eth_devices[port_id];
3408 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3409 return (*dev->dev_ops->timesync_disable)(dev);
3413 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3416 struct rte_eth_dev *dev;
3418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3419 dev = &rte_eth_devices[port_id];
3421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3422 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3426 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3427 struct timespec *timestamp)
3429 struct rte_eth_dev *dev;
3431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3432 dev = &rte_eth_devices[port_id];
3434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3435 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3439 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3441 struct rte_eth_dev *dev;
3443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3444 dev = &rte_eth_devices[port_id];
3446 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3447 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3451 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3453 struct rte_eth_dev *dev;
3455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3456 dev = &rte_eth_devices[port_id];
3458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3459 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3463 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3465 struct rte_eth_dev *dev;
3467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3468 dev = &rte_eth_devices[port_id];
3470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3471 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3475 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3477 struct rte_eth_dev *dev;
3479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3481 dev = &rte_eth_devices[port_id];
3482 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3483 return (*dev->dev_ops->get_reg)(dev, info);
3487 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3489 struct rte_eth_dev *dev;
3491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3493 dev = &rte_eth_devices[port_id];
3494 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3495 return (*dev->dev_ops->get_eeprom_length)(dev);
3499 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3501 struct rte_eth_dev *dev;
3503 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3505 dev = &rte_eth_devices[port_id];
3506 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3507 return (*dev->dev_ops->get_eeprom)(dev, info);
3511 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3513 struct rte_eth_dev *dev;
3515 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3517 dev = &rte_eth_devices[port_id];
3518 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3519 return (*dev->dev_ops->set_eeprom)(dev, info);
3523 rte_eth_dev_get_dcb_info(uint16_t port_id,
3524 struct rte_eth_dcb_info *dcb_info)
3526 struct rte_eth_dev *dev;
3528 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3530 dev = &rte_eth_devices[port_id];
3531 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3533 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3534 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3538 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3539 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3541 struct rte_eth_dev *dev;
3543 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3544 if (l2_tunnel == NULL) {
3545 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3549 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3550 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3554 dev = &rte_eth_devices[port_id];
3555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3557 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3561 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3562 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3566 struct rte_eth_dev *dev;
3568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3570 if (l2_tunnel == NULL) {
3571 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3575 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3576 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3581 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3585 dev = &rte_eth_devices[port_id];
3586 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3588 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3592 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3593 const struct rte_eth_desc_lim *desc_lim)
3595 if (desc_lim->nb_align != 0)
3596 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3598 if (desc_lim->nb_max != 0)
3599 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3601 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3605 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3606 uint16_t *nb_rx_desc,
3607 uint16_t *nb_tx_desc)
3609 struct rte_eth_dev *dev;
3610 struct rte_eth_dev_info dev_info;
3612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3614 dev = &rte_eth_devices[port_id];
3615 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3617 rte_eth_dev_info_get(port_id, &dev_info);
3619 if (nb_rx_desc != NULL)
3620 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3622 if (nb_tx_desc != NULL)
3623 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3629 rte_eth_dev_pool_ops_supported(uint8_t port_id, const char *pool)
3631 struct rte_eth_dev *dev;
3633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3638 dev = &rte_eth_devices[port_id];
3640 if (*dev->dev_ops->pool_ops_supported == NULL)
3641 return 1; /* all pools are supported */
3643 return (*dev->dev_ops->pool_ops_supported)(dev, pool);