4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #ifndef _I40E_ETHDEV_H_
35 #define _I40E_ETHDEV_H_
37 #define I40E_AQ_LEN 32
38 #define I40E_AQ_BUF_SZ 4096
39 /* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */
40 #define I40E_MAX_Q_PER_TC 64
41 #define I40E_NUM_DESC_DEFAULT 512
42 #define I40E_NUM_DESC_ALIGN 32
43 #define I40E_BUF_SIZE_MIN 1024
44 #define I40E_FRAME_SIZE_MAX 9728
45 #define I40E_QUEUE_BASE_ADDR_UNIT 128
46 /* number of VSIs and queue default setting */
47 #define I40E_MAX_QP_NUM_PER_VF 16
48 #define I40E_DEFAULT_QP_NUM_VMDQ 64
49 #define I40E_DEFAULT_QP_NUM_FDIR 64
50 #define I40E_UINT32_BIT_SIZE (CHAR_BIT * sizeof(uint32_t))
51 #define I40E_VFTA_SIZE (4096 / I40E_UINT32_BIT_SIZE)
52 /* Default TC traffic in case DCB is not enabled */
53 #define I40E_DEFAULT_TCMAP 0x1
56 #define I40E_FLAG_RSS (1ULL << 0)
57 #define I40E_FLAG_DCB (1ULL << 1)
58 #define I40E_FLAG_VMDQ (1ULL << 2)
59 #define I40E_FLAG_SRIOV (1ULL << 3)
60 #define I40E_FLAG_HEADER_SPLIT_DISABLED (1ULL << 4)
61 #define I40E_FLAG_HEADER_SPLIT_ENABLED (1ULL << 5)
62 #define I40E_FLAG_FDIR (1ULL << 6)
63 #define I40E_FLAG_ALL (I40E_FLAG_RSS | \
67 I40E_FLAG_HEADER_SPLIT_DISABLED | \
68 I40E_FLAG_HEADER_SPLIT_ENABLED | \
71 #define I40E_RSS_OFFLOAD_ALL ( \
72 ETH_RSS_NONF_IPV4_UDP | \
73 ETH_RSS_NONF_IPV4_TCP | \
74 ETH_RSS_NONF_IPV4_SCTP | \
75 ETH_RSS_NONF_IPV4_OTHER | \
77 ETH_RSS_NONF_IPV6_UDP | \
78 ETH_RSS_NONF_IPV6_TCP | \
79 ETH_RSS_NONF_IPV6_SCTP | \
80 ETH_RSS_NONF_IPV6_OTHER | \
84 /* All bits of RSS hash enable */
85 #define I40E_RSS_HENA_ALL ( \
86 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \
87 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \
88 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \
89 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \
90 (1ULL << I40E_FILTER_PCTYPE_FRAG_IPV4) | \
91 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \
92 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \
93 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \
94 (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \
95 (1ULL << I40E_FILTER_PCTYPE_FRAG_IPV6) | \
96 (1ULL << I40E_FILTER_PCTYPE_FCOE_OX) | \
97 (1ULL << I40E_FILTER_PCTYPE_FCOE_RX) | \
98 (1ULL << I40E_FILTER_PCTYPE_FCOE_OTHER) | \
99 (1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD))
103 TAILQ_HEAD(i40e_mac_filter_list, i40e_mac_filter);
105 /* MAC filter list structure */
106 struct i40e_mac_filter {
107 TAILQ_ENTRY(i40e_mac_filter) next;
108 struct ether_addr macaddr;
111 TAILQ_HEAD(i40e_vsi_list_head, i40e_vsi_list);
115 /* VSI list structure */
116 struct i40e_vsi_list {
117 TAILQ_ENTRY(i40e_vsi_list) list;
118 struct i40e_vsi *vsi;
121 struct i40e_rx_queue;
122 struct i40e_tx_queue;
124 /* Structure that defines a VEB */
126 struct i40e_vsi_list_head head;
127 struct i40e_vsi *associate_vsi; /* Associate VSI who owns the VEB */
128 uint16_t seid; /* The seid of VEB itself */
129 uint16_t uplink_seid; /* The uplink seid of this VEB */
131 struct i40e_eth_stats stats;
134 /* MACVLAN filter structure */
135 struct i40e_macvlan_filter {
136 struct ether_addr macaddr;
140 * Structure that defines a VSI, associated with a adapter.
143 struct i40e_adapter *adapter; /* Backreference to associated adapter */
144 struct i40e_aqc_vsi_properties_data info; /* VSI properties */
146 struct i40e_eth_stats eth_stats_offset;
147 struct i40e_eth_stats eth_stats;
149 * When drivers loaded, only a default main VSI exists. In case new VSI
150 * needs to add, HW needs to know the layout that VSIs are organized.
151 * Besides that, VSI isan element and can't switch packets, which needs
152 * to add new component VEB to perform switching. So, a new VSI needs
153 * to specify the the uplink VSI (Parent VSI) before created. The
154 * uplink VSI will check whether it had a VEB to switch packets. If no,
155 * it will try to create one. Then, uplink VSI will move the new VSI
156 * into its' sib_vsi_list to manage all the downlink VSI.
157 * sib_vsi_list: the VSI list that shared the same uplink VSI.
158 * parent_vsi : the uplink VSI. It's NULL for main VSI.
159 * veb : the VEB associates with the VSI.
161 struct i40e_vsi_list sib_vsi_list; /* sibling vsi list */
162 struct i40e_vsi *parent_vsi;
163 struct i40e_veb *veb; /* Associated veb, could be null */
165 enum i40e_vsi_type type; /* VSI types */
166 uint16_t vlan_num; /* Total VLAN number */
167 uint16_t mac_num; /* Total mac number */
168 uint32_t vfta[I40E_VFTA_SIZE]; /* VLAN bitmap */
169 struct i40e_mac_filter_list mac_list; /* macvlan filter list */
170 /* specific VSI-defined parameters, SRIOV stored the vf_id */
172 uint16_t seid; /* The seid of VSI itself */
173 uint16_t uplink_seid; /* The uplink seid of this VSI */
174 uint16_t nb_qps; /* Number of queue pairs VSI can occupy */
175 uint16_t max_macaddrs; /* Maximum number of MAC addresses */
176 uint16_t base_queue; /* The first queue index of this VSI */
178 * The offset to visit VSI related register, assigned by HW when
182 uint16_t msix_intr; /* The MSIX interrupt binds to VSI */
183 uint8_t enabled_tc; /* The traffic class enabled */
187 LIST_ENTRY(pool_entry) next;
192 LIST_HEAD(res_list, pool_entry);
194 struct i40e_res_pool_info {
195 uint32_t base; /* Resource start index */
196 uint32_t num_alloc; /* Allocated resource number */
197 uint32_t num_free; /* Total available resource number */
198 struct res_list alloc_list; /* Allocated resource list */
199 struct res_list free_list; /* Available resource list */
203 I40E_VF_INACTIVE = 0,
210 * Structure to store private data for PF host.
214 struct i40e_vsi *vsi;
215 enum I40E_VF_STATE state; /* The number of queue pairs availiable */
216 uint16_t vf_idx; /* VF index in pf->vfs */
217 uint16_t lan_nb_qps; /* Actual queues allocated */
218 uint16_t reset_cnt; /* Total vf reset times */
222 * Structure to store private data specific for PF instance.
225 struct i40e_adapter *adapter; /* The adapter this PF associate to */
226 struct i40e_vsi *main_vsi; /* pointer to main VSI structure */
227 uint16_t mac_seid; /* The seid of the MAC of this PF */
228 uint16_t main_vsi_seid; /* The seid of the main VSI */
229 uint16_t max_num_vsi;
230 struct i40e_res_pool_info qp_pool; /*Queue pair pool */
231 struct i40e_res_pool_info msix_pool; /* MSIX interrupt pool */
233 struct i40e_hw_port_stats stats_offset;
234 struct i40e_hw_port_stats stats;
237 struct rte_eth_dev_data *dev_data; /* Pointer to the device data */
238 struct ether_addr dev_addr; /* PF device mac address */
239 uint64_t flags; /* PF featuer flags */
240 /* All kinds of queue pair setting for different VSIs */
241 struct i40e_pf_vf *vfs;
243 /* Each of below queue pairs should be power of 2 since it's the
244 precondition after TC configuration applied */
245 uint16_t lan_nb_qps; /* The number of queue pairs of LAN */
246 uint16_t vmdq_nb_qps; /* The number of queue pairs of VMDq */
247 uint16_t vf_nb_qps; /* The number of queue pairs of VF */
248 uint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */
252 PFMSG_LINK_CHANGE = 0x1,
253 PFMSG_RESET_IMPENDING = 0x2,
254 PFMSG_DRIVER_CLOSE = 0x4,
257 struct i40e_vsi_vlan_pvid_info {
258 uint16_t on; /* Enable or disable pvid */
260 uint16_t pvid; /* Valid in case 'on' is set to set pvid */
262 /* Valid in case 'on' is cleared. 'tagged' will reject tagged packets,
263 * while 'untagged' will reject untagged packets.
271 struct i40e_vf_rx_queues {
272 uint64_t rx_dma_addr;
273 uint32_t rx_ring_len;
277 struct i40e_vf_tx_queues {
278 uint64_t tx_dma_addr;
279 uint32_t tx_ring_len;
283 * Structure to store private data specific for VF instance.
286 struct i40e_adapter *adapter; /* The adapter this VF associate to */
287 struct rte_eth_dev_data *dev_data; /* Pointer to the device data */
288 uint16_t num_queue_pairs;
289 uint16_t max_pkt_len; /* Maximum packet length */
290 bool promisc_unicast_enabled;
291 bool promisc_multicast_enabled;
293 bool host_is_dpdk; /* The flag indicates if the host is DPDK */
294 uint16_t promisc_flags; /* Promiscuous setting */
295 uint32_t vlan[I40E_VFTA_SIZE]; /* VLAN bit map */
301 volatile uint32_t pend_cmd; /* pending command not finished yet */
302 u16 pend_msg; /* flags indicates events from pf not handled yet */
305 struct i40e_virtchnl_vf_resource *vf_res; /* All VSIs */
306 struct i40e_virtchnl_vsi_resource *vsi_res; /* LAN VSI */
311 * Structure to store private data for each PF/VF instance.
313 struct i40e_adapter {
314 /* Common for both PF and VF */
316 struct rte_eth_dev *eth_dev;
318 /* Specific for PF or VF */
325 int i40e_vsi_switch_queues(struct i40e_vsi *vsi, bool on);
326 int i40e_vsi_release(struct i40e_vsi *vsi);
327 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf,
328 enum i40e_vsi_type type,
329 struct i40e_vsi *uplink_vsi,
330 uint16_t user_param);
331 int i40e_switch_rx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on);
332 int i40e_switch_tx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on);
333 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, uint16_t vlan);
334 int i40e_vsi_delete_vlan(struct i40e_vsi *vsi, uint16_t vlan);
335 int i40e_vsi_add_mac(struct i40e_vsi *vsi, struct ether_addr *addr);
336 int i40e_vsi_delete_mac(struct i40e_vsi *vsi, struct ether_addr *addr);
337 void i40e_update_vsi_stats(struct i40e_vsi *vsi);
338 void i40e_pf_disable_irq0(struct i40e_hw *hw);
339 void i40e_pf_enable_irq0(struct i40e_hw *hw);
340 int i40e_dev_link_update(struct rte_eth_dev *dev,
341 __rte_unused int wait_to_complete);
342 void i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi);
343 void i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi);
344 int i40e_vsi_vlan_pvid_set(struct i40e_vsi *vsi,
345 struct i40e_vsi_vlan_pvid_info *info);
346 int i40e_vsi_config_vlan_stripping(struct i40e_vsi *vsi, bool on);
347 uint64_t i40e_config_hena(uint64_t flags);
348 uint64_t i40e_parse_hena(uint64_t flags);
350 /* I40E_DEV_PRIVATE_TO */
351 #define I40E_DEV_PRIVATE_TO_PF(adapter) \
352 (&((struct i40e_adapter *)adapter)->pf)
353 #define I40E_DEV_PRIVATE_TO_HW(adapter) \
354 (&((struct i40e_adapter *)adapter)->hw)
355 #define I40E_DEV_PRIVATE_TO_ADAPTER(adapter) \
356 ((struct i40e_adapter *)adapter)
358 /* I40EVF_DEV_PRIVATE_TO */
359 #define I40EVF_DEV_PRIVATE_TO_VF(adapter) \
360 (&((struct i40e_adapter *)adapter)->vf)
362 static inline struct i40e_vsi *
363 i40e_get_vsi_from_adapter(struct i40e_adapter *adapter)
370 hw = I40E_DEV_PRIVATE_TO_HW(adapter);
371 if (hw->mac.type == I40E_MAC_VF) {
372 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(adapter);
375 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(adapter);
379 #define I40E_DEV_PRIVATE_TO_VSI(adapter) \
380 i40e_get_vsi_from_adapter((struct i40e_adapter *)adapter)
383 #define I40E_VSI_TO_HW(vsi) \
384 (&(((struct i40e_vsi *)vsi)->adapter->hw))
385 #define I40E_VSI_TO_PF(vsi) \
386 (&(((struct i40e_vsi *)vsi)->adapter->pf))
387 #define I40E_VSI_TO_DEV_DATA(vsi) \
388 (((struct i40e_vsi *)vsi)->adapter->pf.dev_data)
389 #define I40E_VSI_TO_ETH_DEV(vsi) \
390 (((struct i40e_vsi *)vsi)->adapter->eth_dev)
393 #define I40E_PF_TO_HW(pf) \
394 (&(((struct i40e_pf *)pf)->adapter->hw))
395 #define I40E_PF_TO_ADAPTER(pf) \
396 ((struct i40e_adapter *)pf->adapter)
399 #define I40E_VF_TO_HW(vf) \
400 (&(((struct i40e_vf *)vf)->adapter->hw))
403 i40e_init_adminq_parameter(struct i40e_hw *hw)
405 hw->aq.num_arq_entries = I40E_AQ_LEN;
406 hw->aq.num_asq_entries = I40E_AQ_LEN;
407 hw->aq.arq_buf_size = I40E_AQ_BUF_SZ;
408 hw->aq.asq_buf_size = I40E_AQ_BUF_SZ;
411 #endif /* _I40E_ETHDEV_H_ */