1 /*******************************************************************************
3 Copyright (c) 2001-2014, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ***************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_type.h"
38 #ident "$Id: ixgbe_vf.c,v 1.62 2013/06/27 21:30:59 jtkirshe Exp $"
40 #ifndef IXGBE_VFWRITE_REG
41 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
43 #ifndef IXGBE_VFREAD_REG
44 #define IXGBE_VFREAD_REG IXGBE_READ_REG
48 * ixgbe_init_ops_vf - Initialize the pointers for vf
49 * @hw: pointer to hardware structure
51 * This will assign function pointers, adapter-specific functions can
52 * override the assignment of generic function pointers by assigning
53 * their own adapter-specific function pointers.
54 * Does not touch the hardware.
56 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
59 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
60 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
61 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
62 /* Cannot clear stats on VF */
63 hw->mac.ops.clear_hw_cntrs = NULL;
64 hw->mac.ops.get_media_type = NULL;
65 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
66 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
67 hw->mac.ops.get_bus_info = NULL;
70 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
71 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
72 hw->mac.ops.get_link_capabilities = NULL;
74 /* RAR, Multicast, VLAN */
75 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
76 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
77 hw->mac.ops.init_rx_addrs = NULL;
78 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
79 hw->mac.ops.enable_mc = NULL;
80 hw->mac.ops.disable_mc = NULL;
81 hw->mac.ops.clear_vfta = NULL;
82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
84 hw->mac.max_tx_queues = 1;
85 hw->mac.max_rx_queues = 1;
87 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
92 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
93 * @hw: pointer to hardware structure
95 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
102 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
103 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
104 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
106 /* DCA_RXCTRL default value */
107 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
108 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
109 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
111 /* DCA_TXCTRL default value */
112 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
113 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
114 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
116 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
118 for (i = 0; i < 7; i++) {
119 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
120 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
121 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
122 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
123 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
124 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
128 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
132 IXGBE_WRITE_FLUSH(hw);
136 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
137 * @hw: pointer to hardware structure
139 * Starts the hardware by filling the bus info structure and media type, clears
140 * all on chip counters, initializes receive address registers, multicast
141 * table, VLAN filter table, calls routine to set up link and flow control
142 * settings, and leaves transmit and receive units disabled and uninitialized
144 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
146 /* Clear adapter stopped flag */
147 hw->adapter_stopped = false;
149 return IXGBE_SUCCESS;
153 * ixgbe_init_hw_vf - virtual function hardware initialization
154 * @hw: pointer to hardware structure
156 * Initialize the hardware by resetting the hardware and then starting
159 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
161 s32 status = hw->mac.ops.start_hw(hw);
163 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
169 * ixgbe_reset_hw_vf - Performs hardware reset
170 * @hw: pointer to hardware structure
172 * Resets the hardware by reseting the transmit and receive units, masks and
173 * clears all interrupts.
175 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
177 struct ixgbe_mbx_info *mbx = &hw->mbx;
178 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
179 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
180 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
181 u8 *addr = (u8 *)(&msgbuf[1]);
183 DEBUGFUNC("ixgbevf_reset_hw_vf");
185 /* Call adapter stop to disable tx/rx and clear interrupts */
186 hw->mac.ops.stop_adapter(hw);
188 /* reset the api version */
189 hw->api_version = ixgbe_mbox_api_10;
191 DEBUGOUT("Issuing a function level reset to MAC\n");
193 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
194 IXGBE_WRITE_FLUSH(hw);
198 /* we cannot reset while the RSTI / RSTD bits are asserted */
199 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
205 return IXGBE_ERR_RESET_FAILED;
207 /* Reset VF registers to initial values */
208 ixgbe_virt_clr_reg(hw);
210 /* mailbox timeout can now become active */
211 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
213 msgbuf[0] = IXGBE_VF_RESET;
214 mbx->ops.write_posted(hw, msgbuf, 1, 0);
219 * set our "perm_addr" based on info provided by PF
220 * also set up the mc_filter_type which is piggy backed
221 * on the mac address in word 3
223 ret_val = mbx->ops.read_posted(hw, msgbuf,
224 IXGBE_VF_PERMADDR_MSG_LEN, 0);
228 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
229 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
230 return IXGBE_ERR_INVALID_MAC_ADDR;
232 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
233 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
239 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
240 * @hw: pointer to hardware structure
242 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
243 * disables transmit and receive units. The adapter_stopped flag is used by
244 * the shared code and drivers to determine if the adapter is in a stopped
245 * state and should not touch the hardware.
247 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
253 * Set the adapter_stopped flag so other driver functions stop touching
256 hw->adapter_stopped = true;
258 /* Clear interrupt mask to stop from interrupts being generated */
259 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
261 /* Clear any pending interrupts, flush previous writes */
262 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
264 /* Disable the transmit unit. Each queue must be disabled. */
265 for (i = 0; i < hw->mac.max_tx_queues; i++)
266 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
268 /* Disable the receive unit by stopping each queue */
269 for (i = 0; i < hw->mac.max_rx_queues; i++) {
270 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
271 reg_val &= ~IXGBE_RXDCTL_ENABLE;
272 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
274 /* Clear packet split and pool config */
275 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
277 /* flush all queues disables */
278 IXGBE_WRITE_FLUSH(hw);
281 return IXGBE_SUCCESS;
285 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
286 * @hw: pointer to hardware structure
287 * @mc_addr: the multicast address
289 * Extracts the 12 bits, from a multicast address, to determine which
290 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
291 * incoming rx multicast addresses, to determine the bit-vector to check in
292 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
293 * by the MO field of the MCSTCTRL. The MO field is set during initialization
296 STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
300 switch (hw->mac.mc_filter_type) {
301 case 0: /* use bits [47:36] of the address */
302 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
304 case 1: /* use bits [46:35] of the address */
305 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
307 case 2: /* use bits [45:34] of the address */
308 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
310 case 3: /* use bits [43:32] of the address */
311 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
313 default: /* Invalid mc_filter_type */
314 DEBUGOUT("MC filter type param set incorrectly\n");
319 /* vector can only be 12-bits or boundary will be exceeded */
324 STATIC void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
327 struct ixgbe_mbx_info *mbx = &hw->mbx;
328 u32 retmsg[IXGBE_VFMAILBOX_SIZE];
329 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
332 mbx->ops.read_posted(hw, retmsg, size, 0);
336 * ixgbe_set_rar_vf - set device MAC address
337 * @hw: pointer to hardware structure
338 * @index: Receive address register to write
339 * @addr: Address to put into receive address register
340 * @vmdq: VMDq "set" or "pool" index
341 * @enable_addr: set flag that address is active
343 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
346 struct ixgbe_mbx_info *mbx = &hw->mbx;
348 u8 *msg_addr = (u8 *)(&msgbuf[1]);
350 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
352 memset(msgbuf, 0, 12);
353 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
354 memcpy(msg_addr, addr, 6);
355 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
358 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
360 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
362 /* if nacked the address was rejected, use "perm_addr" */
364 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
365 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
371 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
372 * @hw: pointer to the HW structure
373 * @mc_addr_list: array of multicast addresses to program
374 * @mc_addr_count: number of multicast addresses to program
375 * @next: caller supplied function to return next address in list
377 * Updates the Multicast Table Array.
379 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
380 u32 mc_addr_count, ixgbe_mc_addr_itr next,
383 struct ixgbe_mbx_info *mbx = &hw->mbx;
384 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
385 u16 *vector_list = (u16 *)&msgbuf[1];
390 UNREFERENCED_1PARAMETER(clear);
392 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
394 /* Each entry in the list uses 1 16 bit word. We have 30
395 * 16 bit words available in our HW msg buffer (minus 1 for the
396 * msg type). That's 30 hash values if we pack 'em right. If
397 * there are more than 30 MC addresses to add then punt the
398 * extras for now and then add code to handle more than 30 later.
399 * It would be unusual for a server to request that many multi-cast
400 * addresses except for in large enterprise network environments.
403 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
405 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
406 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
407 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
409 for (i = 0; i < cnt; i++) {
410 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
411 DEBUGOUT1("Hash value = 0x%03X\n", vector);
412 vector_list[i] = (u16)vector;
415 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
419 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
420 * @hw: pointer to the HW structure
421 * @vlan: 12 bit VLAN ID
422 * @vind: unused by VF drivers
423 * @vlan_on: if true then set bit, else clear bit
425 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
427 struct ixgbe_mbx_info *mbx = &hw->mbx;
430 UNREFERENCED_1PARAMETER(vind);
432 msgbuf[0] = IXGBE_VF_SET_VLAN;
434 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
435 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
437 ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0);
439 ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0);
441 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
442 return IXGBE_SUCCESS;
444 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
448 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
449 * @hw: pointer to hardware structure
451 * Returns the number of transmit queues for the given adapter.
453 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
455 UNREFERENCED_1PARAMETER(hw);
456 return IXGBE_VF_MAX_TX_QUEUES;
460 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
461 * @hw: pointer to hardware structure
463 * Returns the number of receive queues for the given adapter.
465 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
467 UNREFERENCED_1PARAMETER(hw);
468 return IXGBE_VF_MAX_RX_QUEUES;
472 * ixgbe_get_mac_addr_vf - Read device MAC address
473 * @hw: pointer to the HW structure
475 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
479 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
480 mac_addr[i] = hw->mac.perm_addr[i];
482 return IXGBE_SUCCESS;
485 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
487 struct ixgbe_mbx_info *mbx = &hw->mbx;
489 u8 *msg_addr = (u8 *)(&msgbuf[1]);
492 memset(msgbuf, 0, sizeof(msgbuf));
494 * If index is one then this is the start of a new list and needs
495 * indication to the PF so it can do it's own list management.
496 * If it is zero then that tells the PF to just clear all of
497 * this VF's macvlans and there is no new list.
499 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
500 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
502 memcpy(msg_addr, addr, 6);
503 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
506 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
508 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
511 if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
512 ret_val = IXGBE_ERR_OUT_OF_MEM;
518 * ixgbe_setup_mac_link_vf - Setup MAC link settings
519 * @hw: pointer to hardware structure
520 * @speed: new link speed
521 * @autoneg: true if autonegotiation enabled
522 * @autoneg_wait_to_complete: true when waiting for completion is needed
524 * Set the link speed in the AUTOC register and restarts link.
526 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
527 bool autoneg_wait_to_complete)
529 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
530 return IXGBE_SUCCESS;
534 * ixgbe_check_mac_link_vf - Get link/speed status
535 * @hw: pointer to hardware structure
536 * @speed: pointer to link speed
537 * @link_up: true is link is up, false otherwise
538 * @autoneg_wait_to_complete: true when waiting for completion is needed
540 * Reads the links register to determine if link is up and the current speed
542 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
543 bool *link_up, bool autoneg_wait_to_complete)
545 struct ixgbe_mbx_info *mbx = &hw->mbx;
546 struct ixgbe_mac_info *mac = &hw->mac;
547 s32 ret_val = IXGBE_SUCCESS;
550 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
552 /* If we were hit with a reset drop the link */
553 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
554 mac->get_link_status = true;
556 if (!mac->get_link_status)
559 /* if link status is down no point in checking to see if pf is up */
560 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
561 if (!(links_reg & IXGBE_LINKS_UP))
564 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
565 * before the link status is correct
567 if (mac->type == ixgbe_mac_82599_vf) {
570 for (i = 0; i < 5; i++) {
572 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
574 if (!(links_reg & IXGBE_LINKS_UP))
579 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
580 case IXGBE_LINKS_SPEED_10G_82599:
581 *speed = IXGBE_LINK_SPEED_10GB_FULL;
583 case IXGBE_LINKS_SPEED_1G_82599:
584 *speed = IXGBE_LINK_SPEED_1GB_FULL;
586 case IXGBE_LINKS_SPEED_100_82599:
587 *speed = IXGBE_LINK_SPEED_100_FULL;
591 /* if the read failed it could just be a mailbox collision, best wait
592 * until we are called again and don't report an error
594 if (mbx->ops.read(hw, &in_msg, 1, 0))
597 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
598 /* msg is not CTS and is NACK we must have lost CTS status */
599 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
604 /* the pf is talking, if we timed out in the past we reinit */
610 /* if we passed all the tests above then the link is up and we no
611 * longer need to check for link
613 mac->get_link_status = false;
616 *link_up = !mac->get_link_status;
621 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
622 * @hw: pointer to the HW structure
623 * @max_size: value to assign to max frame size
625 void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
629 msgbuf[0] = IXGBE_VF_SET_LPE;
630 msgbuf[1] = max_size;
631 ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
635 * ixgbevf_negotiate_api_version - Negotiate supported API version
636 * @hw: pointer to the HW structure
637 * @api: integer containing requested API version
639 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
644 /* Negotiate the mailbox API version */
645 msg[0] = IXGBE_VF_API_NEGOTIATE;
648 err = hw->mbx.ops.write_posted(hw, msg, 3, 0);
651 err = hw->mbx.ops.read_posted(hw, msg, 3, 0);
654 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
656 /* Store value and return 0 on success */
657 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
658 hw->api_version = api;
662 err = IXGBE_ERR_INVALID_ARGUMENT;
668 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
669 unsigned int *default_tc)
674 /* do nothing if API doesn't support ixgbevf_get_queues */
675 switch (hw->api_version) {
676 case ixgbe_mbox_api_11:
682 /* Fetch queue configuration from the PF */
683 msg[0] = IXGBE_VF_GET_QUEUES;
684 msg[1] = msg[2] = msg[3] = msg[4] = 0;
685 err = hw->mbx.ops.write_posted(hw, msg, 5, 0);
688 err = hw->mbx.ops.read_posted(hw, msg, 5, 0);
691 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
694 * if we we didn't get an ACK there must have been
695 * some sort of mailbox error so we should treat it
698 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK))
699 return IXGBE_ERR_MBX;
701 /* record and validate values from message */
702 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
703 if (hw->mac.max_tx_queues == 0 ||
704 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
705 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
707 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
708 if (hw->mac.max_rx_queues == 0 ||
709 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
710 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
712 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
713 /* in case of unknown state assume we cannot tag frames */
714 if (*num_tcs > hw->mac.max_rx_queues)
717 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
718 /* default to queue 0 on out-of-bounds queue number */
719 if (*default_tc >= hw->mac.max_tx_queues)