4 * Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
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38 #include <rte_common.h>
40 #include <rte_memory.h>
41 #include <rte_memzone.h>
42 #include <rte_cycles.h>
43 #include <rte_prefetch.h>
44 #include <rte_branch_prediction.h>
47 #include "rte_sched.h"
48 #include "rte_bitmap.h"
49 #include "rte_sched_common.h"
50 #include "rte_approx.h"
52 #ifdef __INTEL_COMPILER
53 #pragma warning(disable:2259) /* conversion may lose significant bits */
56 #ifndef RTE_SCHED_DEBUG
57 #define RTE_SCHED_DEBUG 0
60 #ifndef RTE_SCHED_OPTIMIZATIONS
61 #define RTE_SCHED_OPTIMIZATIONS 0
64 #if RTE_SCHED_OPTIMIZATIONS
65 #include <immintrin.h>
68 #define RTE_SCHED_ENQUEUE 1
70 #define RTE_SCHED_TS 1
72 #if RTE_SCHED_TS == 0 /* Infinite credits. Traffic shaping disabled. */
73 #define RTE_SCHED_TS_CREDITS_UPDATE 0
74 #define RTE_SCHED_TS_CREDITS_CHECK 0
75 #else /* Real Credits. Full traffic shaping implemented. */
76 #define RTE_SCHED_TS_CREDITS_UPDATE 1
77 #define RTE_SCHED_TS_CREDITS_CHECK 1
80 #ifndef RTE_SCHED_TB_RATE_CONFIG_ERR
81 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
84 #define RTE_SCHED_WRR 1
86 #ifndef RTE_SCHED_WRR_SHIFT
87 #define RTE_SCHED_WRR_SHIFT 3
90 #ifndef RTE_SCHED_PORT_N_GRINDERS
91 #define RTE_SCHED_PORT_N_GRINDERS 8
93 #if (RTE_SCHED_PORT_N_GRINDERS == 0) || (RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1))
94 #error Number of grinders must be non-zero and a power of 2
96 #if (RTE_SCHED_OPTIMIZATIONS && (RTE_SCHED_PORT_N_GRINDERS != 8))
97 #error Number of grinders must be 8 when RTE_SCHED_OPTIMIZATIONS is set
100 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
102 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
104 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
106 struct rte_sched_subport {
107 /* Token bucket (TB) */
108 uint64_t tb_time; /* time of last update */
110 uint32_t tb_credits_per_period;
114 /* Traffic classes (TCs) */
115 uint64_t tc_time; /* time of next update */
116 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
117 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
120 /* TC oversubscription */
121 uint32_t tc_ov_period;
123 uint32_t tc_ov_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
124 uint8_t tc_ov_period_id;
125 uint8_t tc_ov[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
126 uint32_t tc_ov_n[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
127 double tc_ov_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
130 struct rte_sched_subport_stats stats;
133 struct rte_sched_pipe_profile {
134 /* Token bucket (TB) */
136 uint32_t tb_credits_per_period;
139 /* Pipe traffic classes */
141 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
142 uint8_t tc_ov_weight[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
145 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
148 struct rte_sched_pipe {
149 /* Token bucket (TB) */
150 uint64_t tb_time; /* time of last update */
153 /* Pipe profile and flags */
156 /* Traffic classes (TCs) */
157 uint64_t tc_time; /* time of next update */
158 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
160 /* Weighted Round Robin (WRR) */
161 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
163 /* TC oversubscription */
164 #ifdef RTE_SCHED_SUBPORT_TC_OV
165 uint32_t tc_ov_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
166 uint8_t tc_ov_period_id;
170 } __rte_cache_aligned;
172 struct rte_sched_queue {
177 struct rte_sched_queue_extra {
178 struct rte_sched_queue_stats stats;
185 e_GRINDER_PREFETCH_PIPE = 0,
186 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
187 e_GRINDER_PREFETCH_MBUF,
191 struct rte_sched_grinder {
193 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
194 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
199 enum grinder_state state;
202 struct rte_sched_subport *subport;
203 struct rte_sched_pipe *pipe;
204 struct rte_sched_pipe_profile *pipe_params;
207 uint8_t tccache_qmask[4];
208 uint32_t tccache_qindex[4];
214 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
215 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
216 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
220 struct rte_mbuf *pkt;
224 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
225 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
226 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
229 struct rte_sched_port {
230 /* User parameters */
231 uint32_t n_subports_per_port;
232 uint32_t n_pipes_per_subport;
234 uint32_t frame_overhead;
235 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
236 uint32_t n_pipe_profiles;
238 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
242 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
243 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
244 uint64_t time; /* Current NIC TX time measured in bytes */
245 double cycles_per_byte; /* CPU cycles per byte */
247 /* Scheduling loop detection */
249 uint32_t pipe_exhaustion;
252 struct rte_bitmap bmp;
253 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
256 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
257 uint32_t busy_grinders;
258 struct rte_mbuf **pkts_out;
261 /* Queue base calculation */
262 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
265 /* Large data structures */
266 struct rte_sched_subport *subport;
267 struct rte_sched_pipe *pipe;
268 struct rte_sched_queue *queue;
269 struct rte_sched_queue_extra *queue_extra;
270 struct rte_sched_pipe_profile *pipe_profiles;
272 struct rte_mbuf **queue_array;
273 uint8_t memory[0] __rte_cache_aligned;
274 } __rte_cache_aligned;
276 enum rte_sched_port_array {
277 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
278 e_RTE_SCHED_PORT_ARRAY_PIPE,
279 e_RTE_SCHED_PORT_ARRAY_QUEUE,
280 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
281 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
282 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
283 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
284 e_RTE_SCHED_PORT_ARRAY_TOTAL,
287 #ifdef RTE_SCHED_COLLECT_STATS
289 static inline uint32_t
290 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
292 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
297 static inline uint32_t
298 rte_sched_port_queues_per_port(struct rte_sched_port *port)
300 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
304 rte_sched_port_check_params(struct rte_sched_port_params *params)
308 if (params == NULL) {
313 if (params->name == NULL) {
318 if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES)) {
323 if (params->rate == 0) {
327 /* n_subports_per_port: non-zero, power of 2 */
328 if ((params->n_subports_per_port == 0) || (!rte_is_power_of_2(params->n_subports_per_port))) {
332 /* n_pipes_per_subport: non-zero, power of 2 */
333 if ((params->n_pipes_per_subport == 0) || (!rte_is_power_of_2(params->n_pipes_per_subport))) {
337 /* qsize: non-zero, power of 2, no bigger than 32K (due to 16-bit read/write pointers) */
338 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
339 uint16_t qsize = params->qsize[i];
341 if ((qsize == 0) || (!rte_is_power_of_2(qsize))) {
346 /* pipe_profiles and n_pipe_profiles */
347 if ((params->pipe_profiles == NULL) ||
348 (params->n_pipe_profiles == 0) ||
349 (params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)) {
353 for (i = 0; i < params->n_pipe_profiles; i ++) {
354 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
356 /* TB rate: non-zero, not greater than port rate */
357 if ((p->tb_rate == 0) || (p->tb_rate > params->rate)) {
361 /* TB size: non-zero */
362 if (p->tb_size == 0) {
366 /* TC rate: non-zero, less than pipe rate */
367 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
368 if ((p->tc_rate[j] == 0) || (p->tc_rate[j] > p->tb_rate)) {
373 /* TC period: non-zero */
374 if (p->tc_period == 0) {
378 #ifdef RTE_SCHED_SUBPORT_TC_OV
379 /* TC oversubscription weights: non-zero */
380 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
381 if (p->tc_ov_weight[j] == 0) {
387 /* Queue WRR weights: non-zero */
388 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j ++) {
389 if (p->wrr_weights[j] == 0) {
399 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
401 uint32_t n_subports_per_port = params->n_subports_per_port;
402 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
403 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
404 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
406 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
407 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
408 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
409 uint32_t size_queue_extra = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
410 uint32_t size_pipe_profiles = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
411 uint32_t size_bmp_array = n_queues_per_port / 8;
412 uint32_t size_per_pipe_queue_array, size_queue_array;
416 size_per_pipe_queue_array = 0;
417 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
418 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS * params->qsize[i] * sizeof(struct rte_mbuf *);
420 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
424 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT) return base;
425 base += CACHE_LINE_ROUNDUP(size_subport);
427 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) return base;
428 base += CACHE_LINE_ROUNDUP(size_pipe);
430 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) return base;
431 base += CACHE_LINE_ROUNDUP(size_queue);
433 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) return base;
434 base += CACHE_LINE_ROUNDUP(size_queue_extra);
436 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) return base;
437 base += CACHE_LINE_ROUNDUP(size_pipe_profiles);
439 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY) return base;
440 base += CACHE_LINE_ROUNDUP(size_bmp_array);
442 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY) return base;
443 base += CACHE_LINE_ROUNDUP(size_queue_array);
449 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
451 uint32_t size0, size1;
454 status = rte_sched_port_check_params(params);
456 RTE_LOG(INFO, SCHED, "Port scheduler params check failed (%d)\n", status);
461 size0 = sizeof(struct rte_sched_port);
462 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
464 return (size0 + size1);
468 rte_sched_port_config_qsize(struct rte_sched_port *port)
471 port->qsize_add[0] = 0;
472 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
473 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
474 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
477 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
478 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
479 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
480 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
483 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
484 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
485 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
486 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
489 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
490 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
491 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
492 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
494 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
498 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
500 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
502 RTE_LOG(INFO, SCHED, "Low level config for pipe profile %u:\n"
503 "\tToken bucket: period = %u, credits per period = %u, size = %u\n"
504 "\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u], ov weights = [%hhu, %hhu, %hhu, %hhu]\n"
505 "\tWRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
510 p->tb_credits_per_period,
513 /* Traffic classes */
515 p->tc_credits_per_period[0],
516 p->tc_credits_per_period[1],
517 p->tc_credits_per_period[2],
518 p->tc_credits_per_period[3],
525 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
526 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
527 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
528 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
531 static inline uint64_t
532 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
534 uint64_t time = time_ms;
535 time = (time * rate) / 1000;
541 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
545 for (i = 0; i < port->n_pipe_profiles; i ++) {
546 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
547 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
550 if (src->tb_rate == params->rate) {
551 dst->tb_credits_per_period = 1;
554 double tb_rate = ((double) src->tb_rate) / ((double) params->rate);
555 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
557 rte_approx(tb_rate, d, &dst->tb_credits_per_period, &dst->tb_period);
559 dst->tb_size = src->tb_size;
561 /* Traffic Classes */
562 dst->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, params->rate);
563 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
564 dst->tc_credits_per_period[j] = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, src->tc_rate[j]);
566 #ifdef RTE_SCHED_SUBPORT_TC_OV
567 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
568 dst->tc_ov_weight[j] = src->tc_ov_weight[j];
573 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
574 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
575 uint32_t lcd, lcd1, lcd2;
578 qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
580 wrr_cost[0] = src->wrr_weights[qindex];
581 wrr_cost[1] = src->wrr_weights[qindex + 1];
582 wrr_cost[2] = src->wrr_weights[qindex + 2];
583 wrr_cost[3] = src->wrr_weights[qindex + 3];
585 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
586 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
587 lcd = rte_get_lcd(lcd1, lcd2);
589 wrr_cost[0] = lcd / wrr_cost[0];
590 wrr_cost[1] = lcd / wrr_cost[1];
591 wrr_cost[2] = lcd / wrr_cost[2];
592 wrr_cost[3] = lcd / wrr_cost[3];
594 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
595 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
596 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
597 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
600 rte_sched_port_log_pipe_profile(port, i);
604 struct rte_sched_port *
605 rte_sched_port_config(struct rte_sched_port_params *params)
607 struct rte_sched_port *port = NULL;
608 const struct rte_memzone *mz = NULL;
609 uint32_t mem_size, i;
611 /* Check user parameters. Determine the amount of memory to allocate */
612 mem_size = rte_sched_port_get_memory_footprint(params);
617 /* Allocate memory to store the data structures */
618 mz = rte_memzone_lookup(params->name);
620 /* Use existing memzone, provided that its size is big enough */
621 if (mz->len < mem_size) {
625 /* Create new memzone */
626 mz = rte_memzone_reserve(params->name, mem_size, params->socket, 0);
631 memset(mz->addr, 0, mem_size);
632 port = (struct rte_sched_port *) mz->addr;
634 /* User parameters */
635 port->n_subports_per_port = params->n_subports_per_port;
636 port->n_pipes_per_subport = params->n_pipes_per_subport;
637 port->rate = params->rate;
638 port->frame_overhead = params->frame_overhead;
639 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
640 port->n_pipe_profiles = params->n_pipe_profiles;
643 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
646 for (j = 0; j < e_RTE_METER_COLORS; j++) {
647 if (rte_red_config_init(&port->red_config[i][j],
648 params->red_params[i][j].wq_log2,
649 params->red_params[i][j].min_th,
650 params->red_params[i][j].max_th,
651 params->red_params[i][j].maxp_inv) != 0) {
659 port->time_cpu_cycles = rte_get_tsc_cycles();
660 port->time_cpu_bytes = 0;
662 port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
664 /* Scheduling loop detection */
665 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
666 port->pipe_exhaustion = 0;
669 port->busy_grinders = 0;
670 port->pkts_out = NULL;
671 port->n_pkts_out = 0;
673 /* Queue base calculation */
674 rte_sched_port_config_qsize(port);
676 /* Large data structures */
677 port->subport = (struct rte_sched_subport *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_SUBPORT));
678 port->pipe = (struct rte_sched_pipe *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE));
679 port->queue = (struct rte_sched_queue *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE));
680 port->queue_extra = (struct rte_sched_queue_extra *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
681 port->pipe_profiles = (struct rte_sched_pipe_profile *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
682 port->bmp_array = port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
683 port->queue_array = (struct rte_mbuf **) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
685 /* Pipe profile table */
686 rte_sched_port_config_pipe_profile_table(port, params);
689 if (rte_bitmap_init(&port->bmp, port->bmp_array, rte_sched_port_queues_per_port(port)) != 0) {
690 RTE_LOG(INFO, SCHED, "Bitmap init error\n");
693 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
694 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
701 rte_sched_port_free(struct rte_sched_port *port)
703 /* Check user parameters */
707 rte_bitmap_free(&port->bmp);
713 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
715 struct rte_sched_subport *s = port->subport + i;
717 RTE_LOG(INFO, SCHED, "Low level config for subport %u:\n"
718 "\tToken bucket: period = %u, credits per period = %u, size = %u\n"
719 "\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u], ov period = %u\n",
724 s->tb_credits_per_period,
727 /* Traffic classes */
729 s->tc_credits_per_period[0],
730 s->tc_credits_per_period[1],
731 s->tc_credits_per_period[2],
732 s->tc_credits_per_period[3],
737 rte_sched_subport_config(struct rte_sched_port *port,
739 struct rte_sched_subport_params *params)
741 struct rte_sched_subport *s;
744 /* Check user parameters */
745 if ((port == NULL) ||
746 (subport_id >= port->n_subports_per_port) ||
751 if ((params->tb_rate == 0) || (params->tb_rate > port->rate)) {
755 if (params->tb_size == 0) {
759 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
760 if ((params->tc_rate[i] == 0) || (params->tc_rate[i] > params->tb_rate)) {
765 if (params->tc_period == 0) {
769 #ifdef RTE_SCHED_SUBPORT_TC_OV
770 if ((params->tc_ov_period == 0) || (params->tc_ov_period > params->tc_period)) {
775 s = port->subport + subport_id;
777 /* Token Bucket (TB) */
778 if (params->tb_rate == port->rate) {
779 s->tb_credits_per_period = 1;
782 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
783 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
785 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
787 s->tb_size = params->tb_size;
788 s->tb_time = port->time;
789 s->tb_credits = s->tb_size / 2;
791 /* Traffic Classes (TCs) */
792 s->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
793 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
794 s->tc_credits_per_period[i] = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, params->tc_rate[i]);
796 s->tc_time = port->time + s->tc_period;
797 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
798 s->tc_credits[i] = s->tc_credits_per_period[i];
801 #ifdef RTE_SCHED_SUBPORT_TC_OV
802 /* TC oversubscription */
803 s->tc_ov_period = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_ov_period, port->rate);
804 s->tc_ov_time = port->time + s->tc_ov_period;
805 s->tc_ov_period_id = 0;
806 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
809 s->tc_ov_rate[i] = 0;
810 s->tc_ov_credits[i] = 0;
814 rte_sched_port_log_subport_config(port, subport_id);
820 rte_sched_pipe_config(struct rte_sched_port *port,
823 int32_t pipe_profile)
825 struct rte_sched_subport *s;
826 struct rte_sched_pipe *p;
827 struct rte_sched_pipe_profile *params;
828 uint32_t deactivate, profile, i;
830 /* Check user parameters */
831 profile = (uint32_t) pipe_profile;
832 deactivate = (pipe_profile < 0);
833 if ((port == NULL) ||
834 (subport_id >= port->n_subports_per_port) ||
835 (pipe_id >= port->n_pipes_per_subport) ||
836 ((!deactivate) && (profile >= port->n_pipe_profiles))) {
840 /* Check that subport configuration is valid */
841 s = port->subport + subport_id;
842 if (s->tb_period == 0) {
846 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
848 /* Handle the case when pipe already has a valid configuration */
850 params = port->pipe_profiles + p->profile;
852 #ifdef RTE_SCHED_SUBPORT_TC_OV
853 /* Unplug pipe from its subport */
854 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
855 s->tc_ov_n[i] -= params->tc_ov_weight[i];
856 s->tc_ov_rate[i] -= ((double) params->tc_credits_per_period[i]) / ((double) params->tc_period);
857 s->tc_ov[i] = s->tc_ov_rate[i] > (((double) s->tc_credits_per_period[i]) / ((double) s->tc_period));
862 memset(p, 0, sizeof(struct rte_sched_pipe));
869 /* Apply the new pipe configuration */
870 p->profile = profile;
871 params = port->pipe_profiles + p->profile;
873 /* Token Bucket (TB) */
874 p->tb_time = port->time;
875 p->tb_credits = params->tb_size / 2;
877 /* Traffic Classes (TCs) */
878 p->tc_time = port->time + params->tc_period;
879 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
880 p->tc_credits[i] = params->tc_credits_per_period[i];
883 #ifdef RTE_SCHED_SUBPORT_TC_OV
884 /* Subport TC oversubscription */
885 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
886 s->tc_ov_n[i] += params->tc_ov_weight[i];
887 s->tc_ov_rate[i] += ((double) params->tc_credits_per_period[i]) / ((double) params->tc_period);
888 s->tc_ov[i] = s->tc_ov_rate[i] > (((double) s->tc_credits_per_period[i]) / ((double) s->tc_period));
890 p->tc_ov_period_id = s->tc_ov_period_id;
891 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
892 p->tc_ov_credits[i] = 0;
900 rte_sched_subport_read_stats(struct rte_sched_port *port,
902 struct rte_sched_subport_stats *stats,
905 struct rte_sched_subport *s;
908 /* Check user parameters */
909 if ((port == NULL) ||
910 (subport_id >= port->n_subports_per_port) ||
915 s = port->subport + subport_id;
917 /* Copy subport stats and clear */
918 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
919 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
921 /* Subport TC ovesubscription status */
923 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
924 mask |= ((uint32_t) s->tc_ov[i]) << i;
932 rte_sched_queue_read_stats(struct rte_sched_port *port,
934 struct rte_sched_queue_stats *stats,
937 struct rte_sched_queue *q;
938 struct rte_sched_queue_extra *qe;
940 /* Check user parameters */
941 if ((port == NULL) ||
942 (queue_id >= rte_sched_port_queues_per_port(port)) ||
947 q = port->queue + queue_id;
948 qe = port->queue_extra + queue_id;
950 /* Copy queue stats and clear */
951 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
952 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
955 *qlen = q->qw - q->qr;
960 static inline uint32_t
961 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
965 result = subport * port->n_pipes_per_subport + pipe;
966 result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
967 result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
972 static inline struct rte_mbuf **
973 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
975 uint32_t pindex = qindex >> 4;
976 uint32_t qpos = qindex & 0xF;
978 return (port->queue_array + pindex * port->qsize_sum + port->qsize_add[qpos]);
981 static inline uint16_t
982 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
984 uint32_t tc = (qindex >> 2) & 0x3;
986 return port->qsize[tc];
992 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
994 struct rte_sched_queue *queue = port->queue + qindex;
996 return (queue->qr == queue->qw);
1000 rte_sched_port_queue_is_full(struct rte_sched_port *port, uint32_t qindex)
1002 struct rte_sched_queue *queue = port->queue + qindex;
1003 uint16_t qsize = rte_sched_port_qsize(port, qindex);
1004 uint16_t qlen = q->qw - q->qr;
1006 return (qlen >= qsize);
1009 #endif /* RTE_SCHED_DEBUG */
1011 #ifdef RTE_SCHED_COLLECT_STATS
1014 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1016 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1017 uint32_t tc_index = (qindex >> 2) & 0x3;
1018 uint32_t pkt_len = pkt->pkt.pkt_len;
1020 s->stats.n_pkts_tc[tc_index] += 1;
1021 s->stats.n_bytes_tc[tc_index] += pkt_len;
1025 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1027 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1028 uint32_t tc_index = (qindex >> 2) & 0x3;
1029 uint32_t pkt_len = pkt->pkt.pkt_len;
1031 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1032 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1036 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1038 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1039 uint32_t pkt_len = pkt->pkt.pkt_len;
1041 qe->stats.n_pkts += 1;
1042 qe->stats.n_bytes += pkt_len;
1046 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1048 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1049 uint32_t pkt_len = pkt->pkt.pkt_len;
1051 qe->stats.n_pkts_dropped += 1;
1052 qe->stats.n_bytes_dropped += pkt_len;
1055 #endif /* RTE_SCHED_COLLECT_STATS */
1057 #ifdef RTE_SCHED_RED
1060 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1062 struct rte_sched_queue_extra *qe;
1063 struct rte_red_config *red_cfg;
1064 struct rte_red *red;
1066 enum rte_meter_color color;
1068 tc_index = (qindex >> 2) & 0x3;
1069 color = rte_sched_port_pkt_read_color(pkt);
1070 red_cfg = &port->red_config[tc_index][color];
1072 qe = port->queue_extra + qindex;
1075 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1079 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1081 struct rte_sched_queue_extra *qe;
1082 struct rte_red *red;
1084 qe = port->queue_extra + qindex;
1087 rte_red_mark_queue_empty(red, port->time);
1092 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1094 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1096 #endif /* RTE_SCHED_RED */
1101 debug_pipe_is_empty(struct rte_sched_port *port, uint32_t pindex)
1105 qindex = pindex << 4;
1107 for (i = 0; i < 16; i ++){
1108 uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
1109 uint32_t bmp_bit_clear = (rte_bitmap_get(&port->bmp, qindex + i) == 0);
1111 if (queue_empty != bmp_bit_clear){
1112 rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
1124 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, uint64_t bmp_slab)
1130 rte_panic("Empty slab at position %u\n", bmp_pos);
1134 for (i = 0, mask = 1; i < 64; i ++, mask <<= 1) {
1135 if (mask & bmp_slab){
1136 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1137 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1144 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1149 #endif /* RTE_SCHED_DEBUG */
1151 static inline uint32_t
1152 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port, struct rte_mbuf *pkt)
1154 struct rte_sched_queue *q;
1155 #ifdef RTE_SCHED_COLLECT_STATS
1156 struct rte_sched_queue_extra *qe;
1158 uint32_t subport, pipe, traffic_class, queue, qindex;
1160 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1162 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1163 q = port->queue + qindex;
1165 #ifdef RTE_SCHED_COLLECT_STATS
1166 qe = port->queue_extra + qindex;
1174 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase)
1176 struct rte_sched_queue *q;
1177 struct rte_mbuf **q_qw;
1180 q = port->queue + qindex;
1181 qsize = rte_sched_port_qsize(port, qindex);
1182 q_qw = qbase + (q->qw & (qsize - 1));
1184 rte_prefetch0(q_qw);
1185 rte_bitmap_prefetch0(&port->bmp, qindex);
1189 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1191 struct rte_sched_queue *q;
1195 q = port->queue + qindex;
1196 qsize = rte_sched_port_qsize(port, qindex);
1197 qlen = q->qw - q->qr;
1199 /* Drop the packet (and update drop stats) when queue is full */
1200 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) || (qlen >= qsize))) {
1201 rte_pktmbuf_free(pkt);
1202 #ifdef RTE_SCHED_COLLECT_STATS
1203 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1204 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1209 /* Enqueue packet */
1210 qbase[q->qw & (qsize - 1)] = pkt;
1213 /* Activate queue in the port bitmap */
1214 rte_bitmap_set(&port->bmp, qindex);
1217 #ifdef RTE_SCHED_COLLECT_STATS
1218 rte_sched_port_update_subport_stats(port, qindex, pkt);
1219 rte_sched_port_update_queue_stats(port, qindex, pkt);
1225 #if RTE_SCHED_ENQUEUE == 0
1228 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1234 for (i = 0; i < n_pkts; i ++) {
1235 struct rte_mbuf *pkt;
1236 struct rte_mbuf **q_base;
1237 uint32_t subport, pipe, traffic_class, queue, qindex;
1241 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1243 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1245 q_base = rte_sched_port_qbase(port, qindex);
1247 result += rte_sched_port_enqueue_qwa(port, qindex, q_base, pkt);
1255 /* The enqueue function implements a 4-level pipeline with each stage processing
1256 * two different packets. The purpose of using a pipeline is to hide the latency
1257 * of prefetching the data structures. The naming convention is presented in the
1260 * p00 _______ p10 _______ p20 _______ p30 _______
1261 * ----->| |----->| |----->| |----->| |----->
1262 * | 0 | | 1 | | 2 | | 3 |
1263 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1268 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1270 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21, *pkt30, *pkt31, *pkt_last;
1271 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base, **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1272 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1273 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1278 /* Less then 6 input packets available, which is not enough to feed the pipeline */
1279 if (unlikely(n_pkts < 6)) {
1280 struct rte_mbuf **q_base[5];
1283 /* Prefetch the mbuf structure of each packet */
1284 for (i = 0; i < n_pkts; i ++) {
1285 rte_prefetch0(pkts[i]);
1288 /* Prefetch the queue structure for each queue */
1289 for (i = 0; i < n_pkts; i ++) {
1290 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, pkts[i]);
1293 /* Prefetch the write pointer location of each queue */
1294 for (i = 0; i < n_pkts; i ++) {
1295 q_base[i] = rte_sched_port_qbase(port, q[i]);
1296 rte_sched_port_enqueue_qwa_prefetch0(port, q[i], q_base[i]);
1299 /* Write each packet to its queue */
1300 for (i = 0; i < n_pkts; i ++) {
1301 result += rte_sched_port_enqueue_qwa(port, q[i], q_base[i], pkts[i]);
1307 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1310 rte_prefetch0(pkt20);
1311 rte_prefetch0(pkt21);
1315 rte_prefetch0(pkt10);
1316 rte_prefetch0(pkt11);
1318 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1319 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1323 rte_prefetch0(pkt00);
1324 rte_prefetch0(pkt01);
1326 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1327 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1329 q20_base = rte_sched_port_qbase(port, q20);
1330 q21_base = rte_sched_port_qbase(port, q21);
1331 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1332 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1334 /* Run the pipeline */
1335 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1336 /* Propagate stage inputs */
1347 q30_base = q20_base;
1348 q31_base = q21_base;
1350 /* Stage 0: Get packets in */
1352 pkt01 = pkts[i + 1];
1353 rte_prefetch0(pkt00);
1354 rte_prefetch0(pkt01);
1356 /* Stage 1: Prefetch queue structure storing queue pointers */
1357 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1358 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1360 /* Stage 2: Prefetch queue write location */
1361 q20_base = rte_sched_port_qbase(port, q20);
1362 q21_base = rte_sched_port_qbase(port, q21);
1363 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1364 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1366 /* Stage 3: Write packet to queue and activate queue */
1367 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1368 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1369 result += r30 + r31;
1372 /* Drain the pipeline (exactly 6 packets). Handle the last packet in the case
1373 of an odd number of input packets. */
1374 pkt_last = pkts[n_pkts - 1];
1375 rte_prefetch0(pkt_last);
1377 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1378 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1380 q10_base = rte_sched_port_qbase(port, q10);
1381 q11_base = rte_sched_port_qbase(port, q11);
1382 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1383 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1385 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1386 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1387 result += r20 + r21;
1389 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1391 q00_base = rte_sched_port_qbase(port, q00);
1392 q01_base = rte_sched_port_qbase(port, q01);
1393 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1394 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1396 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1397 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1398 result += r10 + r11;
1400 q_last_base = rte_sched_port_qbase(port, q_last);
1401 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1403 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1404 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1405 result += r00 + r01;
1408 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1415 #endif /* RTE_SCHED_ENQUEUE */
1417 #if RTE_SCHED_TS_CREDITS_UPDATE == 0
1419 #define grinder_credits_update(port, pos)
1421 #elif !defined(RTE_SCHED_SUBPORT_TC_OV)
1424 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1426 struct rte_sched_grinder *grinder = port->grinder + pos;
1427 struct rte_sched_subport *subport = grinder->subport;
1428 struct rte_sched_pipe *pipe = grinder->pipe;
1429 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1433 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1434 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1435 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1436 subport->tb_time += n_periods * subport->tb_period;
1439 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1440 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1441 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1442 pipe->tb_time += n_periods * params->tb_period;
1445 if (unlikely(port->time >= subport->tc_time)) {
1446 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1447 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1448 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1449 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1450 subport->tc_time = port->time + subport->tc_period;
1454 if (unlikely(port->time >= pipe->tc_time)) {
1455 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1456 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1457 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1458 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1459 pipe->tc_time = port->time + params->tc_period;
1466 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1468 struct rte_sched_grinder *grinder = port->grinder + pos;
1469 struct rte_sched_subport *subport = grinder->subport;
1470 struct rte_sched_pipe *pipe = grinder->pipe;
1471 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1475 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1476 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1477 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1478 subport->tb_time += n_periods * subport->tb_period;
1481 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1482 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1483 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1484 pipe->tb_time += n_periods * params->tb_period;
1487 if (unlikely(port->time >= subport->tc_ov_time)) {
1488 uint64_t n_ov_periods;
1490 if (unlikely(port->time >= subport->tc_time)) {
1491 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1492 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1493 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1494 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1496 subport->tc_time = port->time + subport->tc_period;
1499 n_ov_periods = (subport->tc_time - port->time + subport->tc_ov_period - 1) / subport->tc_ov_period;
1501 subport->tc_ov_credits[0] = subport->tc_credits[0] / (n_ov_periods * subport->tc_ov_n[0]);
1502 subport->tc_ov_credits[1] = subport->tc_credits[1] / (n_ov_periods * subport->tc_ov_n[1]);
1503 subport->tc_ov_credits[2] = subport->tc_credits[2] / (n_ov_periods * subport->tc_ov_n[2]);
1504 subport->tc_ov_credits[3] = subport->tc_credits[3] / (n_ov_periods * subport->tc_ov_n[3]);
1506 subport->tc_ov_time = port->time + subport->tc_ov_period;
1507 subport->tc_ov_period_id ++;
1511 if (unlikely(port->time >= pipe->tc_time)) {
1512 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1513 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1514 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1515 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1516 pipe->tc_time = port->time + params->tc_period;
1518 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1519 uint32_t pipe_tc_ov_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1520 uint32_t tc_mask[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1521 uint32_t mask[] = {UINT32_MAX, 0};
1523 tc_mask[0] = mask[subport->tc_ov[0]];
1524 tc_mask[1] = mask[subport->tc_ov[1]];
1525 tc_mask[2] = mask[subport->tc_ov[2]];
1526 tc_mask[3] = mask[subport->tc_ov[3]];
1528 pipe_tc_ov_credits[0] = subport->tc_ov_credits[0] * params->tc_ov_weight[0];
1529 pipe_tc_ov_credits[1] = subport->tc_ov_credits[1] * params->tc_ov_weight[1];
1530 pipe_tc_ov_credits[2] = subport->tc_ov_credits[2] * params->tc_ov_weight[2];
1531 pipe_tc_ov_credits[3] = subport->tc_ov_credits[3] * params->tc_ov_weight[3];
1533 pipe->tc_ov_credits[0] = (tc_mask[0] & pipe->tc_credits[0]) | ((~ tc_mask[0]) & pipe_tc_ov_credits[0]);
1534 pipe->tc_ov_credits[1] = (tc_mask[1] & pipe->tc_credits[1]) | ((~ tc_mask[1]) & pipe_tc_ov_credits[1]);
1535 pipe->tc_ov_credits[2] = (tc_mask[2] & pipe->tc_credits[2]) | ((~ tc_mask[2]) & pipe_tc_ov_credits[2]);
1536 pipe->tc_ov_credits[3] = (tc_mask[3] & pipe->tc_credits[3]) | ((~ tc_mask[3]) & pipe_tc_ov_credits[3]);
1538 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1542 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1544 #ifndef RTE_SCHED_SUBPORT_TC_OV
1547 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1549 struct rte_sched_grinder *grinder = port->grinder + pos;
1550 struct rte_sched_subport *subport = grinder->subport;
1551 struct rte_sched_pipe *pipe = grinder->pipe;
1552 struct rte_mbuf *pkt = grinder->pkt;
1553 uint32_t tc_index = grinder->tc_index;
1554 uint32_t pkt_len = pkt->pkt.pkt_len + port->frame_overhead;
1557 /* Check queue credits */
1558 enough_credits = (pkt_len <= subport->tb_credits) &&
1559 (pkt_len <= subport->tc_credits[tc_index]) &&
1560 (pkt_len <= pipe->tb_credits) &&
1561 (pkt_len <= pipe->tc_credits[tc_index]);
1563 if (!enough_credits) {
1567 /* Update port credits */
1568 subport->tb_credits -= pkt_len;
1569 subport->tc_credits[tc_index] -= pkt_len;
1570 pipe->tb_credits -= pkt_len;
1571 pipe->tc_credits[tc_index] -= pkt_len;
1579 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1581 struct rte_sched_grinder *grinder = port->grinder + pos;
1582 struct rte_sched_subport *subport = grinder->subport;
1583 struct rte_sched_pipe *pipe = grinder->pipe;
1584 struct rte_mbuf *pkt = grinder->pkt;
1585 uint32_t tc_index = grinder->tc_index;
1586 uint32_t pkt_len = pkt->pkt.pkt_len + port->frame_overhead;
1587 uint32_t subport_tb_credits = subport->tb_credits;
1588 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1589 uint32_t pipe_tb_credits = pipe->tb_credits;
1590 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1591 uint32_t pipe_tc_ov_credits = pipe->tc_ov_credits[tc_index];
1594 /* Check pipe and subport credits */
1595 enough_credits = (pkt_len <= subport_tb_credits) &&
1596 (pkt_len <= subport_tc_credits) &&
1597 (pkt_len <= pipe_tb_credits) &&
1598 (pkt_len <= pipe_tc_credits) &&
1599 (pkt_len <= pipe_tc_ov_credits);
1601 if (!enough_credits) {
1605 /* Update pipe and subport credits */
1606 subport->tb_credits -= pkt_len;
1607 subport->tc_credits[tc_index] -= pkt_len;
1608 pipe->tb_credits -= pkt_len;
1609 pipe->tc_credits[tc_index] -= pkt_len;
1610 pipe->tc_ov_credits[tc_index] -= pkt_len;
1615 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1618 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1620 struct rte_sched_grinder *grinder = port->grinder + pos;
1621 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1622 struct rte_mbuf *pkt = grinder->pkt;
1623 uint32_t pkt_len = pkt->pkt.pkt_len + port->frame_overhead;
1625 #if RTE_SCHED_TS_CREDITS_CHECK
1626 if (!grinder_credits_check(port, pos)) {
1631 /* Advance port time */
1632 port->time += pkt_len;
1635 port->pkts_out[port->n_pkts_out ++] = pkt;
1637 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1638 if (queue->qr == queue->qw) {
1639 uint32_t qindex = grinder->qindex[grinder->qpos];
1641 rte_bitmap_clear(&port->bmp, qindex);
1642 grinder->qmask &= ~(1 << grinder->qpos);
1643 grinder->wrr_mask[grinder->qpos] = 0;
1644 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1647 /* Reset pipe loop detection */
1648 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1649 grinder->productive = 1;
1654 #if RTE_SCHED_OPTIMIZATIONS
1657 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1659 __m128i index = _mm_set1_epi32 (base_pipe);
1660 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1661 __m128i res = _mm_cmpeq_epi32(pipes, index);
1662 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1663 pipes = _mm_cmpeq_epi32(pipes, index);
1664 res = _mm_or_si128(res, pipes);
1666 if (_mm_testz_si128(res, res))
1675 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1679 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
1680 if (port->grinder_base_bmp_pos[i] == base_pipe) {
1688 #endif /* RTE_SCHED_OPTIMIZATIONS */
1691 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1693 struct rte_sched_grinder *grinder = port->grinder + pos;
1696 grinder->pcache_w = 0;
1697 grinder->pcache_r = 0;
1699 w[0] = (uint16_t) bmp_slab;
1700 w[1] = (uint16_t) (bmp_slab >> 16);
1701 w[2] = (uint16_t) (bmp_slab >> 32);
1702 w[3] = (uint16_t) (bmp_slab >> 48);
1704 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1705 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1706 grinder->pcache_w += (w[0] != 0);
1708 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1709 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1710 grinder->pcache_w += (w[1] != 0);
1712 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1713 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1714 grinder->pcache_w += (w[2] != 0);
1716 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1717 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1718 grinder->pcache_w += (w[3] != 0);
1722 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1724 struct rte_sched_grinder *grinder = port->grinder + pos;
1727 grinder->tccache_w = 0;
1728 grinder->tccache_r = 0;
1730 b[0] = (uint8_t) (qmask & 0xF);
1731 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1732 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1733 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1735 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1736 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1737 grinder->tccache_w += (b[0] != 0);
1739 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1740 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1741 grinder->tccache_w += (b[1] != 0);
1743 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1744 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1745 grinder->tccache_w += (b[2] != 0);
1747 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1748 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1749 grinder->tccache_w += (b[3] != 0);
1753 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1755 struct rte_sched_grinder *grinder = port->grinder + pos;
1756 struct rte_mbuf **qbase;
1760 if (grinder->tccache_r == grinder->tccache_w) {
1764 qindex = grinder->tccache_qindex[grinder->tccache_r];
1765 qbase = rte_sched_port_qbase(port, qindex);
1766 qsize = rte_sched_port_qsize(port, qindex);
1768 grinder->tc_index = (qindex >> 2) & 0x3;
1769 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1770 grinder->qsize = qsize;
1772 grinder->qindex[0] = qindex;
1773 grinder->qindex[1] = qindex + 1;
1774 grinder->qindex[2] = qindex + 2;
1775 grinder->qindex[3] = qindex + 3;
1777 grinder->queue[0] = port->queue + qindex;
1778 grinder->queue[1] = port->queue + qindex + 1;
1779 grinder->queue[2] = port->queue + qindex + 2;
1780 grinder->queue[3] = port->queue + qindex + 3;
1782 grinder->qbase[0] = qbase;
1783 grinder->qbase[1] = qbase + qsize;
1784 grinder->qbase[2] = qbase + 2 * qsize;
1785 grinder->qbase[3] = qbase + 3 * qsize;
1787 grinder->tccache_r ++;
1792 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1794 struct rte_sched_grinder *grinder = port->grinder + pos;
1795 uint32_t pipe_qindex;
1796 uint16_t pipe_qmask;
1798 if (grinder->pcache_r < grinder->pcache_w) {
1799 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1800 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1801 grinder->pcache_r ++;
1803 uint64_t bmp_slab = 0;
1804 uint32_t bmp_pos = 0;
1806 /* Get another non-empty pipe group */
1807 if (unlikely(rte_bitmap_scan(&port->bmp, &bmp_pos, &bmp_slab) <= 0)) {
1812 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1815 /* Return if pipe group already in one of the other grinders */
1816 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1817 if (unlikely(grinder_pipe_exists(port, bmp_pos))) {
1820 port->grinder_base_bmp_pos[pos] = bmp_pos;
1822 /* Install new pipe group into grinder's pipe cache */
1823 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1825 pipe_qmask = grinder->pcache_qmask[0];
1826 pipe_qindex = grinder->pcache_qindex[0];
1827 grinder->pcache_r = 1;
1830 /* Install new pipe in the grinder */
1831 grinder->pindex = pipe_qindex >> 4;
1832 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1833 grinder->pipe = port->pipe + grinder->pindex;
1834 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1835 grinder->productive = 0;
1837 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1838 grinder_next_tc(port, pos);
1840 /* Check for pipe exhaustion */
1841 if (grinder->pindex == port->pipe_loop) {
1842 port->pipe_exhaustion = 1;
1843 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1849 #if RTE_SCHED_WRR == 0
1851 #define grinder_wrr_load(a,b)
1853 #define grinder_wrr_store(a,b)
1856 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1858 struct rte_sched_grinder *grinder = port->grinder + pos;
1859 uint64_t slab = grinder->qmask;
1861 if (rte_bsf64(slab, &grinder->qpos) == 0) {
1862 rte_panic("grinder wrr\n");
1866 #elif RTE_SCHED_WRR == 1
1869 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1871 struct rte_sched_grinder *grinder = port->grinder + pos;
1872 struct rte_sched_pipe *pipe = grinder->pipe;
1873 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1874 uint32_t tc_index = grinder->tc_index;
1875 uint32_t qmask = grinder->qmask;
1878 qindex = tc_index * 4;
1880 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1881 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1882 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1883 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1885 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1886 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1887 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1888 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1890 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1891 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1892 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1893 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1897 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1899 struct rte_sched_grinder *grinder = port->grinder + pos;
1900 struct rte_sched_pipe *pipe = grinder->pipe;
1901 uint32_t tc_index = grinder->tc_index;
1904 qindex = tc_index * 4;
1906 pipe->wrr_tokens[qindex] = (uint8_t) ((grinder->wrr_tokens[0] & grinder->wrr_mask[0]) >> RTE_SCHED_WRR_SHIFT);
1907 pipe->wrr_tokens[qindex + 1] = (uint8_t) ((grinder->wrr_tokens[1] & grinder->wrr_mask[1]) >> RTE_SCHED_WRR_SHIFT);
1908 pipe->wrr_tokens[qindex + 2] = (uint8_t) ((grinder->wrr_tokens[2] & grinder->wrr_mask[2]) >> RTE_SCHED_WRR_SHIFT);
1909 pipe->wrr_tokens[qindex + 3] = (uint8_t) ((grinder->wrr_tokens[3] & grinder->wrr_mask[3]) >> RTE_SCHED_WRR_SHIFT);
1913 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1915 struct rte_sched_grinder *grinder = port->grinder + pos;
1916 uint16_t wrr_tokens_min;
1918 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1919 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1920 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1921 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1923 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1924 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1926 grinder->wrr_tokens[0] -= wrr_tokens_min;
1927 grinder->wrr_tokens[1] -= wrr_tokens_min;
1928 grinder->wrr_tokens[2] -= wrr_tokens_min;
1929 grinder->wrr_tokens[3] -= wrr_tokens_min;
1934 #error Invalid value for RTE_SCHED_WRR
1936 #endif /* RTE_SCHED_WRR */
1938 #define grinder_evict(port, pos)
1941 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1943 struct rte_sched_grinder *grinder = port->grinder + pos;
1945 rte_prefetch0(grinder->pipe);
1946 rte_prefetch0(grinder->queue[0]);
1950 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1952 struct rte_sched_grinder *grinder = port->grinder + pos;
1953 uint16_t qsize, qr[4];
1955 qsize = grinder->qsize;
1956 qr[0] = grinder->queue[0]->qr & (qsize - 1);
1957 qr[1] = grinder->queue[1]->qr & (qsize - 1);
1958 qr[2] = grinder->queue[2]->qr & (qsize - 1);
1959 qr[3] = grinder->queue[3]->qr & (qsize - 1);
1961 rte_prefetch0(grinder->qbase[0] + qr[0]);
1962 rte_prefetch0(grinder->qbase[1] + qr[1]);
1964 grinder_wrr_load(port, pos);
1965 grinder_wrr(port, pos);
1967 rte_prefetch0(grinder->qbase[2] + qr[2]);
1968 rte_prefetch0(grinder->qbase[3] + qr[3]);
1972 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
1974 struct rte_sched_grinder *grinder = port->grinder + pos;
1975 uint32_t qpos = grinder->qpos;
1976 struct rte_mbuf **qbase = grinder->qbase[qpos];
1977 uint16_t qsize = grinder->qsize;
1978 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
1980 grinder->pkt = qbase[qr];
1981 rte_prefetch0(grinder->pkt);
1983 if (unlikely((qr & 0x7) == 7)) {
1984 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
1986 rte_prefetch0(qbase + qr_next);
1990 static inline uint32_t
1991 grinder_handle(struct rte_sched_port *port, uint32_t pos)
1993 struct rte_sched_grinder *grinder = port->grinder + pos;
1995 switch (grinder->state) {
1996 case e_GRINDER_PREFETCH_PIPE:
1998 if (grinder_next_pipe(port, pos)) {
1999 grinder_prefetch_pipe(port, pos);
2000 port->busy_grinders ++;
2002 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2009 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2011 struct rte_sched_pipe *pipe = grinder->pipe;
2013 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2014 grinder_prefetch_tc_queue_arrays(port, pos);
2015 grinder_credits_update(port, pos);
2017 grinder->state = e_GRINDER_PREFETCH_MBUF;
2021 case e_GRINDER_PREFETCH_MBUF:
2023 grinder_prefetch_mbuf(port, pos);
2025 grinder->state = e_GRINDER_READ_MBUF;
2029 case e_GRINDER_READ_MBUF:
2031 uint32_t result = 0;
2033 result = grinder_schedule(port, pos);
2035 /* Look for next packet within the same TC */
2036 if (result && grinder->qmask) {
2037 grinder_wrr(port, pos);
2038 grinder_prefetch_mbuf(port, pos);
2042 grinder_wrr_store(port, pos);
2044 /* Look for another active TC within same pipe */
2045 if (grinder_next_tc(port, pos)) {
2046 grinder_prefetch_tc_queue_arrays(port, pos);
2048 grinder->state = e_GRINDER_PREFETCH_MBUF;
2051 if ((grinder->productive == 0) && (port->pipe_loop == RTE_SCHED_PIPE_INVALID)) {
2052 port->pipe_loop = grinder->pindex;
2054 grinder_evict(port, pos);
2056 /* Look for another active pipe */
2057 if (grinder_next_pipe(port, pos)) {
2058 grinder_prefetch_pipe(port, pos);
2060 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2064 /* No active pipe found */
2065 port->busy_grinders --;
2067 grinder->state = e_GRINDER_PREFETCH_PIPE;
2072 rte_panic("Algorithmic error (invalid state)\n");
2078 rte_sched_port_time_resync(struct rte_sched_port *port)
2080 uint64_t cycles = rte_get_tsc_cycles();
2081 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2082 double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2084 /* Advance port time */
2085 port->time_cpu_cycles = cycles;
2086 port->time_cpu_bytes += (uint64_t) bytes_diff;
2087 if (port->time < port->time_cpu_bytes) {
2088 port->time = port->time_cpu_bytes;
2091 /* Reset pipe loop detection */
2092 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2096 rte_sched_port_exceptions(struct rte_sched_port *port)
2100 /* Check if any exception flag is set */
2101 exceptions = (port->busy_grinders == 0) ||
2102 (port->pipe_exhaustion == 1);
2104 /* Clear exception flags */
2105 port->pipe_exhaustion = 0;
2111 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2115 port->pkts_out = pkts;
2116 port->n_pkts_out = 0;
2118 rte_sched_port_time_resync(port);
2120 /* Take each queue in the grinder one step further */
2121 for (i = 0, count = 0; ; i ++) {
2122 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2123 if ((count == n_pkts) || rte_sched_port_exceptions(port)) {