2 * Copyright Droids Corporation, Microb Technology, Eirbot (2006)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 * Revision : $Id: timer_prescaler.h,v 1.1.2.4 2009-01-30 20:18:36 zer0 Exp $
22 #ifndef _TIMER_PRESCALER_H_
23 #define _TIMER_PRESCALER_H_
25 /* return <0 on error, else return reg value */
26 /* This static inline function is very optimized if div is
28 static inline int16_t __timer0_div_to_reg(uint16_t div)
31 #if defined TIMER0_PRESCALER_REG_0 && TIMER0_PRESCALER_REG_0 >= 0
32 case TIMER0_PRESCALER_REG_0:
36 #if defined TIMER0_PRESCALER_REG_1 && TIMER0_PRESCALER_REG_1 >= 0
37 case TIMER0_PRESCALER_REG_1:
41 #if defined TIMER0_PRESCALER_REG_2 && TIMER0_PRESCALER_REG_2 >= 0
42 case TIMER0_PRESCALER_REG_2:
46 #if defined TIMER0_PRESCALER_REG_3 && TIMER0_PRESCALER_REG_3 >= 0
47 case TIMER0_PRESCALER_REG_3:
51 #if defined TIMER0_PRESCALER_REG_4 && TIMER0_PRESCALER_REG_4 >= 0
52 case TIMER0_PRESCALER_REG_4:
56 #if defined TIMER0_PRESCALER_REG_5 && TIMER0_PRESCALER_REG_5 >= 0
57 case TIMER0_PRESCALER_REG_5:
61 #if defined TIMER0_PRESCALER_REG_6 && TIMER0_PRESCALER_REG_6 >= 0
62 case TIMER0_PRESCALER_REG_6:
66 #if defined TIMER0_PRESCALER_REG_7 && TIMER0_PRESCALER_REG_7 >= 0
67 case TIMER0_PRESCALER_REG_7:
71 #if defined TIMER0_PRESCALER_REG_8 && TIMER0_PRESCALER_REG_8 >= 0
72 case TIMER0_PRESCALER_REG_8:
76 #if defined TIMER0_PRESCALER_REG_9 && TIMER0_PRESCALER_REG_9 >= 0
77 case TIMER0_PRESCALER_REG_9:
81 #if defined TIMER0_PRESCALER_REG_10 && TIMER0_PRESCALER_REG_10 >= 0
82 case TIMER0_PRESCALER_REG_10:
86 #if defined TIMER0_PRESCALER_REG_11 && TIMER0_PRESCALER_REG_11 >= 0
87 case TIMER0_PRESCALER_REG_11:
91 #if defined TIMER0_PRESCALER_REG_12 && TIMER0_PRESCALER_REG_12 >= 0
92 case TIMER0_PRESCALER_REG_12:
96 #if defined TIMER0_PRESCALER_REG_13 && TIMER0_PRESCALER_REG_13 >= 0
97 case TIMER0_PRESCALER_REG_13:
101 #if defined TIMER0_PRESCALER_REG_14 && TIMER0_PRESCALER_REG_14 >= 0
102 case TIMER0_PRESCALER_REG_14:
106 #if defined TIMER0_PRESCALER_REG_15 && TIMER0_PRESCALER_REG_15 >= 0
107 case TIMER0_PRESCALER_REG_15:
115 /* return <0 on error, else return div value */
116 /* This static inline function is very optimized if reg is
118 static inline int16_t __timer0_reg_to_div(uint8_t reg)
121 #if defined TIMER0_PRESCALER_DIV_0
122 case TIMER0_PRESCALER_DIV_0:
126 #if defined TIMER0_PRESCALER_DIV_1
127 case TIMER0_PRESCALER_DIV_1:
131 #if defined TIMER0_PRESCALER_DIV_2
132 case TIMER0_PRESCALER_DIV_2:
136 #if defined TIMER0_PRESCALER_DIV_4
137 case TIMER0_PRESCALER_DIV_4:
141 #if defined TIMER0_PRESCALER_DIV_8
142 case TIMER0_PRESCALER_DIV_8:
146 #if defined TIMER0_PRESCALER_DIV_16
147 case TIMER0_PRESCALER_DIV_16:
151 #if defined TIMER0_PRESCALER_DIV_32
152 case TIMER0_PRESCALER_DIV_32:
156 #if defined TIMER0_PRESCALER_DIV_64
157 case TIMER0_PRESCALER_DIV_64:
161 #if defined TIMER0_PRESCALER_DIV_128
162 case TIMER0_PRESCALER_DIV_128:
166 #if defined TIMER0_PRESCALER_DIV_256
167 case TIMER0_PRESCALER_DIV_256:
171 #if defined TIMER0_PRESCALER_DIV_512
172 case TIMER0_PRESCALER_DIV_512:
176 #if defined TIMER0_PRESCALER_DIV_1024
177 case TIMER0_PRESCALER_DIV_1024:
181 #if defined TIMER0_PRESCALER_DIV_2048
182 case TIMER0_PRESCALER_DIV_2048:
186 #if defined TIMER0_PRESCALER_DIV_4096
187 case TIMER0_PRESCALER_DIV_4096:
191 #if defined TIMER0_PRESCALER_DIV_8192
192 case TIMER0_PRESCALER_DIV_8192:
196 #if defined TIMER0_PRESCALER_DIV_16384
197 case TIMER0_PRESCALER_DIV_16384:
207 /* return <0 on error, else return reg value */
208 /* This static inline function is very optimized if div is
210 static inline int16_t __timer1_div_to_reg(uint16_t div)
213 #if defined TIMER1_PRESCALER_REG_0 && TIMER1_PRESCALER_REG_0 >= 0
214 case TIMER1_PRESCALER_REG_0:
218 #if defined TIMER1_PRESCALER_REG_1 && TIMER1_PRESCALER_REG_1 >= 0
219 case TIMER1_PRESCALER_REG_1:
223 #if defined TIMER1_PRESCALER_REG_2 && TIMER1_PRESCALER_REG_2 >= 0
224 case TIMER1_PRESCALER_REG_2:
228 #if defined TIMER1_PRESCALER_REG_3 && TIMER1_PRESCALER_REG_3 >= 0
229 case TIMER1_PRESCALER_REG_3:
233 #if defined TIMER1_PRESCALER_REG_4 && TIMER1_PRESCALER_REG_4 >= 0
234 case TIMER1_PRESCALER_REG_4:
238 #if defined TIMER1_PRESCALER_REG_5 && TIMER1_PRESCALER_REG_5 >= 0
239 case TIMER1_PRESCALER_REG_5:
243 #if defined TIMER1_PRESCALER_REG_6 && TIMER1_PRESCALER_REG_6 >= 0
244 case TIMER1_PRESCALER_REG_6:
248 #if defined TIMER1_PRESCALER_REG_7 && TIMER1_PRESCALER_REG_7 >= 0
249 case TIMER1_PRESCALER_REG_7:
253 #if defined TIMER1_PRESCALER_REG_8 && TIMER1_PRESCALER_REG_8 >= 0
254 case TIMER1_PRESCALER_REG_8:
258 #if defined TIMER1_PRESCALER_REG_9 && TIMER1_PRESCALER_REG_9 >= 0
259 case TIMER1_PRESCALER_REG_9:
263 #if defined TIMER1_PRESCALER_REG_10 && TIMER1_PRESCALER_REG_10 >= 0
264 case TIMER1_PRESCALER_REG_10:
268 #if defined TIMER1_PRESCALER_REG_11 && TIMER1_PRESCALER_REG_11 >= 0
269 case TIMER1_PRESCALER_REG_11:
273 #if defined TIMER1_PRESCALER_REG_12 && TIMER1_PRESCALER_REG_12 >= 0
274 case TIMER1_PRESCALER_REG_12:
278 #if defined TIMER1_PRESCALER_REG_13 && TIMER1_PRESCALER_REG_13 >= 0
279 case TIMER1_PRESCALER_REG_13:
283 #if defined TIMER1_PRESCALER_REG_14 && TIMER1_PRESCALER_REG_14 >= 0
284 case TIMER1_PRESCALER_REG_14:
288 #if defined TIMER1_PRESCALER_REG_15 && TIMER1_PRESCALER_REG_15 >= 0
289 case TIMER1_PRESCALER_REG_15:
297 /* return <0 on error, else return div value */
298 /* This static inline function is very optimized if reg is
300 static inline int16_t __timer1_reg_to_div(uint8_t reg)
303 #if defined TIMER1_PRESCALER_DIV_0
304 case TIMER1_PRESCALER_DIV_0:
308 #if defined TIMER1_PRESCALER_DIV_1
309 case TIMER1_PRESCALER_DIV_1:
313 #if defined TIMER1_PRESCALER_DIV_2
314 case TIMER1_PRESCALER_DIV_2:
318 #if defined TIMER1_PRESCALER_DIV_4
319 case TIMER1_PRESCALER_DIV_4:
323 #if defined TIMER1_PRESCALER_DIV_8
324 case TIMER1_PRESCALER_DIV_8:
328 #if defined TIMER1_PRESCALER_DIV_16
329 case TIMER1_PRESCALER_DIV_16:
333 #if defined TIMER1_PRESCALER_DIV_32
334 case TIMER1_PRESCALER_DIV_32:
338 #if defined TIMER1_PRESCALER_DIV_64
339 case TIMER1_PRESCALER_DIV_64:
343 #if defined TIMER1_PRESCALER_DIV_128
344 case TIMER1_PRESCALER_DIV_128:
348 #if defined TIMER1_PRESCALER_DIV_256
349 case TIMER1_PRESCALER_DIV_256:
353 #if defined TIMER1_PRESCALER_DIV_512
354 case TIMER1_PRESCALER_DIV_512:
358 #if defined TIMER1_PRESCALER_DIV_1024
359 case TIMER1_PRESCALER_DIV_1024:
363 #if defined TIMER1_PRESCALER_DIV_2048
364 case TIMER1_PRESCALER_DIV_2048:
368 #if defined TIMER1_PRESCALER_DIV_4096
369 case TIMER1_PRESCALER_DIV_4096:
373 #if defined TIMER1_PRESCALER_DIV_8192
374 case TIMER1_PRESCALER_DIV_8192:
378 #if defined TIMER1_PRESCALER_DIV_16384
379 case TIMER1_PRESCALER_DIV_16384:
390 /* return <0 on error, else return reg value */
391 /* This static inline function is very optimized if div is
393 static inline int16_t __timer2_div_to_reg(uint16_t div)
396 #if defined TIMER2_PRESCALER_REG_0 && TIMER2_PRESCALER_REG_0 >= 0
397 case TIMER2_PRESCALER_REG_0:
401 #if defined TIMER2_PRESCALER_REG_1 && TIMER2_PRESCALER_REG_1 >= 0
402 case TIMER2_PRESCALER_REG_1:
406 #if defined TIMER2_PRESCALER_REG_2 && TIMER2_PRESCALER_REG_2 >= 0
407 case TIMER2_PRESCALER_REG_2:
411 #if defined TIMER2_PRESCALER_REG_3 && TIMER2_PRESCALER_REG_3 >= 0
412 case TIMER2_PRESCALER_REG_3:
416 #if defined TIMER2_PRESCALER_REG_4 && TIMER2_PRESCALER_REG_4 >= 0
417 case TIMER2_PRESCALER_REG_4:
421 #if defined TIMER2_PRESCALER_REG_5 && TIMER2_PRESCALER_REG_5 >= 0
422 case TIMER2_PRESCALER_REG_5:
426 #if defined TIMER2_PRESCALER_REG_6 && TIMER2_PRESCALER_REG_6 >= 0
427 case TIMER2_PRESCALER_REG_6:
431 #if defined TIMER2_PRESCALER_REG_7 && TIMER2_PRESCALER_REG_7 >= 0
432 case TIMER2_PRESCALER_REG_7:
436 #if defined TIMER2_PRESCALER_REG_8 && TIMER2_PRESCALER_REG_8 >= 0
437 case TIMER2_PRESCALER_REG_8:
441 #if defined TIMER2_PRESCALER_REG_9 && TIMER2_PRESCALER_REG_9 >= 0
442 case TIMER2_PRESCALER_REG_9:
446 #if defined TIMER2_PRESCALER_REG_10 && TIMER2_PRESCALER_REG_10 >= 0
447 case TIMER2_PRESCALER_REG_10:
451 #if defined TIMER2_PRESCALER_REG_11 && TIMER2_PRESCALER_REG_11 >= 0
452 case TIMER2_PRESCALER_REG_11:
456 #if defined TIMER2_PRESCALER_REG_12 && TIMER2_PRESCALER_REG_12 >= 0
457 case TIMER2_PRESCALER_REG_12:
461 #if defined TIMER2_PRESCALER_REG_13 && TIMER2_PRESCALER_REG_13 >= 0
462 case TIMER2_PRESCALER_REG_13:
466 #if defined TIMER2_PRESCALER_REG_14 && TIMER2_PRESCALER_REG_14 >= 0
467 case TIMER2_PRESCALER_REG_14:
471 #if defined TIMER2_PRESCALER_REG_15 && TIMER2_PRESCALER_REG_15 >= 0
472 case TIMER2_PRESCALER_REG_15:
480 /* return <0 on error, else return div value */
481 /* This static inline function is very optimized if reg is
483 static inline int16_t __timer2_reg_to_div(uint8_t reg)
486 #if defined TIMER2_PRESCALER_DIV_0
487 case TIMER2_PRESCALER_DIV_0:
491 #if defined TIMER2_PRESCALER_DIV_1
492 case TIMER2_PRESCALER_DIV_1:
496 #if defined TIMER2_PRESCALER_DIV_2
497 case TIMER2_PRESCALER_DIV_2:
501 #if defined TIMER2_PRESCALER_DIV_4
502 case TIMER2_PRESCALER_DIV_4:
506 #if defined TIMER2_PRESCALER_DIV_8
507 case TIMER2_PRESCALER_DIV_8:
511 #if defined TIMER2_PRESCALER_DIV_16
512 case TIMER2_PRESCALER_DIV_16:
516 #if defined TIMER2_PRESCALER_DIV_32
517 case TIMER2_PRESCALER_DIV_32:
521 #if defined TIMER2_PRESCALER_DIV_64
522 case TIMER2_PRESCALER_DIV_64:
526 #if defined TIMER2_PRESCALER_DIV_128
527 case TIMER2_PRESCALER_DIV_128:
531 #if defined TIMER2_PRESCALER_DIV_256
532 case TIMER2_PRESCALER_DIV_256:
536 #if defined TIMER2_PRESCALER_DIV_512
537 case TIMER2_PRESCALER_DIV_512:
541 #if defined TIMER2_PRESCALER_DIV_1024
542 case TIMER2_PRESCALER_DIV_1024:
546 #if defined TIMER2_PRESCALER_DIV_2048
547 case TIMER2_PRESCALER_DIV_2048:
551 #if defined TIMER2_PRESCALER_DIV_4096
552 case TIMER2_PRESCALER_DIV_4096:
556 #if defined TIMER2_PRESCALER_DIV_8192
557 case TIMER2_PRESCALER_DIV_8192:
561 #if defined TIMER2_PRESCALER_DIV_16384
562 case TIMER2_PRESCALER_DIV_16384:
573 /* return <0 on error, else return reg value */
574 /* This static inline function is very optimized if div is
576 static inline int16_t __timer3_div_to_reg(uint16_t div)
579 #if defined TIMER3_PRESCALER_REG_0 && TIMER3_PRESCALER_REG_0 >= 0
580 case TIMER3_PRESCALER_REG_0:
584 #if defined TIMER3_PRESCALER_REG_1 && TIMER3_PRESCALER_REG_1 >= 0
585 case TIMER3_PRESCALER_REG_1:
589 #if defined TIMER3_PRESCALER_REG_2 && TIMER3_PRESCALER_REG_2 >= 0
590 case TIMER3_PRESCALER_REG_2:
594 #if defined TIMER3_PRESCALER_REG_3 && TIMER3_PRESCALER_REG_3 >= 0
595 case TIMER3_PRESCALER_REG_3:
599 #if defined TIMER3_PRESCALER_REG_4 && TIMER3_PRESCALER_REG_4 >= 0
600 case TIMER3_PRESCALER_REG_4:
604 #if defined TIMER3_PRESCALER_REG_5 && TIMER3_PRESCALER_REG_5 >= 0
605 case TIMER3_PRESCALER_REG_5:
609 #if defined TIMER3_PRESCALER_REG_6 && TIMER3_PRESCALER_REG_6 >= 0
610 case TIMER3_PRESCALER_REG_6:
614 #if defined TIMER3_PRESCALER_REG_7 && TIMER3_PRESCALER_REG_7 >= 0
615 case TIMER3_PRESCALER_REG_7:
619 #if defined TIMER3_PRESCALER_REG_8 && TIMER3_PRESCALER_REG_8 >= 0
620 case TIMER3_PRESCALER_REG_8:
624 #if defined TIMER3_PRESCALER_REG_9 && TIMER3_PRESCALER_REG_9 >= 0
625 case TIMER3_PRESCALER_REG_9:
629 #if defined TIMER3_PRESCALER_REG_10 && TIMER3_PRESCALER_REG_10 >= 0
630 case TIMER3_PRESCALER_REG_10:
634 #if defined TIMER3_PRESCALER_REG_11 && TIMER3_PRESCALER_REG_11 >= 0
635 case TIMER3_PRESCALER_REG_11:
639 #if defined TIMER3_PRESCALER_REG_12 && TIMER3_PRESCALER_REG_12 >= 0
640 case TIMER3_PRESCALER_REG_12:
644 #if defined TIMER3_PRESCALER_REG_13 && TIMER3_PRESCALER_REG_13 >= 0
645 case TIMER3_PRESCALER_REG_13:
648 #if defined TIMER3_PRESCALER_REG_14 && TIMER3_PRESCALER_REG_14 >= 0
649 case TIMER3_PRESCALER_REG_14:
653 #if defined TIMER3_PRESCALER_REG_15 && TIMER3_PRESCALER_REG_15 >= 0
654 case TIMER3_PRESCALER_REG_15:
662 /* return <0 on error, else return div value */
663 /* This static inline function is very optimized if reg is
665 static inline int16_t __timer3_reg_to_div(uint8_t reg)
668 #if defined TIMER3_PRESCALER_DIV_0
669 case TIMER3_PRESCALER_DIV_0:
673 #if defined TIMER3_PRESCALER_DIV_1
674 case TIMER3_PRESCALER_DIV_1:
678 #if defined TIMER3_PRESCALER_DIV_2
679 case TIMER3_PRESCALER_DIV_2:
683 #if defined TIMER3_PRESCALER_DIV_4
684 case TIMER3_PRESCALER_DIV_4:
688 #if defined TIMER3_PRESCALER_DIV_8
689 case TIMER3_PRESCALER_DIV_8:
693 #if defined TIMER3_PRESCALER_DIV_16
694 case TIMER3_PRESCALER_DIV_16:
698 #if defined TIMER3_PRESCALER_DIV_32
699 case TIMER3_PRESCALER_DIV_32:
703 #if defined TIMER3_PRESCALER_DIV_64
704 case TIMER3_PRESCALER_DIV_64:
708 #if defined TIMER3_PRESCALER_DIV_128
709 case TIMER3_PRESCALER_DIV_128:
713 #if defined TIMER3_PRESCALER_DIV_256
714 case TIMER3_PRESCALER_DIV_256:
718 #if defined TIMER3_PRESCALER_DIV_512
719 case TIMER3_PRESCALER_DIV_512:
723 #if defined TIMER3_PRESCALER_DIV_1024
724 case TIMER3_PRESCALER_DIV_1024:
728 #if defined TIMER3_PRESCALER_DIV_2048
729 case TIMER3_PRESCALER_DIV_2048:
733 #if defined TIMER3_PRESCALER_DIV_4096
734 case TIMER3_PRESCALER_DIV_4096:
738 #if defined TIMER3_PRESCALER_DIV_8192
739 case TIMER3_PRESCALER_DIV_8192:
743 #if defined TIMER3_PRESCALER_DIV_16384
744 case TIMER3_PRESCALER_DIV_16384:
753 /* return <0 on error, else return reg value */
754 /* This static inline function is very optimized if div is
756 static inline int16_t __timer4_div_to_reg(uint16_t div)
759 #if defined TIMER4_PRESCALER_REG_0 && TIMER4_PRESCALER_REG_0 >= 0
760 case TIMER4_PRESCALER_REG_0:
764 #if defined TIMER4_PRESCALER_REG_1 && TIMER4_PRESCALER_REG_1 >= 0
765 case TIMER4_PRESCALER_REG_1:
769 #if defined TIMER4_PRESCALER_REG_2 && TIMER4_PRESCALER_REG_2 >= 0
770 case TIMER4_PRESCALER_REG_2:
774 #if defined TIMER4_PRESCALER_REG_3 && TIMER4_PRESCALER_REG_3 >= 0
775 case TIMER4_PRESCALER_REG_3:
779 #if defined TIMER4_PRESCALER_REG_4 && TIMER4_PRESCALER_REG_4 >= 0
780 case TIMER4_PRESCALER_REG_4:
784 #if defined TIMER4_PRESCALER_REG_5 && TIMER4_PRESCALER_REG_5 >= 0
785 case TIMER4_PRESCALER_REG_5:
789 #if defined TIMER4_PRESCALER_REG_6 && TIMER4_PRESCALER_REG_6 >= 0
790 case TIMER4_PRESCALER_REG_6:
794 #if defined TIMER4_PRESCALER_REG_7 && TIMER4_PRESCALER_REG_7 >= 0
795 case TIMER4_PRESCALER_REG_7:
799 #if defined TIMER4_PRESCALER_REG_8 && TIMER4_PRESCALER_REG_8 >= 0
800 case TIMER4_PRESCALER_REG_8:
804 #if defined TIMER4_PRESCALER_REG_9 && TIMER4_PRESCALER_REG_9 >= 0
805 case TIMER4_PRESCALER_REG_9:
809 #if defined TIMER4_PRESCALER_REG_10 && TIMER4_PRESCALER_REG_10 >= 0
810 case TIMER4_PRESCALER_REG_10:
814 #if defined TIMER4_PRESCALER_REG_11 && TIMER4_PRESCALER_REG_11 >= 0
815 case TIMER4_PRESCALER_REG_11:
819 #if defined TIMER4_PRESCALER_REG_12 && TIMER4_PRESCALER_REG_12 >= 0
820 case TIMER4_PRESCALER_REG_12:
824 #if defined TIMER4_PRESCALER_REG_13 && TIMER4_PRESCALER_REG_13 >= 0
825 case TIMER4_PRESCALER_REG_13:
828 #if defined TIMER4_PRESCALER_REG_14 && TIMER4_PRESCALER_REG_14 >= 0
829 case TIMER4_PRESCALER_REG_14:
833 #if defined TIMER4_PRESCALER_REG_15 && TIMER4_PRESCALER_REG_15 >= 0
834 case TIMER4_PRESCALER_REG_15:
842 /* return <0 on error, else return div value */
843 /* This static inline function is very optimized if reg is
845 static inline int16_t __timer4_reg_to_div(uint8_t reg)
848 #if defined TIMER4_PRESCALER_DIV_0
849 case TIMER4_PRESCALER_DIV_0:
853 #if defined TIMER4_PRESCALER_DIV_1
854 case TIMER4_PRESCALER_DIV_1:
858 #if defined TIMER4_PRESCALER_DIV_2
859 case TIMER4_PRESCALER_DIV_2:
863 #if defined TIMER4_PRESCALER_DIV_4
864 case TIMER4_PRESCALER_DIV_4:
868 #if defined TIMER4_PRESCALER_DIV_8
869 case TIMER4_PRESCALER_DIV_8:
873 #if defined TIMER4_PRESCALER_DIV_16
874 case TIMER4_PRESCALER_DIV_16:
878 #if defined TIMER4_PRESCALER_DIV_32
879 case TIMER4_PRESCALER_DIV_32:
883 #if defined TIMER4_PRESCALER_DIV_64
884 case TIMER4_PRESCALER_DIV_64:
888 #if defined TIMER4_PRESCALER_DIV_128
889 case TIMER4_PRESCALER_DIV_128:
893 #if defined TIMER4_PRESCALER_DIV_256
894 case TIMER4_PRESCALER_DIV_256:
898 #if defined TIMER4_PRESCALER_DIV_512
899 case TIMER4_PRESCALER_DIV_512:
903 #if defined TIMER4_PRESCALER_DIV_1024
904 case TIMER4_PRESCALER_DIV_1024:
908 #if defined TIMER4_PRESCALER_DIV_2048
909 case TIMER4_PRESCALER_DIV_2048:
913 #if defined TIMER4_PRESCALER_DIV_4096
914 case TIMER4_PRESCALER_DIV_4096:
918 #if defined TIMER4_PRESCALER_DIV_8192
919 case TIMER4_PRESCALER_DIV_8192:
923 #if defined TIMER4_PRESCALER_DIV_16384
924 case TIMER4_PRESCALER_DIV_16384:
933 /* return <0 on error, else return reg value */
934 /* This static inline function is very optimized if div is
936 static inline int16_t __timer5_div_to_reg(uint16_t div)
939 #if defined TIMER5_PRESCALER_REG_0 && TIMER5_PRESCALER_REG_0 >= 0
940 case TIMER5_PRESCALER_REG_0:
944 #if defined TIMER5_PRESCALER_REG_1 && TIMER5_PRESCALER_REG_1 >= 0
945 case TIMER5_PRESCALER_REG_1:
949 #if defined TIMER5_PRESCALER_REG_2 && TIMER5_PRESCALER_REG_2 >= 0
950 case TIMER5_PRESCALER_REG_2:
954 #if defined TIMER5_PRESCALER_REG_3 && TIMER5_PRESCALER_REG_3 >= 0
955 case TIMER5_PRESCALER_REG_3:
959 #if defined TIMER5_PRESCALER_REG_4 && TIMER5_PRESCALER_REG_4 >= 0
960 case TIMER5_PRESCALER_REG_4:
964 #if defined TIMER5_PRESCALER_REG_5 && TIMER5_PRESCALER_REG_5 >= 0
965 case TIMER5_PRESCALER_REG_5:
969 #if defined TIMER5_PRESCALER_REG_6 && TIMER5_PRESCALER_REG_6 >= 0
970 case TIMER5_PRESCALER_REG_6:
974 #if defined TIMER5_PRESCALER_REG_7 && TIMER5_PRESCALER_REG_7 >= 0
975 case TIMER5_PRESCALER_REG_7:
979 #if defined TIMER5_PRESCALER_REG_8 && TIMER5_PRESCALER_REG_8 >= 0
980 case TIMER5_PRESCALER_REG_8:
984 #if defined TIMER5_PRESCALER_REG_9 && TIMER5_PRESCALER_REG_9 >= 0
985 case TIMER5_PRESCALER_REG_9:
989 #if defined TIMER5_PRESCALER_REG_10 && TIMER5_PRESCALER_REG_10 >= 0
990 case TIMER5_PRESCALER_REG_10:
994 #if defined TIMER5_PRESCALER_REG_11 && TIMER5_PRESCALER_REG_11 >= 0
995 case TIMER5_PRESCALER_REG_11:
999 #if defined TIMER5_PRESCALER_REG_12 && TIMER5_PRESCALER_REG_12 >= 0
1000 case TIMER5_PRESCALER_REG_12:
1004 #if defined TIMER5_PRESCALER_REG_13 && TIMER5_PRESCALER_REG_13 >= 0
1005 case TIMER5_PRESCALER_REG_13:
1008 #if defined TIMER5_PRESCALER_REG_14 && TIMER5_PRESCALER_REG_14 >= 0
1009 case TIMER5_PRESCALER_REG_14:
1013 #if defined TIMER5_PRESCALER_REG_15 && TIMER5_PRESCALER_REG_15 >= 0
1014 case TIMER5_PRESCALER_REG_15:
1022 /* return <0 on error, else return div value */
1023 /* This static inline function is very optimized if reg is
1025 static inline int16_t __timer5_reg_to_div(uint8_t reg)
1028 #if defined TIMER5_PRESCALER_DIV_0
1029 case TIMER5_PRESCALER_DIV_0:
1033 #if defined TIMER5_PRESCALER_DIV_1
1034 case TIMER5_PRESCALER_DIV_1:
1038 #if defined TIMER5_PRESCALER_DIV_2
1039 case TIMER5_PRESCALER_DIV_2:
1043 #if defined TIMER5_PRESCALER_DIV_4
1044 case TIMER5_PRESCALER_DIV_4:
1048 #if defined TIMER5_PRESCALER_DIV_8
1049 case TIMER5_PRESCALER_DIV_8:
1053 #if defined TIMER5_PRESCALER_DIV_16
1054 case TIMER5_PRESCALER_DIV_16:
1058 #if defined TIMER5_PRESCALER_DIV_32
1059 case TIMER5_PRESCALER_DIV_32:
1063 #if defined TIMER5_PRESCALER_DIV_64
1064 case TIMER5_PRESCALER_DIV_64:
1068 #if defined TIMER5_PRESCALER_DIV_128
1069 case TIMER5_PRESCALER_DIV_128:
1073 #if defined TIMER5_PRESCALER_DIV_256
1074 case TIMER5_PRESCALER_DIV_256:
1078 #if defined TIMER5_PRESCALER_DIV_512
1079 case TIMER5_PRESCALER_DIV_512:
1083 #if defined TIMER5_PRESCALER_DIV_1024
1084 case TIMER5_PRESCALER_DIV_1024:
1088 #if defined TIMER5_PRESCALER_DIV_2048
1089 case TIMER5_PRESCALER_DIV_2048:
1093 #if defined TIMER5_PRESCALER_DIV_4096
1094 case TIMER5_PRESCALER_DIV_4096:
1098 #if defined TIMER5_PRESCALER_DIV_8192
1099 case TIMER5_PRESCALER_DIV_8192:
1103 #if defined TIMER5_PRESCALER_DIV_16384
1104 case TIMER5_PRESCALER_DIV_16384: