/*-
* BSD LICENSE
- *
- * Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
+ *
+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
* All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
* are met:
- *
- * * Redistributions of source code must retain the above copyright
+ *
+ * * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
* distribution.
- * * Neither the name of Intel Corporation nor the names of its
- * contributors may be used to endorse or promote products derived
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
*/
#ifndef _TESTPMD_H_
int main(int argc, char **argv);
#endif
+#define RTE_PORT_ALL (~(portid_t)0x0)
+
+#define RTE_TEST_RX_DESC_MAX 2048
+#define RTE_TEST_TX_DESC_MAX 2048
+
+#define RTE_PORT_STOPPED (uint16_t)0
+#define RTE_PORT_STARTED (uint16_t)1
+#define RTE_PORT_CLOSED (uint16_t)2
+#define RTE_PORT_HANDLING (uint16_t)3
+
/*
* Default size of the mbuf data buffer to receive standard 1518-byte
* Ethernet frames in a mono-segment memory buffer.
#define RTE_MAX_SEGS_PER_PKT 255 /**< pkt.nb_segs is a 8-bit unsigned char. */
#define MAX_PKT_BURST 512
-#define DEF_PKT_BURST 16
+#define DEF_PKT_BURST 32
#define CACHE_LINE_SIZE_ROUNDUP(size) \
(CACHE_LINE_SIZE * ((size + CACHE_LINE_SIZE - 1) / CACHE_LINE_SIZE))
+#define NUMA_NO_CONFIG 0xFF
+#define UMA_NO_CONFIG 0xFF
+
typedef uint8_t lcoreid_t;
typedef uint8_t portid_t;
typedef uint16_t queueid_t;
enum {
PORT_TOPOLOGY_PAIRED,
- PORT_TOPOLOGY_CHAINED
+ PORT_TOPOLOGY_CHAINED,
+ PORT_TOPOLOGY_LOOP,
};
#ifdef RTE_TEST_PMD_RECORD_BURST_STATS
/**
* The data structure associated with each port.
* tx_ol_flags is slightly different from ol_flags of rte_mbuf.
- * Bit 0: Insert IP checksum
+ * Bit 0: Insert IP checksum
* Bit 1: Insert UDP checksum
* Bit 2: Insert TCP checksum
* Bit 3: Insert SCTP checksum
uint64_t rx_bad_l4_csum; /**< rx pkts with bad l4 checksum */
uint8_t tx_queue_stats_mapping_enabled;
uint8_t rx_queue_stats_mapping_enabled;
+ volatile uint16_t port_status; /**< port started or not */
+ uint8_t need_reconfig; /**< need reconfiguring port or not */
+ uint8_t need_reconfig_queues; /**< need reconfiguring queues or not */
+ uint8_t rss_flag; /**< enable rss or not */
+ uint8_t dcb_flag; /**< enable dcb */
+ struct rte_eth_rxconf rx_conf; /**< rx configuration */
+ struct rte_eth_txconf tx_conf; /**< tx configuration */
};
/**
extern struct fwd_engine io_fwd_engine;
extern struct fwd_engine mac_fwd_engine;
+extern struct fwd_engine mac_retry_fwd_engine;
+extern struct fwd_engine mac_swap_engine;
+extern struct fwd_engine flow_gen_engine;
extern struct fwd_engine rx_only_engine;
extern struct fwd_engine tx_only_engine;
extern struct fwd_engine csum_fwd_engine;
+extern struct fwd_engine icmp_echo_engine;
#ifdef RTE_LIBRTE_IEEE1588
extern struct fwd_engine ieee1588_fwd_engine;
#endif
portid_t nb_fwd_ports; /**< Nb. of ports involved. */
};
+/**
+ * DCB mode enable
+ */
+enum dcb_mode_enable
+{
+ DCB_VT_ENABLED,
+ DCB_ENABLED
+};
+
+/*
+ * DCB general config info
+ */
+struct dcb_config {
+ enum dcb_mode_enable dcb_mode;
+ uint8_t vt_en;
+ enum rte_eth_nb_tcs num_tcs;
+ uint8_t pfc_en;
+};
+
+/*
+ * In DCB io FWD mode, 128 RX queue to 128 TX queue mapping
+ */
+enum dcb_queue_mapping_mode {
+ DCB_VT_Q_MAPPING = 0,
+ DCB_4_TCS_Q_MAPPING,
+ DCB_8_TCS_Q_MAPPING
+};
+
#define MAX_TX_QUEUE_STATS_MAPPINGS 1024 /* MAX_PORT of 32 @ 32 tx_queues/port */
#define MAX_RX_QUEUE_STATS_MAPPINGS 4096 /* MAX_PORT of 32 @ 128 rx_queues/port */
/* globals used for configuration */
extern uint16_t verbose_level; /**< Drives messages being displayed, if any. */
extern uint8_t interactive;
+extern uint8_t auto_start;
extern uint8_t numa_support; /**< set by "--numa" parameter */
extern uint16_t port_topology; /**< set by "--port-topology" parameter */
+extern uint8_t no_flush_rx; /**<set by "--no-flush-rx" parameter */
+extern uint8_t mp_anon; /**< set by "--mp-anon" parameter */
+extern uint8_t no_link_check; /**<set by "--disable-link-check" parameter */
+
+#ifdef RTE_NIC_BYPASS
+extern uint32_t bypass_timeout; /**< Store the NIC bypass watchdog timeout */
+#endif
+
+#define MAX_SOCKET 2 /*MAX SOCKET:currently, it is 2 */
+
+/*
+ * Store specified sockets on which memory pool to be used by ports
+ * is allocated.
+ */
+uint8_t port_numa[RTE_MAX_ETHPORTS];
+
+/*
+ * Store specified sockets on which RX ring to be used by ports
+ * is allocated.
+ */
+uint8_t rxring_numa[RTE_MAX_ETHPORTS];
+
+/*
+ * Store specified sockets on which TX ring to be used by ports
+ * is allocated.
+ */
+uint8_t txring_numa[RTE_MAX_ETHPORTS];
+
+extern uint8_t socket_num;
/*
* Configuration of logical cores:
extern struct rte_port *ports;
extern struct rte_eth_rxmode rx_mode;
-extern uint16_t rss_hf;
+extern uint64_t rss_hf;
extern queueid_t nb_rxq;
extern queueid_t nb_txq;
extern uint16_t nb_txd;
extern uint16_t rx_free_thresh;
+extern uint8_t rx_drop_en;
extern uint16_t tx_free_thresh;
extern uint16_t tx_rs_thresh;
+extern uint32_t txq_flags;
+
+extern uint8_t dcb_config;
+extern uint8_t dcb_test;
+extern enum dcb_queue_mapping_mode dcb_q_mapping;
extern uint16_t mbuf_data_size; /**< Mbuf data space size. */
extern uint32_t param_total_num_mbufs;
extern portid_t nb_peer_eth_addrs; /**< Number of peer ethernet addresses. */
extern struct ether_addr peer_eth_addrs[RTE_MAX_ETHPORTS];
+extern uint32_t burst_tx_delay_time; /**< Burst tx delay time(us) for mac-retry. */
+extern uint32_t burst_tx_retry_num; /**< Burst tx retry number for mac-retry. */
+
static inline unsigned int
lcore_num(void)
{
void *reg_addr;
uint32_t reg_v;
- reg_addr = (void *)((char *)port->dev_info.pci_dev->mem_resource.addr +
- reg_off);
+ reg_addr = (void *)
+ ((char *)port->dev_info.pci_dev->mem_resource[0].addr +
+ reg_off);
reg_v = *((volatile uint32_t *)reg_addr);
return rte_le_to_cpu_32(reg_v);
}
{
void *reg_addr;
- reg_addr = (void *)((char *)port->dev_info.pci_dev->mem_resource.addr +
- reg_off);
+ reg_addr = (void *)
+ ((char *)port->dev_info.pci_dev->mem_resource[0].addr +
+ reg_off);
*((volatile uint32_t *)reg_addr) = rte_cpu_to_le_32(reg_v);
}
void rxtx_config_display(void);
void fwd_config_setup(void);
void set_def_fwd_config(void);
+int init_fwd_streams(void);
+void port_mtu_set(portid_t port_id, uint16_t mtu);
void port_reg_bit_display(portid_t port_id, uint32_t reg_off, uint8_t bit_pos);
void port_reg_bit_set(portid_t port_id, uint32_t reg_off, uint8_t bit_pos,
uint8_t bit_v);
void rx_ring_desc_display(portid_t port_id, queueid_t rxq_id, uint16_t rxd_id);
void tx_ring_desc_display(portid_t port_id, queueid_t txq_id, uint16_t txd_id);
-void set_fwd_lcores_list(unsigned int *lcorelist, unsigned int nb_lc);
-void set_fwd_lcores_mask(uint64_t lcoremask);
+int set_fwd_lcores_list(unsigned int *lcorelist, unsigned int nb_lc);
+int set_fwd_lcores_mask(uint64_t lcoremask);
void set_fwd_lcores_number(uint16_t nb_lc);
void set_fwd_ports_list(unsigned int *portlist, unsigned int nb_pt);
void vlan_tpid_set(portid_t port_id, uint16_t tp_id);
void tx_vlan_set(portid_t port_id, uint16_t vlan_id);
void tx_vlan_reset(portid_t port_id);
-
+void tx_vlan_pvid_set(portid_t port_id, uint16_t vlan_id, int on);
void set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint8_t map_value);
void set_verbose_level(uint16_t vb_level);
void set_tx_pkt_segments(unsigned *seg_lengths, unsigned nb_segs);
void set_nb_pkt_per_burst(uint16_t pkt_burst);
+char *list_pkt_forwarding_modes(void);
void set_pkt_forwarding_mode(const char *fwd_mode);
void start_packet_forwarding(int with_tx_first);
void stop_packet_forwarding(void);
+void dev_set_link_up(portid_t pid);
+void dev_set_link_down(portid_t pid);
+void init_port_config(void);
+int init_port_dcb_config(portid_t pid,struct dcb_config *dcb_conf);
+int start_port(portid_t pid);
+void stop_port(portid_t pid);
+void close_port(portid_t pid);
+int all_ports_stopped(void);
void pmd_test_exit(void);
void fdir_add_signature_filter(portid_t port_id, uint8_t queue_id,
struct rte_fdir_filter *fdir_filter);
void fdir_set_masks(portid_t port_id, struct rte_fdir_masks *fdir_masks);
+void port_rss_reta_info(portid_t port_id, struct rte_eth_rss_reta *reta_conf);
+
+void set_vf_traffic(portid_t port_id, uint8_t is_rx, uint16_t vf, uint8_t on);
+void set_vf_rx_vlan(portid_t port_id, uint16_t vlan_id,
+ uint64_t vf_mask, uint8_t on);
+
+int set_queue_rate_limit(portid_t port_id, uint16_t queue_idx, uint16_t rate);
+int set_vf_rate_limit(portid_t port_id, uint16_t vf, uint16_t rate,
+ uint64_t q_msk);
+
+void port_rss_hash_conf_show(portid_t port_id, int show_rss_key);
+void port_rss_hash_key_update(portid_t port_id, uint8_t *hash_key);
+void get_syn_filter(uint8_t port_id);
+void get_ethertype_filter(uint8_t port_id, uint16_t index);
+void get_2tuple_filter(uint8_t port_id, uint16_t index);
+void get_5tuple_filter(uint8_t port_id, uint16_t index);
+void get_flex_filter(uint8_t port_id, uint16_t index);
+
/*
* Work-around of a compilation error with ICC on invocations of the
* rte_be_to_cpu_16() function.