# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2010-2017 Intel Corporation
+#
+# String that appears before the version number
+#
+CONFIG_RTE_VER_PREFIX="DPDK"
+
+#
+# Version information completed when this file is processed for a build
+#
+CONFIG_RTE_VER_YEAR=__YEAR
+CONFIG_RTE_VER_MONTH=__MONTH
+CONFIG_RTE_VER_MINOR=__MINOR
+CONFIG_RTE_VER_SUFFIX=__SUFFIX
+CONFIG_RTE_VER_RELEASE=__RELEASE
+
#
# define executive environment
# RTE_EXEC_ENV values are the directories in mk/exec-env/
#
CONFIG_RTE_CACHE_LINE_SIZE=64
+#
+# Memory model
+#
+CONFIG_RTE_USE_C11_MEM_MODEL=n
+
#
# Compile Environment Abstraction Layer
#
CONFIG_RTE_LIBRTE_EAL=y
CONFIG_RTE_MAX_LCORE=128
CONFIG_RTE_MAX_NUMA_NODES=8
+CONFIG_RTE_MAX_HEAPS=32
CONFIG_RTE_MAX_MEMSEG_LISTS=64
# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages
# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller
CONFIG_RTE_LIBRTE_IEEE1588=n
CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
-CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n
+CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE=n
#
# Turn off Tx preparation stage
#
CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
+#
+# Common libraries, before Bus/PMDs
+#
+CONFIG_RTE_LIBRTE_COMMON_DPAAX=n
+
#
# Compile the Intel FPGA bus
#
CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
+#
+# Compile Aquantia Atlantic PMD driver
+#
+CONFIG_RTE_LIBRTE_ATLANTIC_PMD=y
+
#
# Compile AMD PMD
#
CONFIG_RTE_LIBRTE_DPAA2_PMD=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
+#
+# Compile NXP ENETC PMD Driver
+#
+CONFIG_RTE_LIBRTE_ENETC_PMD=n
+
#
# Compile burst-oriented Amazon ENA PMD driver
#
CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
+#
+# Compile burst-oriented HINIC PMD driver
+#
+CONFIG_RTE_LIBRTE_HINIC_PMD=n
+
#
# Compile burst-oriented IXGBE PMD driver
#
CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y
#
-# Compile burst-oriented AVF PMD driver
+# Compile burst-oriented ICE PMD driver
#
-CONFIG_RTE_LIBRTE_AVF_PMD=y
-CONFIG_RTE_LIBRTE_AVF_INC_VECTOR=y
-CONFIG_RTE_LIBRTE_AVF_DEBUG_TX=n
-CONFIG_RTE_LIBRTE_AVF_DEBUG_TX_FREE=n
-CONFIG_RTE_LIBRTE_AVF_DEBUG_RX=n
-CONFIG_RTE_LIBRTE_AVF_16BYTE_RX_DESC=n
+CONFIG_RTE_LIBRTE_ICE_PMD=y
+CONFIG_RTE_LIBRTE_ICE_DEBUG_RX=n
+CONFIG_RTE_LIBRTE_ICE_DEBUG_TX=n
+CONFIG_RTE_LIBRTE_ICE_DEBUG_TX_FREE=n
+CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC=y
+CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=n
+
+# Compile burst-oriented IAVF PMD driver
+#
+CONFIG_RTE_LIBRTE_IAVF_PMD=y
+CONFIG_RTE_LIBRTE_IAVF_INC_VECTOR=y
+CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX=n
+CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX_FREE=n
+CONFIG_RTE_LIBRTE_IAVF_DEBUG_RX=n
+CONFIG_RTE_LIBRTE_IAVF_DEBUG_DUMP_DESC=n
+CONFIG_RTE_LIBRTE_IAVF_16BYTE_RX_DESC=n
+#
+# Compile burst-oriented IPN3KE PMD driver
+#
+CONFIG_RTE_LIBRTE_IPN3KE_PMD=y
#
# Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
#
CONFIG_RTE_LIBRTE_MLX4_PMD=n
CONFIG_RTE_LIBRTE_MLX4_DEBUG=n
-CONFIG_RTE_LIBRTE_MLX4_DLOPEN_DEPS=n
#
-# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5 & Bluefield
-# (MLX5) PMD
+# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5,
+# ConnectX-6 & Bluefield (MLX5) PMD
#
CONFIG_RTE_LIBRTE_MLX5_PMD=n
CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
-CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS=n
+
+# Linking method for mlx4/5 dependency on ibverbs and related libraries
+# Default linking is dynamic by linker.
+# Other options are: dynamic by dlopen at run-time, or statically embedded.
+CONFIG_RTE_IBVERBS_LINK_DLOPEN=n
+CONFIG_RTE_IBVERBS_LINK_STATIC=n
#
# Compile burst-oriented Netronome NFP PMD driver
#
CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
+#
+# Compile software PMD backed by NFB device
+#
+CONFIG_RTE_LIBRTE_NFB_PMD=n
+
#
# Compile burst-oriented Cavium Thunderx NICVF PMD driver
#
#
CONFIG_RTE_LIBRTE_OCTEONTX_PMD=y
+#
+# Compile burst-oriented Marvell OCTEON TX2 network PMD driver
+#
+CONFIG_RTE_LIBRTE_OCTEONTX2_PMD=y
+
#
# Compile WRS accelerated virtual port (AVP) guest PMD driver
#
#
CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n
+#
+# Compile software PMD backed by AF_XDP sockets (Linux only)
+#
+CONFIG_RTE_LIBRTE_PMD_AF_XDP=n
+
+#
+# Compile Memory Interface PMD driver (Linux only)
+#
+CONFIG_RTE_LIBRTE_PMD_MEMIF=n
+
#
# Compile link bonding PMD library
#
#
CONFIG_RTE_LIBRTE_MVPP2_PMD=n
+#
+# Compile Marvell MVNETA PMD driver
+#
+CONFIG_RTE_LIBRTE_MVNETA_PMD=n
+
#
# Compile support for VMBus library
#
# EXPERIMENTAL: API may change without prior notice
#
CONFIG_RTE_LIBRTE_BBDEV=y
+CONFIG_RTE_LIBRTE_BBDEV_DEBUG=n
CONFIG_RTE_BBDEV_MAX_DEVS=128
-CONFIG_RTE_BBDEV_OFFLOAD_COST=n
+CONFIG_RTE_BBDEV_OFFLOAD_COST=y
+CONFIG_RTE_BBDEV_SDK_AVX2=n
+CONFIG_RTE_BBDEV_SDK_AVX512=n
#
# Compile PMD for NULL bbdev device
#
# Compile PMD for turbo software bbdev device
#
-CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=n
+CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=y
+
+#
+# Compile PMD for Intel FPGA LTE FEC bbdev device
+#
+CONFIG_RTE_LIBRTE_PMD_FPGA_LTE_FEC=y
#
# Compile generic crypto device library
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
+#
+# Compile NXP CAAM JR crypto Driver
+#
+CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n
+CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n
+
#
# Compile NXP DPAA2 crypto sec driver for CAAM HW
#
CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
+#
+# Compile PMD for Cavium OCTEON TX crypto device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y
+
#
# Compile PMD for QuickAssist based devices - see docs for details
#
CONFIG_RTE_LIBRTE_PMD_QAT=y
CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
+CONFIG_RTE_LIBRTE_PMD_QAT_ASYM=n
#
# Max. number of QuickAssist devices, which can be detected and attached
#
CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
+CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
#
# Compile PMD for virtio crypto devices
# Compile PMD for Marvell Crypto device
#
CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n
-CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO_DEBUG=n
#
# Compile generic security library
#
CONFIG_RTE_COMPRESSDEV_TEST=n
+#
+# Compile PMD for Octeontx ZIPVF compression device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=y
+
#
# Compile PMD for ISA-L compression device
#
CONFIG_RTE_LIBRTE_PMD_ISAL=n
+#
+# Compile PMD for ZLIB compression device
+#
+CONFIG_RTE_LIBRTE_PMD_ZLIB=n
+
#
# Compile generic event device library
#
CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32
CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024
CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32
+CONFIG_RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE=32
#
# Compile PMD for skeleton event device
#
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y
+#
+# Compile PMD for distributed software event device
+#
+CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV=y
+
#
# Compile PMD for octeontx sso event device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
+#
+# Compile PMD for octeontx2 sso event device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV=y
+
#
# Compile PMD for OPDL event device
#
# EXPERIMENTAL: API may change without prior notice
#
CONFIG_RTE_LIBRTE_RAWDEV=y
-CONFIG_RTE_RAWDEV_MAX_DEVS=10
+CONFIG_RTE_RAWDEV_MAX_DEVS=64
CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV=y
#
#
CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y
+#
+# Compile PMD for Intel IOAT raw device
+#
+CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV=y
+
+#
+# Compile PMD for octeontx2 DMA raw device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV=y
+
+#
+# Compile PMD for NTB raw device
+#
+CONFIG_RTE_LIBRTE_PMD_NTB_RAWDEV=y
+
#
# Compile librte_ring
#
CONFIG_RTE_LIBRTE_RING=y
-CONFIG_RTE_RING_USE_C11_MEM_MODEL=n
+
+#
+# Compile librte_stack
+#
+CONFIG_RTE_LIBRTE_STACK=y
#
# Compile librte_mempool
#
CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=y
+#
+# Compile PMD for octeontx2 npa mempool device
+#
+CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL=y
+
#
# Compile librte_mbuf
#
#
CONFIG_RTE_LIBRTE_LATENCY_STATS=y
+#
+# Compile librte_telemetry
+#
+CONFIG_RTE_LIBRTE_TELEMETRY=n
+
+#
+# Compile librte_rcu
+#
+CONFIG_RTE_LIBRTE_RCU=y
+CONFIG_RTE_LIBRTE_RCU_DEBUG=n
+
#
# Compile librte_lpm
#
CONFIG_RTE_LIBRTE_KNI=n
CONFIG_RTE_LIBRTE_PMD_KNI=n
CONFIG_RTE_KNI_KMOD=n
-CONFIG_RTE_KNI_KMOD_ETHTOOL=n
CONFIG_RTE_KNI_PREEMPT_DEFAULT=y
#
# allow load BPF from ELF files (requires libelf)
CONFIG_RTE_LIBRTE_BPF_ELF=n
+#
+# Compile librte_ipsec
+#
+CONFIG_RTE_LIBRTE_IPSEC=y
+
#
# Compile the test application
#
#
CONFIG_RTE_TEST_BBDEV=y
+#
+# Compile the compression performance application
+#
+CONFIG_RTE_APP_COMPRESS_PERF=y
+
#
# Compile the crypto performance application
#