return -EINVAL;
}
- ether_addr_copy(mac_addr, &vf->mac_addr);
+ rte_ether_addr_copy(mac_addr, &vf->mac_addr);
/* Remove all existing mac */
TAILQ_FOREACH_SAFE(f, &vsi->mac_list, next, temp)
struct i40e_pf_vf *vf;
struct i40e_vsi *vsi;
struct i40e_pf *pf;
+ int ret;
if (i40e_validate_mac_addr((u8 *)mac_addr) != I40E_SUCCESS)
return -EINVAL;
return -EINVAL;
}
- if (is_same_ether_addr(mac_addr, &vf->mac_addr))
+ if (rte_is_same_ether_addr(mac_addr, &vf->mac_addr))
/* Reset the mac with NULL address */
- ether_addr_copy(&null_mac_addr, &vf->mac_addr);
+ rte_ether_addr_copy(&null_mac_addr, &vf->mac_addr);
/* Remove the mac */
- i40e_vsi_delete_mac(vsi, mac_addr);
-
+ ret = i40e_vsi_delete_mac(vsi, mac_addr);
+ if (ret != I40E_SUCCESS)
+ return ret;
return 0;
}
RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
- if (vlan_id > ETHER_MAX_VLAN_ID) {
+ if (vlan_id > RTE_ETHER_MAX_VLAN_ID) {
PMD_DRV_LOG(ERR, "Invalid VLAN ID.");
return -EINVAL;
}
}
if (on) {
- rte_memcpy(&filter.mac_addr, &broadcast, ETHER_ADDR_LEN);
+ rte_memcpy(&filter.mac_addr, &broadcast, RTE_ETHER_ADDR_LEN);
filter.filter_type = RTE_MACVLAN_PERFECT_MATCH;
ret = i40e_vsi_add_mac(vsi, &filter);
} else {
if (!is_i40e_supported(dev))
return -ENOTSUP;
- if (vlan_id > ETHER_MAX_VLAN_ID || !vlan_id) {
+ if (vlan_id > RTE_ETHER_MAX_VLAN_ID || !vlan_id) {
PMD_DRV_LOG(ERR, "Invalid VLAN ID.");
return -EINVAL;
}
/* Disable DCBx if it's the first time to set strict priority. */
if (!veb->strict_prio_tc) {
- ret = i40e_aq_stop_lldp(hw, true, NULL);
+ ret = i40e_aq_stop_lldp(hw, true, true, NULL);
if (ret)
PMD_DRV_LOG(INFO,
"Failed to disable DCBx as it's already"
/* Enable DCBx again, if all the TCs' strict priority disabled. */
if (!tc_map) {
- ret = i40e_aq_start_lldp(hw, NULL);
+ ret = i40e_aq_start_lldp(hw, true, NULL);
if (ret) {
PMD_DRV_LOG(ERR,
"Failed to enable DCBx, err(%d).", ret);
tnl != RTE_PTYPE_TUNNEL_GRENAT &&
tnl != RTE_PTYPE_TUNNEL_GTPC &&
tnl != RTE_PTYPE_TUNNEL_GTPU &&
- tnl != RTE_PTYPE_TUNNEL_L2TP)
+ tnl != RTE_PTYPE_TUNNEL_L2TP &&
+ tnl != RTE_PTYPE_TUNNEL_ESP)
return -1;
if (il2 &&
}
mac_filter.filter_type = RTE_MACVLAN_PERFECT_MATCH;
- ether_addr_copy(mac_addr, &mac_filter.mac_addr);
+ rte_ether_addr_copy(mac_addr, &mac_filter.mac_addr);
ret = i40e_vsi_add_mac(vsi, &mac_filter);
if (ret != I40E_SUCCESS) {
PMD_DRV_LOG(ERR, "Failed to add MAC filter.");
dev = &rte_eth_devices[port];
- if (!is_i40e_supported(dev))
+ if (!is_i40e_supported(dev) &&
+ !is_i40evf_supported(dev))
return -ENOTSUP;
i40e_set_default_pctype_table(dev);
dev = &rte_eth_devices[port];
- if (!is_i40e_supported(dev))
+ if (!is_i40e_supported(dev) &&
+ !is_i40evf_supported(dev))
return -ENOTSUP;
ad = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
dev = &rte_eth_devices[port];
- if (!is_i40e_supported(dev))
+ if (!is_i40e_supported(dev) &&
+ !is_i40evf_supported(dev))
return -ENOTSUP;
if (count > I40E_FLOW_TYPE_MAX)
vf = &pf->vfs[vf_id];
mac = &vf->mac_addr;
- if (is_same_ether_addr(mac, vf_mac))
+ if (rte_is_same_ether_addr(mac, vf_mac))
return vf_id;
}
I40E_WRITE_FLUSH(hw);
return 0;
}
+
+int
+rte_pmd_i40e_get_fdir_info(uint16_t port, struct rte_eth_fdir_info *fdir_info)
+{
+ struct rte_eth_dev *dev;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+ dev = &rte_eth_devices[port];
+ if (!is_i40e_supported(dev))
+ return -ENOTSUP;
+
+ i40e_fdir_info_get(dev, fdir_info);
+
+ return 0;
+}
+
+int
+rte_pmd_i40e_get_fdir_stats(uint16_t port, struct rte_eth_fdir_stats *fdir_stat)
+{
+ struct rte_eth_dev *dev;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+ dev = &rte_eth_devices[port];
+ if (!is_i40e_supported(dev))
+ return -ENOTSUP;
+
+ i40e_fdir_stats_get(dev, fdir_stat);
+
+ return 0;
+}
+
+int
+rte_pmd_i40e_set_gre_key_len(uint16_t port, uint8_t len)
+{
+ struct rte_eth_dev *dev;
+ struct i40e_pf *pf;
+ struct i40e_hw *hw;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+ dev = &rte_eth_devices[port];
+ if (!is_i40e_supported(dev))
+ return -ENOTSUP;
+
+ pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ hw = I40E_PF_TO_HW(pf);
+
+ return i40e_dev_set_gre_key_len(hw, len);
+}
+
+int
+rte_pmd_i40e_set_switch_dev(uint16_t port_id, struct rte_eth_dev *switch_dev)
+{
+ struct rte_eth_dev *i40e_dev;
+ struct i40e_hw *hw;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+
+ i40e_dev = &rte_eth_devices[port_id];
+ if (!is_i40e_supported(i40e_dev))
+ return -ENOTSUP;
+
+ hw = I40E_DEV_PRIVATE_TO_HW(i40e_dev->data->dev_private);
+ if (!hw)
+ return -1;
+
+ hw->switch_dev = switch_dev;
+
+ return 0;
+}