/*-
* BSD LICENSE
*
- * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
+ * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
#include "pipeline.h"
#define APP_PARAM_NAME_SIZE PIPELINE_NAME_SIZE
+#define APP_LINK_PCI_BDF_SIZE 16
+
+#ifndef APP_LINK_MAX_HWQ_IN
+#define APP_LINK_MAX_HWQ_IN 128
+#endif
+
+#ifndef APP_LINK_MAX_HWQ_OUT
+#define APP_LINK_MAX_HWQ_OUT 128
+#endif
struct app_mempool_params {
char *name;
uint32_t parsed;
uint32_t pmd_id; /* Generated based on port mask */
uint32_t arp_q; /* 0 = Disabled (packets go to default queue 0) */
- uint32_t tcp_syn_local_q; /* 0 = Disabled (pkts go to default queue) */
+ uint32_t tcp_syn_q; /* 0 = Disabled (pkts go to default queue) */
uint32_t ip_local_q; /* 0 = Disabled (pkts go to default queue 0) */
uint32_t tcp_local_q; /* 0 = Disabled (pkts go to default queue 0) */
uint32_t udp_local_q; /* 0 = Disabled (pkts go to default queue 0) */
uint32_t sctp_local_q; /* 0 = Disabled (pkts go to default queue 0) */
+ uint32_t rss_qs[APP_LINK_MAX_HWQ_IN];
+ uint32_t n_rss_qs;
+ uint64_t rss_proto_ipv4;
+ uint64_t rss_proto_ipv6;
+ uint64_t rss_proto_l2;
+ uint32_t promisc;
uint32_t state; /* DOWN = 0, UP = 1 */
uint32_t ip; /* 0 = Invalid */
uint32_t depth; /* Valid only when IP is valid */
uint64_t mac_addr; /* Read from HW */
+ char pci_bdf[APP_LINK_PCI_BDF_SIZE];
struct rte_eth_conf conf;
- uint8_t promisc;
};
struct app_pktq_hwq_in_params {
uint32_t parsed;
uint32_t mempool_id; /* Position in the app->mempool_params array */
uint32_t burst;
+ char *file_name; /* Full path of PCAP file to be copied to mbufs */
+ uint32_t n_bytes_per_pkt;
};
struct app_pktq_sink_params {
char *name;
uint8_t parsed;
+ char *file_name; /* Full path of PCAP file to be copied to mbufs */
+ uint32_t n_pkts_to_dump;
};
struct app_msgq_params {
uint32_t id; /* Position in the appropriate app array */
};
-#ifndef APP_PIPELINE_TYPE_SIZE
-#define APP_PIPELINE_TYPE_SIZE 64
-#endif
+#define APP_PIPELINE_TYPE_SIZE PIPELINE_TYPE_SIZE
#define APP_MAX_PIPELINE_PKTQ_IN PIPELINE_MAX_PORT_IN
#define APP_MAX_PIPELINE_PKTQ_OUT PIPELINE_MAX_PORT_OUT
};
#ifndef APP_MAX_THREAD_PIPELINES
-#define APP_MAX_THREAD_PIPELINES 16
+#define APP_MAX_THREAD_PIPELINES 64
#endif
#ifndef APP_THREAD_TIMER_PERIOD
double headroom_ratio;
};
+#ifndef APP_MAX_LINKS
+#define APP_MAX_LINKS 16
+#endif
+
struct app_eal_params {
/* Map lcore set to physical cpu set */
char *coremap;
uint32_t ranks;
/* Add a PCI device in black list. */
- char *pci_blacklist;
+ char *pci_blacklist[APP_MAX_LINKS];
/* Add a PCI device in white list. */
- char *pci_whitelist;
+ char *pci_whitelist[APP_MAX_LINKS];
/* Add a virtual device. */
- char *vdev;
+ char *vdev[APP_MAX_LINKS];
/* Use VMware TSC map instead of native RDTSC */
uint32_t vmware_tsc_map_present;
/* Support running on Xen dom0 without hugetlbfs */
uint32_t xen_dom0_present;
int xen_dom0;
+
+ uint32_t parsed;
};
#ifndef APP_APPNAME_SIZE
#define APP_MAX_MEMPOOLS 8
#endif
-#ifndef APP_MAX_LINKS
-#define APP_MAX_LINKS 16
-#endif
-
-#ifndef APP_LINK_MAX_HWQ_IN
-#define APP_LINK_MAX_HWQ_IN 64
-#endif
-
-#ifndef APP_LINK_MAX_HWQ_OUT
-#define APP_LINK_MAX_HWQ_OUT 64
-#endif
-
-#define APP_MAX_HWQ_IN (APP_MAX_LINKS * APP_LINK_MAX_HWQ_IN)
+#define APP_MAX_HWQ_IN (APP_MAX_LINKS * APP_LINK_MAX_HWQ_IN)
-#define APP_MAX_HWQ_OUT (APP_MAX_LINKS * APP_LINK_MAX_HWQ_OUT)
+#define APP_MAX_HWQ_OUT (APP_MAX_LINKS * APP_LINK_MAX_HWQ_OUT)
#ifndef APP_MAX_PKTQ_SWQ
#define APP_MAX_PKTQ_SWQ 256
#define APP_MAX_PKTQ_TM APP_MAX_LINKS
#ifndef APP_MAX_PKTQ_SOURCE
-#define APP_MAX_PKTQ_SOURCE 16
+#define APP_MAX_PKTQ_SOURCE 64
#endif
#ifndef APP_MAX_PKTQ_SINK
-#define APP_MAX_PKTQ_SINK 16
+#define APP_MAX_PKTQ_SINK 64
#endif
#ifndef APP_MAX_MSGQ
-#define APP_MAX_MSGQ 64
+#define APP_MAX_MSGQ 256
#endif
#ifndef APP_MAX_PIPELINES
#endif
#ifndef APP_EAL_ARGC
-#define APP_EAL_ARGC 32
+#define APP_EAL_ARGC 64
#endif
#ifndef APP_MAX_PIPELINE_TYPES
sscanf(obj->name, prefix "%" SCNu32, &id); \
while (0) \
-#define APP_PARAM_ADD(obj_array, obj_name) \
-({ \
- ssize_t obj_idx; \
- const ssize_t obj_count = RTE_DIM(obj_array); \
- \
- obj_idx = APP_PARAM_FIND(obj_array, obj_name); \
- if (obj_idx < 0) { \
- for (obj_idx = 0; obj_idx < obj_count; obj_idx++) { \
- if (!APP_PARAM_VALID(&((obj_array)[obj_idx]))) \
- break; \
- } \
- \
- if (obj_idx < obj_count) { \
- (obj_array)[obj_idx].name = strdup(obj_name); \
- if ((obj_array)[obj_idx].name == NULL) \
- obj_idx = -EINVAL; \
- } else \
- obj_idx = -ENOMEM; \
- } \
- obj_idx; \
-})
-
#define APP_CHECK(exp, fmt, ...) \
do { \
if (!(exp)) { \
return n_readers;
}
+static inline struct app_pipeline_params *
+app_swq_get_reader(struct app_params *app,
+ struct app_pktq_swq_params *swq,
+ uint32_t *pktq_in_id)
+{
+ struct app_pipeline_params *reader;
+ uint32_t pos = swq - app->swq_params;
+ uint32_t n_pipelines = RTE_MIN(app->n_pipelines,
+ RTE_DIM(app->pipeline_params));
+ uint32_t n_readers = 0, id, i;
+
+ for (i = 0; i < n_pipelines; i++) {
+ struct app_pipeline_params *p = &app->pipeline_params[i];
+ uint32_t n_pktq_in = RTE_MIN(p->n_pktq_in, RTE_DIM(p->pktq_in));
+ uint32_t j;
+
+ for (j = 0; j < n_pktq_in; j++) {
+ struct app_pktq_in_params *pktq = &p->pktq_in[j];
+
+ if ((pktq->type == APP_PKTQ_IN_SWQ) &&
+ (pktq->id == pos)) {
+ n_readers++;
+ reader = p;
+ id = j;
+ }
+ }
+ }
+
+ if (n_readers != 1)
+ return NULL;
+
+ *pktq_in_id = id;
+ return reader;
+}
+
static inline uint32_t
app_tm_get_readers(struct app_params *app, struct app_pktq_tm_params *tm)
{
return n_readers;
}
+static inline struct app_pipeline_params *
+app_tm_get_reader(struct app_params *app,
+ struct app_pktq_tm_params *tm,
+ uint32_t *pktq_in_id)
+{
+ struct app_pipeline_params *reader;
+ uint32_t pos = tm - app->tm_params;
+ uint32_t n_pipelines = RTE_MIN(app->n_pipelines,
+ RTE_DIM(app->pipeline_params));
+ uint32_t n_readers = 0, id, i;
+
+ for (i = 0; i < n_pipelines; i++) {
+ struct app_pipeline_params *p = &app->pipeline_params[i];
+ uint32_t n_pktq_in = RTE_MIN(p->n_pktq_in, RTE_DIM(p->pktq_in));
+ uint32_t j;
+
+ for (j = 0; j < n_pktq_in; j++) {
+ struct app_pktq_in_params *pktq = &p->pktq_in[j];
+
+ if ((pktq->type == APP_PKTQ_IN_TM) &&
+ (pktq->id == pos)) {
+ n_readers++;
+ reader = p;
+ id = j;
+ }
+ }
+ }
+
+ if (n_readers != 1)
+ return NULL;
+
+ *pktq_in_id = id;
+ return reader;
+}
+
static inline uint32_t
app_source_get_readers(struct app_params *app,
struct app_pktq_source_params *source)
return n_writers;
}
+static inline struct app_pipeline_params *
+app_swq_get_writer(struct app_params *app,
+ struct app_pktq_swq_params *swq,
+ uint32_t *pktq_out_id)
+{
+ struct app_pipeline_params *writer;
+ uint32_t pos = swq - app->swq_params;
+ uint32_t n_pipelines = RTE_MIN(app->n_pipelines,
+ RTE_DIM(app->pipeline_params));
+ uint32_t n_writers = 0, id, i;
+
+ for (i = 0; i < n_pipelines; i++) {
+ struct app_pipeline_params *p = &app->pipeline_params[i];
+ uint32_t n_pktq_out = RTE_MIN(p->n_pktq_out,
+ RTE_DIM(p->pktq_out));
+ uint32_t j;
+
+ for (j = 0; j < n_pktq_out; j++) {
+ struct app_pktq_out_params *pktq = &p->pktq_out[j];
+
+ if ((pktq->type == APP_PKTQ_OUT_SWQ) &&
+ (pktq->id == pos)) {
+ n_writers++;
+ writer = p;
+ id = j;
+ }
+ }
+ }
+
+ if (n_writers != 1)
+ return NULL;
+
+ *pktq_out_id = id;
+ return writer;
+}
+
static inline uint32_t
app_tm_get_writers(struct app_params *app, struct app_pktq_tm_params *tm)
{
return n_writers;
}
+static inline struct app_pipeline_params *
+app_tm_get_writer(struct app_params *app,
+ struct app_pktq_tm_params *tm,
+ uint32_t *pktq_out_id)
+{
+ struct app_pipeline_params *writer;
+ uint32_t pos = tm - app->tm_params;
+ uint32_t n_pipelines = RTE_MIN(app->n_pipelines,
+ RTE_DIM(app->pipeline_params));
+ uint32_t n_writers = 0, id, i;
+
+ for (i = 0; i < n_pipelines; i++) {
+ struct app_pipeline_params *p = &app->pipeline_params[i];
+ uint32_t n_pktq_out = RTE_MIN(p->n_pktq_out,
+ RTE_DIM(p->pktq_out));
+ uint32_t j;
+
+ for (j = 0; j < n_pktq_out; j++) {
+ struct app_pktq_out_params *pktq = &p->pktq_out[j];
+
+ if ((pktq->type == APP_PKTQ_OUT_TM) &&
+ (pktq->id == pos))
+ n_writers++;
+ writer = p;
+ id = j;
+ }
+ }
+
+ if (n_writers != 1)
+ return NULL;
+
+ *pktq_out_id = id;
+ return writer;
+}
+
static inline uint32_t
app_sink_get_writers(struct app_params *app, struct app_pktq_sink_params *sink)
{
return &app->link_params[link_param_idx];
}
+void app_pipeline_params_get(struct app_params *app,
+ struct app_pipeline_params *p_in,
+ struct pipeline_params *p_out);
+
int app_config_init(struct app_params *app);
int app_config_args(struct app_params *app,
int app_init(struct app_params *app);
+int app_post_init(struct app_params *app);
+
int app_thread(void *arg);
int app_pipeline_type_register(struct app_params *app,