X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=inline;f=drivers%2Fnet%2Fcxgbe%2Fcxgbevf_ethdev.c;h=3b32ca9d44f454aecfb4d8e3576984f26dc0ca89;hb=23af667f1507;hp=3b1deac523e9214adc0bbc15d5d54b475f61359f;hpb=5e80364a0389f76e4c8c20cdbe40a4db36b49f58;p=dpdk.git diff --git a/drivers/net/cxgbe/cxgbevf_ethdev.c b/drivers/net/cxgbe/cxgbevf_ethdev.c index 3b1deac523..3b32ca9d44 100644 --- a/drivers/net/cxgbe/cxgbevf_ethdev.c +++ b/drivers/net/cxgbe/cxgbevf_ethdev.c @@ -30,6 +30,50 @@ */ #include "t4_pci_id_tbl.h" +/* + * Get port statistics. + */ +static int cxgbevf_dev_stats_get(struct rte_eth_dev *eth_dev, + struct rte_eth_stats *eth_stats) +{ + struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private); + struct adapter *adapter = pi->adapter; + struct sge *s = &adapter->sge; + struct port_stats ps; + unsigned int i; + + cxgbevf_stats_get(pi, &ps); + + /* RX Stats */ + eth_stats->ierrors = ps.rx_len_err; + + /* TX Stats */ + eth_stats->opackets = ps.tx_bcast_frames + ps.tx_mcast_frames + + ps.tx_ucast_frames; + eth_stats->obytes = ps.tx_octets; + eth_stats->oerrors = ps.tx_drop; + + for (i = 0; i < pi->n_rx_qsets; i++) { + struct sge_eth_rxq *rxq = + &s->ethrxq[pi->first_qset + i]; + + eth_stats->q_ipackets[i] = rxq->stats.pkts; + eth_stats->q_ibytes[i] = rxq->stats.rx_bytes; + eth_stats->ipackets += eth_stats->q_ipackets[i]; + eth_stats->ibytes += eth_stats->q_ibytes[i]; + } + + for (i = 0; i < pi->n_tx_qsets; i++) { + struct sge_eth_txq *txq = + &s->ethtxq[pi->first_qset + i]; + + eth_stats->q_opackets[i] = txq->stats.pkts; + eth_stats->q_obytes[i] = txq->stats.tx_bytes; + eth_stats->q_errors[i] = txq->stats.mapping_err; + } + return 0; +} + static const struct eth_dev_ops cxgbevf_eth_dev_ops = { .dev_start = cxgbe_dev_start, .dev_stop = cxgbe_dev_stop, @@ -42,6 +86,8 @@ static const struct eth_dev_ops cxgbevf_eth_dev_ops = { .dev_infos_get = cxgbe_dev_info_get, .dev_supported_ptypes_get = cxgbe_dev_supported_ptypes_get, .link_update = cxgbe_dev_link_update, + .dev_set_link_up = cxgbe_dev_set_link_up, + .dev_set_link_down = cxgbe_dev_set_link_down, .mtu_set = cxgbe_dev_mtu_set, .tx_queue_setup = cxgbe_dev_tx_queue_setup, .tx_queue_start = cxgbe_dev_tx_queue_start, @@ -51,6 +97,8 @@ static const struct eth_dev_ops cxgbevf_eth_dev_ops = { .rx_queue_start = cxgbe_dev_rx_queue_start, .rx_queue_stop = cxgbe_dev_rx_queue_stop, .rx_queue_release = cxgbe_dev_rx_queue_release, + .stats_get = cxgbevf_dev_stats_get, + .mac_addr_set = cxgbe_mac_addr_set, }; /* @@ -68,8 +116,8 @@ static int eth_cxgbevf_dev_init(struct rte_eth_dev *eth_dev) CXGBE_FUNC_TRACE(); eth_dev->dev_ops = &cxgbevf_eth_dev_ops; - eth_dev->rx_pkt_burst = NULL; - eth_dev->tx_pkt_burst = NULL; + eth_dev->rx_pkt_burst = &cxgbe_recv_pkts; + eth_dev->tx_pkt_burst = &cxgbe_xmit_pkts; pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); /* for secondary processes, we attach to ethdevs allocated by primary @@ -93,6 +141,7 @@ static int eth_cxgbevf_dev_init(struct rte_eth_dev *eth_dev) eth_dev->rx_pkt_burst; rest_eth_dev->tx_pkt_burst = eth_dev->tx_pkt_burst; + rte_eth_dev_probing_finish(rest_eth_dev); } } return 0;