X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=config%2Fcommon_base;h=8ae6e9275ab79bad1f6fe9557c06daad9a6b4400;hb=f51fd44d645fc1914bbaeda67c2210f6e06c44e6;hp=ab0750bdced09b1fee8f0da006e1bc7432804fec;hpb=5dc43d22b5ad8f4f4391398efd8c61db353215d1;p=dpdk.git diff --git a/config/common_base b/config/common_base index ab0750bdce..8ae6e9275a 100644 --- a/config/common_base +++ b/config/common_base @@ -96,12 +96,22 @@ CONFIG_RTE_MAX_TAILQ=32 CONFIG_RTE_LOG_LEVEL=RTE_LOG_INFO CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO CONFIG_RTE_LOG_HISTORY=256 +CONFIG_RTE_BACKTRACE=y CONFIG_RTE_LIBEAL_USE_HPET=n CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n CONFIG_RTE_EAL_IGB_UIO=n CONFIG_RTE_EAL_VFIO=n CONFIG_RTE_MALLOC_DEBUG=n +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n + +# +# Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing. +# AVX512 is marked as experimental for now, will enable it after enough +# field test and possible optimization. +# +CONFIG_RTE_ENABLE_AVX=y +CONFIG_RTE_ENABLE_AVX512=n # Default driver path (or "" to disable) CONFIG_RTE_EAL_PMD_PATH="" @@ -130,16 +140,11 @@ CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y # # Turn off Tx preparation stage # -# Warning: rte_ethdev_tx_prepare() can be safely disabled only if using a +# Warning: rte_eth_tx_prepare() can be safely disabled only if using a # driver which do not implement any Tx preparation. # CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n -# -# Support NIC bypass logic -# -CONFIG_RTE_NIC_BYPASS=n - # # Compile burst-oriented Amazon ENA PMD driver # @@ -173,6 +178,7 @@ CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n CONFIG_RTE_LIBRTE_IXGBE_DEBUG_DRIVER=n CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n CONFIG_RTE_IXGBE_INC_VECTOR=y +CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n # # Compile burst-oriented I40E PMD driver @@ -231,7 +237,7 @@ CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n # -# Compile burst-oriented Chelsio Terminator 10GbE/40GbE (CXGBE) PMD +# Compile burst-oriented Chelsio Terminator (CXGBE) PMD # CONFIG_RTE_LIBRTE_CXGBE_PMD=y CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n @@ -239,12 +245,14 @@ CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n +CONFIG_RTE_LIBRTE_CXGBE_TPUT=y # # Compile burst-oriented Cisco ENIC PMD driver # CONFIG_RTE_LIBRTE_ENIC_PMD=y CONFIG_RTE_LIBRTE_ENIC_DEBUG=n +CONFIG_RTE_LIBRTE_ENIC_DEBUG_FLOW=n # # Compile burst-oriented Netronome NFP PMD driver @@ -269,12 +277,8 @@ CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n # # Defines firmware type address space. -# RTE_LIBRTE_PMD_SZEDATA2_AS can be: -# 0 - for firmwares: -# NIC_100G1_LR4 -# HANIC_100G1_LR4 -# HANIC_100G1_SR10 -# Other values raise compile time error +# See documentation for supported values. +# Other values raise compile time error. CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0 # @@ -307,6 +311,17 @@ CONFIG_RTE_LIBRTE_FSLMC_BUS=n # Compile Support Libraries for NXP DPAA2 # CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n +CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y + +# +# Compile burst-oriented NXP DPAA2 PMD driver +# +CONFIG_RTE_LIBRTE_DPAA2_PMD=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n # # Compile burst-oriented VIRTIO PMD driver @@ -423,6 +438,14 @@ CONFIG_RTE_CRYPTODEV_NAME_LEN=64 CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n +# +# Compile NXP DPAA2 crypto sec driver for CAAM HW +# +CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n + # # Compile PMD for QuickAssist based devices # @@ -617,6 +640,11 @@ CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4 CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n +# +# Compile GRO library +# +CONFIG_RTE_LIBRTE_GRO=y + # # Compile librte_meter # @@ -711,3 +739,8 @@ CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n # Compile the crypto performance application # CONFIG_RTE_APP_CRYPTO_PERF=y + +# +# Compile the eventdev application +# +CONFIG_RTE_APP_EVENTDEV=y