X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=doc%2Fguides%2Fprog_guide%2Fenv_abstraction_layer.rst;h=48a2fec066db87f2f84c55344c8596140278e6dc;hb=a72cf98cc93eefbc2fc3673b696d1b218d01eb8e;hp=94f30fd5d65150965dc4d77c518f4232720f1ff6;hpb=79a0bbe5b6f9a87d0de7cdb5a0dfc62977442904;p=dpdk.git diff --git a/doc/guides/prog_guide/env_abstraction_layer.rst b/doc/guides/prog_guide/env_abstraction_layer.rst index 94f30fd5d6..48a2fec066 100644 --- a/doc/guides/prog_guide/env_abstraction_layer.rst +++ b/doc/guides/prog_guide/env_abstraction_layer.rst @@ -249,7 +249,7 @@ manual memory management. + Using heap API's for externally allocated memory -Using using a set of malloc heap API's is the recommended way to use externally +Using a set of malloc heap API's is the recommended way to use externally allocated memory in DPDK. In this way, support for externally allocated memory is implemented through overloading the socket ID - externally allocated heaps will have socket ID's that would be considered invalid under normal @@ -297,7 +297,7 @@ set of API's under the ``rte_extmem_*`` namespace. These API's are (as their name implies) intended to allow registering or unregistering externally allocated memory to/from DPDK's internal page table, to -allow API's like ``rte_virt2memseg`` etc. to work with externally allocated +allow API's like ``rte_mem_virt2memseg`` etc. to work with externally allocated memory. Memory added this way will not be available for any regular DPDK allocators; DPDK will leave this memory for the user application to manage. @@ -475,6 +475,9 @@ devices would fail anyway. ``RTE_PCI_DRV_NEED_IOVA_AS_VA`` flag is used to dictate that this PCI driver can only work in RTE_IOVA_VA mode. + When the KNI kernel module is detected, RTE_IOVA_PA mode is preferred as a + performance penalty is expected in RTE_IOVA_VA mode. + IOVA Mode Configuration ~~~~~~~~~~~~~~~~~~~~~~~ @@ -648,8 +651,8 @@ Known Issues Alternatively, applications can use the lock-free stack mempool handler. When considering this handler, note that: - - It is currently limited to the x86_64 platform, because it uses an - instruction (16-byte compare-and-swap) that is not yet available on other + - It is currently limited to the aarch64 and x86_64 platforms, because it uses + an instruction (16-byte compare-and-swap) that is not yet available on other platforms. - It has worse average-case performance than the non-preemptive rte_ring, but software caching (e.g. the mempool cache) can mitigate this by reducing the