X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=doc%2Fguides%2Fprog_guide%2Fmempool_lib.rst;h=890535eb23483855383a97f81e6f2b9e04b41f43;hb=da97592635bbee01f72d76659d00720a62fa2d04;hp=e3e1f940bebfd2baa40bee330c4fbde310096b5c;hpb=5c307ba2a5b14abb70dcc80a1283ba5a128262d9;p=dpdk.git diff --git a/doc/guides/prog_guide/mempool_lib.rst b/doc/guides/prog_guide/mempool_lib.rst index e3e1f940be..890535eb23 100644 --- a/doc/guides/prog_guide/mempool_lib.rst +++ b/doc/guides/prog_guide/mempool_lib.rst @@ -17,14 +17,13 @@ This library is used by the :ref:`Mbuf Library `. Cookies ------- -In debug mode (CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG is enabled), cookies are added at the beginning and end of allocated blocks. +In debug mode, cookies are added at the beginning and end of allocated blocks. The allocated objects then contain overwrite protection fields to help debugging buffer overflows. Stats ----- -In debug mode (CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG is enabled), -statistics about get from/put in the pool are stored in the mempool structure. +In debug mode, statistics about get from/put in the pool are stored in the mempool structure. Statistics are per-lcore to avoid concurrent access to statistics counters. Memory Alignment Constraints on x86 architecture @@ -90,7 +89,7 @@ the speed at which a core can access its own cache for a specific memory pool wi The cache is composed of a small, per-core table of pointers and its length (used as a stack). This internal cache can be enabled or disabled at creation of the pool. -The maximum size of the cache is static and is defined at compilation time (CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE). +The maximum size of the cache is static and is defined at compilation time (RTE_MEMPOOL_CACHE_MAX_SIZE). :numref:`figure_mempool` shows a cache in operation. @@ -105,6 +104,8 @@ These user-owned caches can be explicitly passed to ``rte_mempool_generic_put()` The ``rte_mempool_default_cache()`` call returns the default internal cache if any. In contrast to the default caches, user-owned caches can be used by unregistered non-EAL threads too. +.. _Mempool_Handlers: + Mempool Handlers ------------------------