X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fcrypto%2Focteontx2%2Fotx2_cryptodev.c;h=85b1f0026336da45e248a0105730ba9f15356636;hb=190f7e84c338beb5cbf086123103cc7e49b05d67;hp=50cbb13d86c384211c283190d4b81989e59a1aee;hpb=9c99878aa1b16de26fcce82c112b401766dd910e;p=dpdk.git

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
index 50cbb13d86..85b1f00263 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -6,7 +6,7 @@
 #include <rte_common.h>
 #include <rte_crypto.h>
 #include <rte_cryptodev.h>
-#include <rte_cryptodev_pmd.h>
+#include <cryptodev_pmd.h>
 #include <rte_dev.h>
 #include <rte_errno.h>
 #include <rte_mempool.h>
@@ -14,8 +14,10 @@
 
 #include "otx2_common.h"
 #include "otx2_cryptodev.h"
+#include "otx2_cryptodev_capabilities.h"
 #include "otx2_cryptodev_mbox.h"
 #include "otx2_cryptodev_ops.h"
+#include "otx2_cryptodev_sec.h"
 #include "otx2_dev.h"
 
 /* CPT common headers */
@@ -35,6 +37,23 @@ static struct rte_pci_id pci_id_cpt_table[] = {
 	},
 };
 
+uint64_t
+otx2_cpt_default_ff_get(void)
+{
+	return RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
+	       RTE_CRYPTODEV_FF_HW_ACCELERATED |
+	       RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+	       RTE_CRYPTODEV_FF_IN_PLACE_SGL |
+	       RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
+	       RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
+	       RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
+	       RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
+	       RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
+	       RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
+	       RTE_CRYPTODEV_FF_SECURITY |
+	       RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
+}
+
 static int
 otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 		   struct rte_pci_device *pci_dev)
@@ -68,47 +87,59 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 
 	otx2_dev = &vf->otx2_dev;
 
-	/* Initialize the base otx2_dev object */
-	ret = otx2_dev_init(pci_dev, otx2_dev);
-	if (ret) {
-		CPT_LOG_ERR("Could not initialize otx2_dev");
-		goto pmd_destroy;
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+		/* Initialize the base otx2_dev object */
+		ret = otx2_dev_init(pci_dev, otx2_dev);
+		if (ret) {
+			CPT_LOG_ERR("Could not initialize otx2_dev");
+			goto pmd_destroy;
+		}
+
+		/* Get number of queues available on the device */
+		ret = otx2_cpt_available_queues_get(dev, &nb_queues);
+		if (ret) {
+			CPT_LOG_ERR("Could not determine the number of queues available");
+			goto otx2_dev_fini;
+		}
+
+		/* Don't exceed the limits set per VF */
+		nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
+
+		if (nb_queues == 0) {
+			CPT_LOG_ERR("No free queues available on the device");
+			goto otx2_dev_fini;
+		}
+
+		vf->max_queues = nb_queues;
+
+		CPT_LOG_INFO("Max queues supported by device: %d",
+				vf->max_queues);
+
+		ret = otx2_cpt_hardware_caps_get(dev, vf->hw_caps);
+		if (ret) {
+			CPT_LOG_ERR("Could not determine hardware capabilities");
+			goto otx2_dev_fini;
+		}
 	}
 
-	/* Get number of queues available on the device */
-	ret = otx2_cpt_available_queues_get(dev, &nb_queues);
-	if (ret) {
-		CPT_LOG_ERR("Could not determine the number of queues available");
-		goto otx2_dev_fini;
-	}
+	otx2_crypto_capabilities_init(vf->hw_caps);
+	otx2_crypto_sec_capabilities_init(vf->hw_caps);
 
-	/* Don't exceed the limits set per VF */
-	nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
-
-	if (nb_queues == 0) {
-		CPT_LOG_ERR("No free queues available on the device");
+	/* Create security ctx */
+	ret = otx2_crypto_sec_ctx_create(dev);
+	if (ret)
 		goto otx2_dev_fini;
-	}
 
-	vf->max_queues = nb_queues;
+	dev->feature_flags = otx2_cpt_default_ff_get();
 
-	CPT_LOG_INFO("Max queues supported by device: %d", vf->max_queues);
-
-	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
-			     RTE_CRYPTODEV_FF_HW_ACCELERATED |
-			     RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
-			     RTE_CRYPTODEV_FF_IN_PLACE_SGL |
-			     RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
-			     RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
-			     RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
-			     RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
-			     RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA |
-			     RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
+	if (rte_eal_process_type() == RTE_PROC_SECONDARY)
+		otx2_cpt_set_enqdeq_fns(dev);
 
 	return 0;
 
 otx2_dev_fini:
-	otx2_dev_fini(pci_dev, otx2_dev);
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+		otx2_dev_fini(pci_dev, otx2_dev);
 pmd_destroy:
 	rte_cryptodev_pmd_destroy(dev);
 exit:
@@ -132,6 +163,9 @@ otx2_cpt_pci_remove(struct rte_pci_device *pci_dev)
 	if (dev == NULL)
 		return -ENODEV;
 
+	/* Destroy security ctx */
+	otx2_crypto_sec_ctx_destroy(dev);
+
 	return rte_cryptodev_pmd_destroy(dev);
 }
 
@@ -149,4 +183,4 @@ RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX2_PMD, pci_id_cpt_table);
 RTE_PMD_REGISTER_KMOD_DEP(CRYPTODEV_NAME_OCTEONTX2_PMD, "vfio-pci");
 RTE_PMD_REGISTER_CRYPTO_DRIVER(otx2_cryptodev_drv, otx2_cryptodev_pmd.driver,
 		otx2_cryptodev_driver_id);
-RTE_LOG_REGISTER(otx2_cpt_logtype, pmd.crypto.octeontx2, NOTICE);
+RTE_LOG_REGISTER_DEFAULT(otx2_cpt_logtype, NOTICE);