X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fcrypto%2Fqat%2Fqat_asym_pmd.h;h=895d0f6d6a1607c53c043fb397b11acca40af09a;hb=8efad8b6a434a2220beaddf55949ead7df53c1bc;hp=0465e030008b4b998c76450592e62bf7078e682b;hpb=f9a3d7f68f05644ec3e3ef3854535ef25ed2d3df;p=dpdk.git

diff --git a/drivers/crypto/qat/qat_asym_pmd.h b/drivers/crypto/qat/qat_asym_pmd.h
index 0465e03000..895d0f6d6a 100644
--- a/drivers/crypto/qat/qat_asym_pmd.h
+++ b/drivers/crypto/qat/qat_asym_pmd.h
@@ -1,15 +1,50 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018 Intel Corporation
+ * Copyright(c) 2019 Intel Corporation
  */
 
+
 #ifndef _QAT_ASYM_PMD_H_
 #define _QAT_ASYM_PMD_H_
 
+#include <rte_cryptodev.h>
 #include "qat_device.h"
 
+/** Intel(R) QAT Asymmetric Crypto PMD driver name */
+#define CRYPTODEV_NAME_QAT_ASYM_PMD	crypto_qat_asym
+
+
+extern uint8_t cryptodev_qat_asym_driver_id;
+
+/** private data structure for a QAT device.
+ * This QAT device is a device offering only asymmetric crypto service,
+ * there can be one of these on each qat_pci_device (VF).
+ */
+struct qat_asym_dev_private {
+	struct qat_pci_device *qat_dev;
+	/**< The qat pci device hosting the service */
+	uint8_t asym_dev_id;
+	/**< Device instance for this rte_cryptodev */
+	const struct rte_cryptodev_capabilities *qat_dev_capabilities;
+	/* QAT device asymmetric crypto capabilities */
+};
+
+uint16_t
+qat_asym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
+			      uint16_t nb_ops);
+
+uint16_t
+qat_asym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
+			      uint16_t nb_ops);
+
+int qat_asym_session_configure(struct rte_cryptodev *dev,
+		struct rte_crypto_asym_xform *xform,
+		struct rte_cryptodev_asym_session *sess,
+		struct rte_mempool *mempool);
+
 int
 qat_asym_dev_create(struct qat_pci_device *qat_pci_dev);
 
 int
 qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev);
+
 #endif /* _QAT_ASYM_PMD_H_ */