X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fbnxt%2Fbnxt.h;h=8602ab3346839120e22df690d1ca7a553991748d;hb=749ba50d346f5c785d093b37674138d7a3c03570;hp=8797b032ee146170296f1c721d1439156f306b47;hpb=df6cd7c1f73a62e2bd889cc1aa4832096cb8c245;p=dpdk.git diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index 8797b032ee..8602ab3346 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -19,15 +19,19 @@ #include #include "bnxt_cpr.h" +#include "bnxt_util.h" #define BNXT_MAX_MTU 9574 #define VLAN_TAG_SIZE 4 +#define BNXT_NUM_VLANS 2 +#define BNXT_MAX_PKT_LEN (BNXT_MAX_MTU + RTE_ETHER_HDR_LEN +\ + RTE_ETHER_CRC_LEN +\ + (BNXT_NUM_VLANS * VLAN_TAG_SIZE)) #define BNXT_VF_RSV_NUM_RSS_CTX 1 #define BNXT_VF_RSV_NUM_L2_CTX 4 /* TODO: For now, do not support VMDq/RFS on VFs. */ #define BNXT_VF_RSV_NUM_VNIC 1 #define BNXT_MAX_LED 4 -#define BNXT_NUM_VLANS 2 #define BNXT_MIN_RING_DESC 16 #define BNXT_MAX_TX_RING_DESC 4096 #define BNXT_MAX_RX_RING_DESC 8192 @@ -188,6 +192,10 @@ struct rte_flow { struct bnxt_vnic_info *vnic; }; +#define BNXT_PTP_FLAGS_PATH_TX 0x0 +#define BNXT_PTP_FLAGS_PATH_RX 0x1 +#define BNXT_PTP_FLAGS_CURRENT_TIME 0x2 + struct bnxt_ptp_cfg { #define BNXT_GRCPF_REG_WINDOW_BASE_OUT 0x400 #define BNXT_GRCPF_REG_SYNC_TIME 0x480 @@ -198,16 +206,16 @@ struct bnxt_ptp_cfg { struct bnxt *bp; #define BNXT_MAX_TX_TS 1 uint16_t rxctl; -#define BNXT_PTP_MSG_SYNC (1 << 0) -#define BNXT_PTP_MSG_DELAY_REQ (1 << 1) -#define BNXT_PTP_MSG_PDELAY_REQ (1 << 2) -#define BNXT_PTP_MSG_PDELAY_RESP (1 << 3) -#define BNXT_PTP_MSG_FOLLOW_UP (1 << 8) -#define BNXT_PTP_MSG_DELAY_RESP (1 << 9) -#define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP (1 << 10) -#define BNXT_PTP_MSG_ANNOUNCE (1 << 11) -#define BNXT_PTP_MSG_SIGNALING (1 << 12) -#define BNXT_PTP_MSG_MANAGEMENT (1 << 13) +#define BNXT_PTP_MSG_SYNC BIT(0) +#define BNXT_PTP_MSG_DELAY_REQ BIT(1) +#define BNXT_PTP_MSG_PDELAY_REQ BIT(2) +#define BNXT_PTP_MSG_PDELAY_RESP BIT(3) +#define BNXT_PTP_MSG_FOLLOW_UP BIT(8) +#define BNXT_PTP_MSG_DELAY_RESP BIT(9) +#define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP BIT(10) +#define BNXT_PTP_MSG_ANNOUNCE BIT(11) +#define BNXT_PTP_MSG_SIGNALING BIT(12) +#define BNXT_PTP_MSG_MANAGEMENT BIT(13) #define BNXT_PTP_MSG_EVENTS (BNXT_PTP_MSG_SYNC | \ BNXT_PTP_MSG_DELAY_REQ | \ BNXT_PTP_MSG_PDELAY_REQ | \ @@ -233,6 +241,9 @@ struct bnxt_ptp_cfg { uint32_t rx_mapped_regs[BNXT_PTP_RX_REGS]; uint32_t tx_regs[BNXT_PTP_TX_REGS]; uint32_t tx_mapped_regs[BNXT_PTP_TX_REGS]; + + /* On Thor, the Rx timestamp is present in the Rx completion record */ + uint64_t rx_timestamp; }; struct bnxt_coal { @@ -343,6 +354,55 @@ struct bnxt_ctx_mem_info { #define US_PER_MS 1000 #define NS_PER_US 1000 +struct bnxt_error_recovery_info { + /* All units in milliseconds */ + uint32_t driver_polling_freq; + uint32_t master_func_wait_period; + uint32_t normal_func_wait_period; + uint32_t master_func_wait_period_after_reset; + uint32_t max_bailout_time_after_reset; +#define BNXT_FW_STATUS_REG 0 +#define BNXT_FW_HEARTBEAT_CNT_REG 1 +#define BNXT_FW_RECOVERY_CNT_REG 2 +#define BNXT_FW_RESET_INPROG_REG 3 +#define BNXT_FW_STATUS_REG_CNT 4 + uint32_t status_regs[BNXT_FW_STATUS_REG_CNT]; + uint32_t mapped_status_regs[BNXT_FW_STATUS_REG_CNT]; + uint32_t reset_inprogress_reg_mask; +#define BNXT_NUM_RESET_REG 16 + uint8_t reg_array_cnt; + uint32_t reset_reg[BNXT_NUM_RESET_REG]; + uint32_t reset_reg_val[BNXT_NUM_RESET_REG]; + uint8_t delay_after_reset[BNXT_NUM_RESET_REG]; +#define BNXT_FLAG_ERROR_RECOVERY_HOST BIT(0) +#define BNXT_FLAG_ERROR_RECOVERY_CO_CPU BIT(1) +#define BNXT_FLAG_MASTER_FUNC BIT(2) +#define BNXT_FLAG_RECOVERY_ENABLED BIT(3) + uint32_t flags; + + uint32_t last_heart_beat; + uint32_t last_reset_counter; +}; + +/* address space location of register */ +#define BNXT_FW_STATUS_REG_TYPE_MASK 3 +/* register is located in PCIe config space */ +#define BNXT_FW_STATUS_REG_TYPE_CFG 0 +/* register is located in GRC address space */ +#define BNXT_FW_STATUS_REG_TYPE_GRC 1 +/* register is located in BAR0 */ +#define BNXT_FW_STATUS_REG_TYPE_BAR0 2 +/* register is located in BAR1 */ +#define BNXT_FW_STATUS_REG_TYPE_BAR1 3 + +#define BNXT_FW_STATUS_REG_TYPE(reg) ((reg) & BNXT_FW_STATUS_REG_TYPE_MASK) +#define BNXT_FW_STATUS_REG_OFF(reg) ((reg) & ~BNXT_FW_STATUS_REG_TYPE_MASK) + +#define BNXT_GRCP_WINDOW_2_BASE 0x2000 +#define BNXT_GRCP_WINDOW_3_BASE 0x3000 + +#define BNXT_FW_STATUS_SHUTDOWN 0x100000 + #define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input) struct bnxt { void *bar0; @@ -353,26 +413,33 @@ struct bnxt { void *doorbell_base; uint32_t flags; -#define BNXT_FLAG_REGISTERED (1 << 0) -#define BNXT_FLAG_VF (1 << 1) -#define BNXT_FLAG_PORT_STATS (1 << 2) -#define BNXT_FLAG_JUMBO (1 << 3) -#define BNXT_FLAG_SHORT_CMD (1 << 4) -#define BNXT_FLAG_UPDATE_HASH (1 << 5) -#define BNXT_FLAG_PTP_SUPPORTED (1 << 6) -#define BNXT_FLAG_MULTI_HOST (1 << 7) -#define BNXT_FLAG_EXT_RX_PORT_STATS (1 << 8) -#define BNXT_FLAG_EXT_TX_PORT_STATS (1 << 9) -#define BNXT_FLAG_KONG_MB_EN (1 << 10) -#define BNXT_FLAG_TRUSTED_VF_EN (1 << 11) -#define BNXT_FLAG_DFLT_VNIC_SET (1 << 12) -#define BNXT_FLAG_THOR_CHIP (1 << 13) -#define BNXT_FLAG_STINGRAY (1 << 14) -#define BNXT_FLAG_FW_RESET (1 << 15) -#define BNXT_FLAG_FATAL_ERROR (1 << 16) -#define BNXT_FLAG_EXT_STATS_SUPPORTED (1 << 29) -#define BNXT_FLAG_NEW_RM (1 << 30) -#define BNXT_FLAG_INIT_DONE (1U << 31) +#define BNXT_FLAG_REGISTERED BIT(0) +#define BNXT_FLAG_VF BIT(1) +#define BNXT_FLAG_PORT_STATS BIT(2) +#define BNXT_FLAG_JUMBO BIT(3) +#define BNXT_FLAG_SHORT_CMD BIT(4) +#define BNXT_FLAG_UPDATE_HASH BIT(5) +#define BNXT_FLAG_PTP_SUPPORTED BIT(6) +#define BNXT_FLAG_MULTI_HOST BIT(7) +#define BNXT_FLAG_EXT_RX_PORT_STATS BIT(8) +#define BNXT_FLAG_EXT_TX_PORT_STATS BIT(9) +#define BNXT_FLAG_KONG_MB_EN BIT(10) +#define BNXT_FLAG_TRUSTED_VF_EN BIT(11) +#define BNXT_FLAG_DFLT_VNIC_SET BIT(12) +#define BNXT_FLAG_THOR_CHIP BIT(13) +#define BNXT_FLAG_STINGRAY BIT(14) +#define BNXT_FLAG_FW_RESET BIT(15) +#define BNXT_FLAG_FATAL_ERROR BIT(16) +#define BNXT_FLAG_FW_CAP_IF_CHANGE BIT(17) +#define BNXT_FLAG_IF_CHANGE_HOT_FW_RESET_DONE BIT(18) +#define BNXT_FLAG_FW_CAP_ERROR_RECOVERY BIT(19) +#define BNXT_FLAG_FW_HEALTH_CHECK_SCHEDULED BIT(20) +#define BNXT_FLAG_FW_CAP_ERR_RECOVER_RELOAD BIT(21) +#define BNXT_FLAG_EXT_STATS_SUPPORTED BIT(22) +#define BNXT_FLAG_NEW_RM BIT(23) +#define BNXT_FLAG_INIT_DONE BIT(24) +#define BNXT_FLAG_FW_CAP_ONE_STEP_TX_TS BIT(25) +#define BNXT_FLAG_ADV_FLOW_MGMT BIT(26) #define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF)) #define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF) #define BNXT_NPAR(bp) ((bp)->port_partition_type) @@ -386,8 +453,12 @@ struct bnxt { #define BNXT_HAS_NQ(bp) BNXT_CHIP_THOR(bp) #define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_THOR(bp)) + uint32_t flow_flags; +#define BNXT_FLOW_FLAG_L2_HDR_SRC_FILTER_EN BIT(0) + unsigned int rx_nr_rings; unsigned int rx_cp_nr_rings; + unsigned int rx_num_qs_per_vnic; struct bnxt_rx_queue **rx_queues; const void *rx_mem_zone; struct rx_port_stats *hw_rx_port_stats; @@ -422,7 +493,6 @@ struct bnxt { struct bnxt_irq *irq_tbl; -#define MAX_NUM_MAC_ADDR 32 uint8_t mac_addr[RTE_ETHER_ADDR_LEN]; uint16_t hwrm_cmd_seq; @@ -456,6 +526,10 @@ struct bnxt { uint16_t max_stat_ctx; uint16_t first_vf_id; uint16_t vlan; +#define BNXT_OUTER_TPID_MASK 0x0000ffff +#define BNXT_OUTER_TPID_BD_MASK 0xffff0000 +#define BNXT_OUTER_TPID_BD_SHFT 16 + uint32_t outer_tpid_bd; struct bnxt_pf_info pf; uint8_t port_partition_type; uint8_t dev_stopped; @@ -476,11 +550,19 @@ struct bnxt { uint16_t fw_reset_min_msecs; uint16_t fw_reset_max_msecs; + + /* Struct to hold adapter error recovery related info */ + struct bnxt_error_recovery_info *recovery_info; }; int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete); int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg); int is_bnxt_in_error(struct bnxt *bp); +uint16_t bnxt_rss_ctxts(const struct bnxt *bp); + +int bnxt_map_fw_health_status_regs(struct bnxt *bp); +uint32_t bnxt_read_fw_status_reg(struct bnxt *bp, uint32_t index); +void bnxt_schedule_fw_health_check(struct bnxt *bp); bool is_bnxt_supported(struct rte_eth_dev *dev); bool bnxt_stratus_device(struct bnxt *bp);