X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fbnxt%2Ftf_ulp%2Fulp_template_db_enum.h;h=ddc396b3f9f52938cc8c540fad4a20a972a2128e;hb=835731f63b0a89deedc6878a7028844b643fb54e;hp=c9fe1bc478cc7988becd8e7dceca9a31da8bde24;hpb=772656956fbead4bd587ef2b99ec8490ed3e5d5b;p=dpdk.git diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index c9fe1bc478..ddc396b3f9 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2014-2020 Broadcom + * Copyright(c) 2014-2021 Broadcom * All rights reserved. */ @@ -9,16 +9,16 @@ #define BNXT_ULP_REGFILE_MAX_SZ 19 #define BNXT_ULP_MAX_NUM_DEVICES 4 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2 -#define BNXT_ULP_CACHE_TBL_MAX_SZ 4 +#define BNXT_ULP_GEN_TBL_MAX_SZ 4 #define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 2048 -#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 155 +#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 217 #define BNXT_ULP_CLASS_HID_LOW_PRIME 7919 #define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907 #define BNXT_ULP_CLASS_HID_SHFTR 32 #define BNXT_ULP_CLASS_HID_SHFTL 31 #define BNXT_ULP_CLASS_HID_MASK 2047 #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 4096 -#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 86 +#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 83 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919 #define BNXT_ULP_ACT_HID_HIGH_PRIME 4721 #define BNXT_ULP_ACT_HID_SHFTR 23 @@ -27,6 +27,7 @@ #define BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM 2 #define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 8 #define BNXT_ULP_GLB_TEMPLATE_TBL_MAX_SZ 1 +#define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7 enum bnxt_ulp_action_bit { BNXT_ULP_ACTION_BIT_MARK = 0x0000000000000001, @@ -52,7 +53,11 @@ enum bnxt_ulp_action_bit { BNXT_ULP_ACTION_BIT_SET_TP_SRC = 0x0000000000100000, BNXT_ULP_ACTION_BIT_SET_TP_DST = 0x0000000000200000, BNXT_ULP_ACTION_BIT_VXLAN_ENCAP = 0x0000000000400000, - BNXT_ULP_ACTION_BIT_LAST = 0x0000000000800000 + BNXT_ULP_ACTION_BIT_JUMP = 0x0000000000800000, + BNXT_ULP_ACTION_BIT_SHARED = 0x0000000001000000, + BNXT_ULP_ACTION_BIT_SAMPLE = 0x0000000002000000, + BNXT_ULP_ACTION_BIT_SHARED_SAMPLE = 0x0000000004000000, + BNXT_ULP_ACTION_BIT_LAST = 0x0000000008000000 }; enum bnxt_ulp_hdr_bit { @@ -72,7 +77,8 @@ enum bnxt_ulp_hdr_bit { BNXT_ULP_HDR_BIT_I_IPV6 = 0x0000000000002000, BNXT_ULP_HDR_BIT_I_TCP = 0x0000000000004000, BNXT_ULP_HDR_BIT_I_UDP = 0x0000000000008000, - BNXT_ULP_HDR_BIT_LAST = 0x0000000000010000 + BNXT_ULP_HDR_BIT_F1 = 0x0000000000010000, + BNXT_ULP_HDR_BIT_LAST = 0x0000000000020000 }; enum bnxt_ulp_act_type { @@ -127,22 +133,37 @@ enum bnxt_ulp_cf_idx { BNXT_ULP_CF_IDX_ACT_PORT_IS_SET = 35, BNXT_ULP_CF_IDX_ACT_PORT_TYPE = 36, BNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 37, - BNXT_ULP_CF_IDX_VF_TO_VF = 38, - BNXT_ULP_CF_IDX_L3_HDR_CNT = 39, - BNXT_ULP_CF_IDX_L4_HDR_CNT = 40, - BNXT_ULP_CF_IDX_VFR_MODE = 41, - BNXT_ULP_CF_IDX_LAST = 42 -}; - -enum bnxt_ulp_cond_opcode { - BNXT_ULP_COND_OPCODE_NOP = 0, - BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET = 1, - BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET = 2, - BNXT_ULP_COND_OPCODE_HDR_BIT_IS_SET = 3, - BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET = 4, - BNXT_ULP_COND_OPCODE_ACTION_BIT_NOT_SET = 5, - BNXT_ULP_COND_OPCODE_HDR_BIT_NOT_SET = 6, - BNXT_ULP_COND_OPCODE_LAST = 7 + BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP = 38, + BNXT_ULP_CF_IDX_VF_TO_VF = 39, + BNXT_ULP_CF_IDX_L3_HDR_CNT = 40, + BNXT_ULP_CF_IDX_L4_HDR_CNT = 41, + BNXT_ULP_CF_IDX_VFR_MODE = 42, + BNXT_ULP_CF_IDX_LOOPBACK_PARIF = 43, + BNXT_ULP_CF_IDX_L3_TUN = 44, + BNXT_ULP_CF_IDX_L3_TUN_DECAP = 45, + BNXT_ULP_CF_IDX_LAST = 46 +}; + +enum bnxt_ulp_cond_list_opc { + BNXT_ULP_COND_LIST_OPC_TRUE = 0, + BNXT_ULP_COND_LIST_OPC_FALSE = 1, + BNXT_ULP_COND_LIST_OPC_OR = 2, + BNXT_ULP_COND_LIST_OPC_AND = 3, + BNXT_ULP_COND_LIST_OPC_LAST = 4 +}; + +enum bnxt_ulp_cond_opc { + BNXT_ULP_COND_OPC_COMP_FIELD_IS_SET = 0, + BNXT_ULP_COND_OPC_COMP_FIELD_NOT_SET = 1, + BNXT_ULP_COND_OPC_ACTION_BIT_IS_SET = 2, + BNXT_ULP_COND_OPC_ACTION_BIT_NOT_SET = 3, + BNXT_ULP_COND_OPC_HDR_BIT_IS_SET = 4, + BNXT_ULP_COND_OPC_HDR_BIT_NOT_SET = 5, + BNXT_ULP_COND_OPC_FIELD_BIT_IS_SET = 6, + BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET = 7, + BNXT_ULP_COND_OPC_REGFILE_IS_SET = 8, + BNXT_ULP_COND_OPC_REGFILE_NOT_SET = 9, + BNXT_ULP_COND_OPC_LAST = 10 }; enum bnxt_ulp_critical_resource { @@ -170,6 +191,14 @@ enum bnxt_ulp_direction { BNXT_ULP_DIRECTION_LAST = 2 }; +enum bnxt_ulp_fdb_opc { + BNXT_ULP_FDB_OPC_PUSH = 0, + BNXT_ULP_FDB_OPC_ALLOC_PUSH_REGFILE = 1, + BNXT_ULP_FDB_OPC_PUSH_REGFILE = 2, + BNXT_ULP_FDB_OPC_NOP = 3, + BNXT_ULP_FDB_OPC_LAST = 4 +}; + enum bnxt_ulp_flow_mem_type { BNXT_ULP_FLOW_MEM_TYPE_INT = 0, BNXT_ULP_FLOW_MEM_TYPE_EXT = 1, @@ -177,6 +206,13 @@ enum bnxt_ulp_flow_mem_type { BNXT_ULP_FLOW_MEM_TYPE_LAST = 3 }; +enum bnxt_ulp_generic_tbl_opc { + BNXT_ULP_GENERIC_TBL_OPC_NOT_USED = 0, + BNXT_ULP_GENERIC_TBL_OPC_READ = 1, + BNXT_ULP_GENERIC_TBL_OPC_WRITE = 2, + BNXT_ULP_GENERIC_TBL_OPC_LAST = 3 +}; + enum bnxt_ulp_glb_regfile_index { BNXT_ULP_GLB_REGFILE_INDEX_NOT_USED = 0, BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 1, @@ -215,7 +251,9 @@ enum bnxt_ulp_mapper_opc { BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8, BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9, BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10, - BNXT_ULP_MAPPER_OPC_LAST = 11 + BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11, + BNXT_ULP_MAPPER_OPC_IF_HDR_BIT_THEN_CONST_ELSE_CONST = 12, + BNXT_ULP_MAPPER_OPC_LAST = 13 }; enum bnxt_ulp_mark_db_opcode { @@ -231,6 +269,13 @@ enum bnxt_ulp_match_type { BNXT_ULP_MATCH_TYPE_LAST = 2 }; +enum bnxt_ulp_mem_type_opcode { + BNXT_ULP_MEM_TYPE_OPCODE_NOP = 0, + BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT = 1, + BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT = 2, + BNXT_ULP_MEM_TYPE_OPCODE_LAST = 3 +}; + enum bnxt_ulp_priority { BNXT_ULP_PRIORITY_LEVEL_0 = 0, BNXT_ULP_PRIORITY_LEVEL_1 = 1, @@ -246,31 +291,56 @@ enum bnxt_ulp_priority { enum bnxt_ulp_regfile_index { BNXT_ULP_REGFILE_INDEX_NOT_USED = 0, - BNXT_ULP_REGFILE_INDEX_CLASS_TID = 1, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 2, - BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 3, - BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 4, - BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 5, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 6, - BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 7, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 8, - BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 9, - BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 10, - BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 11, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 12, - BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 13, - BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 14, - BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 15, - BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR = 16, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 = 17, - BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 = 18, - BNXT_ULP_REGFILE_INDEX_LAST = 19 + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 1, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 2, + BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 3, + BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 4, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 5, + BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 6, + BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 7, + BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 8, + BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 9, + BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 10, + BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11, + BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12, + BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13, + BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 14, + BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR = 15, + BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 = 16, + BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 = 17, + BNXT_ULP_REGFILE_INDEX_ACTION_REC_SIZE = 18, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_0 = 19, + BNXT_ULP_REGFILE_INDEX_L2_CNTXT_TCAM_INDEX_1 = 20, + BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_0 = 21, + BNXT_ULP_REGFILE_INDEX_PROFILE_TCAM_INDEX_1 = 22, + BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_0 = 23, + BNXT_ULP_REGFILE_INDEX_WC_TCAM_INDEX_1 = 24, + BNXT_ULP_REGFILE_INDEX_SRC_PROPERTY_PTR = 25, + BNXT_ULP_REGFILE_INDEX_GENERIC_TBL_HIT = 26, + BNXT_ULP_REGFILE_INDEX_MIRROR_PTR_0 = 27, + BNXT_ULP_REGFILE_INDEX_CLASS_TID = 28, + BNXT_ULP_REGFILE_INDEX_FID = 29, + BNXT_ULP_REGFILE_INDEX_LAST = 30 +}; + +enum bnxt_ulp_tcam_tbl_opc { + BNXT_ULP_TCAM_TBL_OPC_NOT_USED = 0, + BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE = 1, + BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE = 2, + BNXT_ULP_TCAM_TBL_OPC_LAST = 3 }; enum bnxt_ulp_search_before_alloc { BNXT_ULP_SEARCH_BEFORE_ALLOC_NO = 0, - BNXT_ULP_SEARCH_BEFORE_ALLOC_YES = 1, - BNXT_ULP_SEARCH_BEFORE_ALLOC_LAST = 2 + BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP = 1, + BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE = 2, + BNXT_ULP_SEARCH_BEFORE_ALLOC_LAST = 3 +}; + +enum bnxt_ulp_template_type { + BNXT_ULP_TEMPLATE_TYPE_CLASS = 0, + BNXT_ULP_TEMPLATE_TYPE_ACTION = 1, + BNXT_ULP_TEMPLATE_TYPE_LAST = 2 }; enum bnxt_ulp_fdb_resource_flags { @@ -300,10 +370,13 @@ enum bnxt_ulp_resource_func { BNXT_ULP_RESOURCE_FUNC_RSVD2 = 0x60, BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE = 0x80, BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE = 0x81, - BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE = 0x82, + BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE = 0x82, BNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 0x83, BNXT_ULP_RESOURCE_FUNC_IF_TABLE = 0x84, - BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85 + BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85, + BNXT_ULP_RESOURCE_FUNC_SHARED_TABLE = 0x86, + BNXT_ULP_RESOURCE_FUNC_PARENT_FLOW = 0x87, + BNXT_ULP_RESOURCE_FUNC_CHILD_FLOW = 0x88 }; enum bnxt_ulp_resource_sub_type { @@ -311,7 +384,8 @@ enum bnxt_ulp_resource_sub_type { BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL = 0, BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION = 1, BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT = 2, - BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_COUNT = 3, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC = 3, + BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_COUNT = 4, BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM = 0, BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM = 1 }; @@ -319,6 +393,10 @@ enum bnxt_ulp_resource_sub_type { enum bnxt_ulp_sym { BNXT_ULP_SYM_PKT_TYPE_IGNORE = 0, BNXT_ULP_SYM_PKT_TYPE_L2 = 0, + BNXT_ULP_SYM_PKT_TYPE_0_IGNORE = 0, + BNXT_ULP_SYM_PKT_TYPE_0_L2 = 0, + BNXT_ULP_SYM_PKT_TYPE_1_IGNORE = 0, + BNXT_ULP_SYM_PKT_TYPE_1_L2 = 0, BNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0, BNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0, BNXT_ULP_SYM_RECYCLE_CNT_ONE = 1, @@ -529,7 +607,8 @@ enum bnxt_ulp_sym { BNXT_ULP_SYM_IP_PROTO_UDP = 17, BNXT_ULP_SYM_VF_FUNC_PARIF = 15, BNXT_ULP_SYM_NO = 0, - BNXT_ULP_SYM_YES = 1 + BNXT_ULP_SYM_YES = 1, + BNXT_ULP_SYM_RECYCLE_DST = 0x800 }; enum bnxt_ulp_wh_plus { @@ -578,6 +657,7 @@ enum bnxt_ulp_act_prop_sz { BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC = 16, BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP = 4, BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN = 32, + BNXT_ULP_ACT_PROP_SZ_JUMP = 4, BNXT_ULP_ACT_PROP_SZ_LAST = 4 }; @@ -622,42 +702,43 @@ enum bnxt_ulp_act_prop_idx { BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC = 205, BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 221, BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 225, - BNXT_ULP_ACT_PROP_IDX_LAST = 257 + BNXT_ULP_ACT_PROP_IDX_JUMP = 257, + BNXT_ULP_ACT_PROP_IDX_LAST = 261 }; enum bnxt_ulp_class_hid { BNXT_ULP_CLASS_HID_0138 = 0x0138, BNXT_ULP_CLASS_HID_03f0 = 0x03f0, - BNXT_ULP_CLASS_HID_0134 = 0x0134, - BNXT_ULP_CLASS_HID_03fc = 0x03fc, BNXT_ULP_CLASS_HID_0139 = 0x0139, BNXT_ULP_CLASS_HID_03f1 = 0x03f1, BNXT_ULP_CLASS_HID_068b = 0x068b, BNXT_ULP_CLASS_HID_0143 = 0x0143, - BNXT_ULP_CLASS_HID_0135 = 0x0135, - BNXT_ULP_CLASS_HID_03fd = 0x03fd, - BNXT_ULP_CLASS_HID_0687 = 0x0687, - BNXT_ULP_CLASS_HID_014f = 0x014f, BNXT_ULP_CLASS_HID_0118 = 0x0118, BNXT_ULP_CLASS_HID_03d0 = 0x03d0, - BNXT_ULP_CLASS_HID_0114 = 0x0114, - BNXT_ULP_CLASS_HID_03dc = 0x03dc, BNXT_ULP_CLASS_HID_0119 = 0x0119, BNXT_ULP_CLASS_HID_03d1 = 0x03d1, BNXT_ULP_CLASS_HID_06ab = 0x06ab, BNXT_ULP_CLASS_HID_0163 = 0x0163, - BNXT_ULP_CLASS_HID_0115 = 0x0115, - BNXT_ULP_CLASS_HID_03dd = 0x03dd, - BNXT_ULP_CLASS_HID_06a7 = 0x06a7, - BNXT_ULP_CLASS_HID_016f = 0x016f, BNXT_ULP_CLASS_HID_0128 = 0x0128, BNXT_ULP_CLASS_HID_03e0 = 0x03e0, - BNXT_ULP_CLASS_HID_0124 = 0x0124, - BNXT_ULP_CLASS_HID_03ec = 0x03ec, BNXT_ULP_CLASS_HID_0129 = 0x0129, BNXT_ULP_CLASS_HID_03e1 = 0x03e1, BNXT_ULP_CLASS_HID_069b = 0x069b, BNXT_ULP_CLASS_HID_0153 = 0x0153, + BNXT_ULP_CLASS_HID_0134 = 0x0134, + BNXT_ULP_CLASS_HID_03fc = 0x03fc, + BNXT_ULP_CLASS_HID_0135 = 0x0135, + BNXT_ULP_CLASS_HID_03fd = 0x03fd, + BNXT_ULP_CLASS_HID_0687 = 0x0687, + BNXT_ULP_CLASS_HID_014f = 0x014f, + BNXT_ULP_CLASS_HID_0114 = 0x0114, + BNXT_ULP_CLASS_HID_03dc = 0x03dc, + BNXT_ULP_CLASS_HID_0115 = 0x0115, + BNXT_ULP_CLASS_HID_03dd = 0x03dd, + BNXT_ULP_CLASS_HID_06a7 = 0x06a7, + BNXT_ULP_CLASS_HID_016f = 0x016f, + BNXT_ULP_CLASS_HID_0124 = 0x0124, + BNXT_ULP_CLASS_HID_03ec = 0x03ec, BNXT_ULP_CLASS_HID_0125 = 0x0125, BNXT_ULP_CLASS_HID_03ed = 0x03ed, BNXT_ULP_CLASS_HID_0697 = 0x0697, @@ -726,8 +807,6 @@ enum bnxt_ulp_class_hid { BNXT_ULP_CLASS_HID_065d = 0x065d, BNXT_ULP_CLASS_HID_0623 = 0x0623, BNXT_ULP_CLASS_HID_00eb = 0x00eb, - BNXT_ULP_CLASS_HID_0768 = 0x0768, - BNXT_ULP_CLASS_HID_073c = 0x073c, BNXT_ULP_CLASS_HID_04bc = 0x04bc, BNXT_ULP_CLASS_HID_0442 = 0x0442, BNXT_ULP_CLASS_HID_050a = 0x050a, @@ -736,22 +815,62 @@ enum bnxt_ulp_class_hid { BNXT_ULP_CLASS_HID_0700 = 0x0700, BNXT_ULP_CLASS_HID_04c8 = 0x04c8, BNXT_ULP_CLASS_HID_0678 = 0x0678, - BNXT_ULP_CLASS_HID_064f = 0x064f, - BNXT_ULP_CLASS_HID_051d = 0x051d, + BNXT_ULP_CLASS_HID_061f = 0x061f, + BNXT_ULP_CLASS_HID_05ad = 0x05ad, BNXT_ULP_CLASS_HID_06a5 = 0x06a5, BNXT_ULP_CLASS_HID_0455 = 0x0455, + BNXT_ULP_CLASS_HID_05dd = 0x05dd, + BNXT_ULP_CLASS_HID_0563 = 0x0563, + BNXT_ULP_CLASS_HID_059b = 0x059b, + BNXT_ULP_CLASS_HID_070b = 0x070b, BNXT_ULP_CLASS_HID_04bd = 0x04bd, BNXT_ULP_CLASS_HID_0443 = 0x0443, BNXT_ULP_CLASS_HID_050b = 0x050b, BNXT_ULP_CLASS_HID_06bb = 0x06bb, - BNXT_ULP_CLASS_HID_050d = 0x050d, - BNXT_ULP_CLASS_HID_04d3 = 0x04d3, - BNXT_ULP_CLASS_HID_059b = 0x059b, - BNXT_ULP_CLASS_HID_070b = 0x070b, BNXT_ULP_CLASS_HID_0473 = 0x0473, BNXT_ULP_CLASS_HID_0701 = 0x0701, BNXT_ULP_CLASS_HID_04c9 = 0x04c9, BNXT_ULP_CLASS_HID_0679 = 0x0679, + BNXT_ULP_CLASS_HID_05e2 = 0x05e2, + BNXT_ULP_CLASS_HID_00b0 = 0x00b0, + BNXT_ULP_CLASS_HID_0648 = 0x0648, + BNXT_ULP_CLASS_HID_03f8 = 0x03f8, + BNXT_ULP_CLASS_HID_02ea = 0x02ea, + BNXT_ULP_CLASS_HID_05b8 = 0x05b8, + BNXT_ULP_CLASS_HID_0370 = 0x0370, + BNXT_ULP_CLASS_HID_00e0 = 0x00e0, + BNXT_ULP_CLASS_HID_0745 = 0x0745, + BNXT_ULP_CLASS_HID_0213 = 0x0213, + BNXT_ULP_CLASS_HID_031b = 0x031b, + BNXT_ULP_CLASS_HID_008b = 0x008b, + BNXT_ULP_CLASS_HID_044d = 0x044d, + BNXT_ULP_CLASS_HID_071b = 0x071b, + BNXT_ULP_CLASS_HID_0003 = 0x0003, + BNXT_ULP_CLASS_HID_05b3 = 0x05b3, + BNXT_ULP_CLASS_HID_05e3 = 0x05e3, + BNXT_ULP_CLASS_HID_00b1 = 0x00b1, + BNXT_ULP_CLASS_HID_0649 = 0x0649, + BNXT_ULP_CLASS_HID_03f9 = 0x03f9, + BNXT_ULP_CLASS_HID_02eb = 0x02eb, + BNXT_ULP_CLASS_HID_05b9 = 0x05b9, + BNXT_ULP_CLASS_HID_0371 = 0x0371, + BNXT_ULP_CLASS_HID_00e1 = 0x00e1, + BNXT_ULP_CLASS_HID_0000 = 0x0000, + BNXT_ULP_CLASS_HID_00ce = 0x00ce, + BNXT_ULP_CLASS_HID_01b6 = 0x01b6, + BNXT_ULP_CLASS_HID_0074 = 0x0074, + BNXT_ULP_CLASS_HID_00fe = 0x00fe, + BNXT_ULP_CLASS_HID_03bc = 0x03bc, + BNXT_ULP_CLASS_HID_0206 = 0x0206, + BNXT_ULP_CLASS_HID_02c4 = 0x02c4, + BNXT_ULP_CLASS_HID_055a = 0x055a, + BNXT_ULP_CLASS_HID_045a = 0x045a, + BNXT_ULP_CLASS_HID_061a = 0x061a, + BNXT_ULP_CLASS_HID_051a = 0x051a, + BNXT_ULP_CLASS_HID_074a = 0x074a, + BNXT_ULP_CLASS_HID_004e = 0x004e, + BNXT_ULP_CLASS_HID_040a = 0x040a, + BNXT_ULP_CLASS_HID_010e = 0x010e, BNXT_ULP_CLASS_HID_048b = 0x048b, BNXT_ULP_CLASS_HID_0749 = 0x0749, BNXT_ULP_CLASS_HID_05f1 = 0x05f1, @@ -770,16 +889,40 @@ enum bnxt_ulp_class_hid { BNXT_ULP_CLASS_HID_077f = 0x077f, BNXT_ULP_CLASS_HID_01e1 = 0x01e1, BNXT_ULP_CLASS_HID_0329 = 0x0329, - BNXT_ULP_CLASS_HID_01dd = 0x01dd, - BNXT_ULP_CLASS_HID_0315 = 0x0315, BNXT_ULP_CLASS_HID_01c1 = 0x01c1, BNXT_ULP_CLASS_HID_0309 = 0x0309, - BNXT_ULP_CLASS_HID_003d = 0x003d, - BNXT_ULP_CLASS_HID_02f5 = 0x02f5, BNXT_ULP_CLASS_HID_01d1 = 0x01d1, BNXT_ULP_CLASS_HID_0319 = 0x0319, + BNXT_ULP_CLASS_HID_01e2 = 0x01e2, + BNXT_ULP_CLASS_HID_032a = 0x032a, + BNXT_ULP_CLASS_HID_0650 = 0x0650, + BNXT_ULP_CLASS_HID_0198 = 0x0198, + BNXT_ULP_CLASS_HID_01c2 = 0x01c2, + BNXT_ULP_CLASS_HID_030a = 0x030a, + BNXT_ULP_CLASS_HID_0670 = 0x0670, + BNXT_ULP_CLASS_HID_01b8 = 0x01b8, + BNXT_ULP_CLASS_HID_01d2 = 0x01d2, + BNXT_ULP_CLASS_HID_031a = 0x031a, + BNXT_ULP_CLASS_HID_0660 = 0x0660, + BNXT_ULP_CLASS_HID_01a8 = 0x01a8, + BNXT_ULP_CLASS_HID_01dd = 0x01dd, + BNXT_ULP_CLASS_HID_0315 = 0x0315, + BNXT_ULP_CLASS_HID_003d = 0x003d, + BNXT_ULP_CLASS_HID_02f5 = 0x02f5, BNXT_ULP_CLASS_HID_01cd = 0x01cd, - BNXT_ULP_CLASS_HID_0305 = 0x0305 + BNXT_ULP_CLASS_HID_0305 = 0x0305, + BNXT_ULP_CLASS_HID_01de = 0x01de, + BNXT_ULP_CLASS_HID_0316 = 0x0316, + BNXT_ULP_CLASS_HID_066c = 0x066c, + BNXT_ULP_CLASS_HID_01a4 = 0x01a4, + BNXT_ULP_CLASS_HID_003e = 0x003e, + BNXT_ULP_CLASS_HID_02f6 = 0x02f6, + BNXT_ULP_CLASS_HID_078c = 0x078c, + BNXT_ULP_CLASS_HID_0044 = 0x0044, + BNXT_ULP_CLASS_HID_01ce = 0x01ce, + BNXT_ULP_CLASS_HID_0306 = 0x0306, + BNXT_ULP_CLASS_HID_067c = 0x067c, + BNXT_ULP_CLASS_HID_01b4 = 0x01b4 }; enum bnxt_ulp_act_hid { @@ -811,6 +954,7 @@ enum bnxt_ulp_act_hid { BNXT_ULP_ACT_HID_0901 = 0x0901, BNXT_ULP_ACT_HID_0121 = 0x0121, BNXT_ULP_ACT_HID_0004 = 0x0004, + BNXT_ULP_ACT_HID_0006 = 0x0006, BNXT_ULP_ACT_HID_0804 = 0x0804, BNXT_ULP_ACT_HID_0105 = 0x0105, BNXT_ULP_ACT_HID_0024 = 0x0024, @@ -853,19 +997,15 @@ enum bnxt_ulp_act_hid { BNXT_ULP_ACT_HID_040d = 0x040d, BNXT_ULP_ACT_HID_040f = 0x040f, BNXT_ULP_ACT_HID_0413 = 0x0413, - BNXT_ULP_ACT_HID_0c0d = 0x0c0d, BNXT_ULP_ACT_HID_0567 = 0x0567, BNXT_ULP_ACT_HID_0a49 = 0x0a49, BNXT_ULP_ACT_HID_050e = 0x050e, - BNXT_ULP_ACT_HID_0d0e = 0x0d0e, BNXT_ULP_ACT_HID_0668 = 0x0668, BNXT_ULP_ACT_HID_0b4a = 0x0b4a, BNXT_ULP_ACT_HID_0411 = 0x0411, BNXT_ULP_ACT_HID_056b = 0x056b, BNXT_ULP_ACT_HID_0a4d = 0x0a4d, - BNXT_ULP_ACT_HID_0c11 = 0x0c11, BNXT_ULP_ACT_HID_0512 = 0x0512, - BNXT_ULP_ACT_HID_0d12 = 0x0d12, BNXT_ULP_ACT_HID_066c = 0x066c, BNXT_ULP_ACT_HID_0b4e = 0x0b4e };