X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fhns3%2Fhns3_ethdev.h;h=0e4e4269a12fb5bab1a5df5598738d627df3420a;hb=f787952d13d20b7eceaf6d1742ea591239b63ba1;hp=608fd0c5ab119f2ca7008702016d7ad516b10ebc;hpb=116e3399c06cf408fade9fc2a88c3c783794f7ac;p=dpdk.git diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index 608fd0c5ab..0e4e4269a1 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -155,7 +155,6 @@ struct hns3_tc_queue_info { }; struct hns3_cfg { - uint8_t vmdq_vport_num; uint8_t tc_num; uint16_t tqp_desc_num; uint16_t rx_buf_len; @@ -482,6 +481,11 @@ struct hns3_hw { struct hns3_cmq cmq; struct hns3_mbx_resp_status mbx_resp; /* mailbox response */ struct hns3_mac mac; + /* + * This flag indicates dev_set_link_down() API is called, and is cleared + * by dev_set_link_up() or dev_start(). + */ + bool set_link_down; unsigned int secondary_cnt; /* Number of secondary processes init'd. */ struct hns3_tqp_stats tqp_stats; /* Include Mac stats | Rx stats | Tx stats */ @@ -489,6 +493,7 @@ struct hns3_hw { struct hns3_rx_missed_stats imissed_stats; uint64_t oerror_stats; uint32_t fw_version; + uint16_t pf_vf_if_version; /* version of communication interface */ uint16_t num_msi; uint16_t total_tqps_num; /* total task queue pairs of this PF */ @@ -630,6 +635,9 @@ struct hns3_hw { struct hns3_port_base_vlan_config port_base_vlan_cfg; pthread_mutex_t flows_lock; /* rte_flow ops lock */ + struct hns3_fdir_rule_list flow_fdir_list; /* flow fdir rule list */ + struct hns3_rss_filter_list flow_rss_list; /* flow RSS rule list */ + struct hns3_flow_mem_list flow_list; /* * PMD setup and configuration is not thread safe. Since it is not @@ -697,6 +705,8 @@ struct hns3_vtag_cfg { enum hns3_mp_req_type { HNS3_MP_REQ_START_RXTX = 1, HNS3_MP_REQ_STOP_RXTX, + HNS3_MP_REQ_START_TX, + HNS3_MP_REQ_STOP_TX, HNS3_MP_REQ_MAX }; @@ -738,7 +748,7 @@ struct hns3_ptype_table { * descriptor, it functions only when firmware report the capability of * HNS3_CAPS_RXD_ADV_LAYOUT_B and driver enabled it. */ - uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_min_aligned; + uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_aligned; }; #define HNS3_FIXED_MAX_TQP_NUM_MODE 0 @@ -783,6 +793,7 @@ struct hns3_pf { uint8_t prio_tc[HNS3_MAX_USER_PRIO]; /* TC indexed by prio */ uint16_t pause_time; bool support_fc_autoneg; /* support FC autonegotiate */ + bool support_multi_tc_pause; uint16_t wanted_umv_size; uint16_t max_umv_size; @@ -842,7 +853,7 @@ struct hns3_adapter { uint64_t dev_caps_mask; - struct hns3_ptype_table ptype_tbl __rte_cache_min_aligned; + struct hns3_ptype_table ptype_tbl __rte_cache_aligned; }; enum { @@ -863,11 +874,14 @@ enum { HNS3_DEV_SUPPORT_COPPER_B, HNS3_DEV_SUPPORT_FD_QUEUE_REGION_B, HNS3_DEV_SUPPORT_PTP_B, + HNS3_DEV_SUPPORT_TX_PUSH_B, HNS3_DEV_SUPPORT_INDEP_TXRX_B, HNS3_DEV_SUPPORT_STASH_B, HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B, HNS3_DEV_SUPPORT_RAS_IMP_B, + HNS3_DEV_SUPPORT_TM_B, + HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B, }; #define hns3_dev_dcb_supported(hw) \ @@ -901,6 +915,15 @@ enum { #define hns3_dev_ras_imp_supported(hw) \ hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RAS_IMP_B) +#define hns3_dev_tx_push_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TX_PUSH_B) + +#define hns3_dev_tm_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TM_B) + +#define hns3_dev_vf_vlan_flt_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B) + #define HNS3_DEV_PRIVATE_TO_HW(adapter) \ (&((struct hns3_adapter *)adapter)->hw) #define HNS3_DEV_PRIVATE_TO_PF(adapter) \ @@ -980,13 +1003,13 @@ static inline void hns3_write_reg(void *base, uint32_t reg, uint32_t value) } /* - * The optimized function for writing registers used in the '.rx_pkt_burst' and - * '.tx_pkt_burst' ops implementation function. + * The optimized function for writing registers reduces one address addition + * calculation, it was used in the '.rx_pkt_burst' and '.tx_pkt_burst' ops + * implementation function. */ static inline void hns3_write_reg_opt(volatile void *addr, uint32_t value) { - rte_io_wmb(); - rte_write32_relaxed(rte_cpu_to_le_32(value), addr); + rte_write32(rte_cpu_to_le_32(value), addr); } static inline uint32_t hns3_read_reg(void *base, uint32_t reg) @@ -1001,8 +1024,6 @@ static inline uint32_t hns3_read_reg(void *base, uint32_t reg) #define hns3_read_dev(a, reg) \ hns3_read_reg((a)->io_base, (reg)) -#define ARRAY_SIZE(x) RTE_DIM(x) - #define NEXT_ITEM_OF_ACTION(act, actions, index) \ do { \ act = (actions) + (index); \