X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fice%2Fice_rxtx.h;h=9e3d2cd07645db6a932f132a819752fff2131377;hb=efc1b2799f6674341322e2026698755d1dce842f;hp=088a20609d4939e636bc42a4489448d831a8bac8;hpb=50370662b727bb9d1e3cf67d5a8010de8b6b8d7b;p=dpdk.git diff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h index 088a20609d..9e3d2cd076 100644 --- a/drivers/net/ice/ice_rxtx.h +++ b/drivers/net/ice/ice_rxtx.h @@ -20,21 +20,35 @@ #define ICE_CHK_Q_ENA_INTERVAL_US 100 #ifdef RTE_LIBRTE_ICE_16BYTE_RX_DESC -#define ice_rx_desc ice_16byte_rx_desc +#define ice_rx_flex_desc ice_16b_rx_flex_desc #else -#define ice_rx_desc ice_32byte_rx_desc +#define ice_rx_flex_desc ice_32b_rx_flex_desc #endif #define ICE_SUPPORT_CHAIN_NUM 5 +#define ICE_TD_CMD ICE_TX_DESC_CMD_EOP + +#define ICE_VPMD_RX_BURST 32 +#define ICE_VPMD_TX_BURST 32 +#define ICE_RXQ_REARM_THRESH 32 +#define ICE_MAX_RX_BURST ICE_RXQ_REARM_THRESH +#define ICE_TX_MAX_FREE_BUF_SZ 64 +#define ICE_DESCS_PER_LOOP 4 + +#define ICE_FDIR_PKT_LEN 512 + +typedef void (*ice_rx_release_mbufs_t)(struct ice_rx_queue *rxq); +typedef void (*ice_tx_release_mbufs_t)(struct ice_tx_queue *txq); + struct ice_rx_entry { struct rte_mbuf *mbuf; }; struct ice_rx_queue { struct rte_mempool *mp; /* mbuf pool to populate RX ring */ - volatile union ice_rx_desc *rx_ring;/* RX ring virtual address */ - uint64_t rx_ring_phys_addr; /* RX ring DMA address */ + volatile union ice_rx_flex_desc *rx_ring;/* RX ring virtual address */ + rte_iova_t rx_ring_dma; /* RX ring DMA address */ struct ice_rx_entry *sw_ring; /* address of RX soft ring */ uint16_t nb_rx_desc; /* number of RX descriptors */ uint16_t rx_free_thresh; /* max free RX desc to hold */ @@ -42,13 +56,16 @@ struct ice_rx_queue { uint16_t nb_rx_hold; /* number of held free RX desc */ struct rte_mbuf *pkt_first_seg; /**< first segment of current packet */ struct rte_mbuf *pkt_last_seg; /**< last segment of current packet */ -#ifdef RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC uint16_t rx_nb_avail; /**< number of staged packets ready */ uint16_t rx_next_avail; /**< index of next staged packets */ uint16_t rx_free_trigger; /**< triggers rx buffer allocation */ struct rte_mbuf fake_mbuf; /**< dummy mbuf */ struct rte_mbuf *rx_stage[ICE_RX_MAX_BURST * 2]; -#endif + + uint16_t rxrearm_nb; /**< number of remaining to be re-armed */ + uint16_t rxrearm_start; /**< the idx we start the re-arming from */ + uint64_t mbuf_initializer; /**< value to init mbufs */ + uint8_t port_id; /* device port ID */ uint8_t crc_len; /* 0 if CRC stripped, 4 otherwise */ uint16_t queue_id; /* RX queue index */ @@ -61,6 +78,8 @@ struct ice_rx_queue { uint16_t max_pkt_len; /* Maximum packet length */ bool q_set; /* indicate if rx queue has been configured */ bool rx_deferred_start; /* don't start this queue in dev start */ + uint8_t proto_xtr; /* Protocol extraction from flexible descriptor */ + ice_rx_release_mbufs_t rx_rel_mbufs; }; struct ice_tx_entry { @@ -71,7 +90,7 @@ struct ice_tx_entry { struct ice_tx_queue { uint16_t nb_tx_desc; /* number of TX descriptors */ - uint64_t tx_ring_phys_addr; /* TX ring DMA address */ + rte_iova_t tx_ring_dma; /* TX ring DMA address */ volatile struct ice_tx_desc *tx_ring; /* TX ring virtual address */ struct ice_tx_entry *sw_ring; /* virtual address of SW ring */ uint16_t tx_tail; /* current value of tail register */ @@ -100,6 +119,7 @@ struct ice_tx_queue { uint16_t tx_next_rs; bool tx_deferred_start; /* don't start this queue in dev start */ bool q_set; /* indicate if tx queue has been configured */ + ice_tx_release_mbufs_t tx_rel_mbufs; }; /* Offload features */ @@ -130,8 +150,56 @@ int ice_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id); int ice_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id); int ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id); int ice_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id); +int ice_fdir_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id); +int ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id); +int ice_fdir_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id); +int ice_fdir_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id); void ice_rx_queue_release(void *rxq); void ice_tx_queue_release(void *txq); void ice_clear_queues(struct rte_eth_dev *dev); void ice_free_queues(struct rte_eth_dev *dev); +int ice_fdir_setup_tx_resources(struct ice_pf *pf); +int ice_fdir_setup_rx_resources(struct ice_pf *pf); +uint16_t ice_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); +uint16_t ice_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); +void ice_set_rx_function(struct rte_eth_dev *dev); +uint16_t ice_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); +void ice_set_tx_function_flag(struct rte_eth_dev *dev, + struct ice_tx_queue *txq); +void ice_set_tx_function(struct rte_eth_dev *dev); +uint32_t ice_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id); +void ice_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_rxq_info *qinfo); +void ice_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_txq_info *qinfo); +int ice_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_burst_mode *mode); +int ice_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_burst_mode *mode); +int ice_rx_descriptor_status(void *rx_queue, uint16_t offset); +int ice_tx_descriptor_status(void *tx_queue, uint16_t offset); +void ice_set_default_ptype_table(struct rte_eth_dev *dev); +const uint32_t *ice_dev_supported_ptypes_get(struct rte_eth_dev *dev); + +int ice_rx_vec_dev_check(struct rte_eth_dev *dev); +int ice_tx_vec_dev_check(struct rte_eth_dev *dev); +int ice_rxq_vec_setup(struct ice_rx_queue *rxq); +int ice_txq_vec_setup(struct ice_tx_queue *txq); +uint16_t ice_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); +uint16_t ice_recv_scattered_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); +uint16_t ice_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); +uint16_t ice_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); +uint16_t ice_recv_scattered_pkts_vec_avx2(void *rx_queue, + struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); +uint16_t ice_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); +int ice_fdir_programming(struct ice_pf *pf, struct ice_fltr_desc *fdir_desc); #endif /* _ICE_RXTX_H_ */