X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fmlx5%2Fmlx5_flow.h;h=43cbda87123800f056b952adba67e159e03b95c1;hb=0bf68c660e932e76087dc8c87f8b1dacba89c2be;hp=6edd1cf08915895b948f2c1f38b3d2c60594b661;hpb=0136df99a9bc9f4f7bcf4cf03a1d3759137a4295;p=dpdk.git diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 6edd1cf089..43cbda8712 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -43,6 +43,7 @@ enum mlx5_rte_flow_action_type { MLX5_RTE_FLOW_ACTION_TYPE_TAG, MLX5_RTE_FLOW_ACTION_TYPE_MARK, MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, + MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, }; /* Matches on selected register. */ @@ -199,10 +200,13 @@ enum mlx5_feature_name { #define MLX5_FLOW_ACTION_METER (1ull << 31) #define MLX5_FLOW_ACTION_SET_IPV4_DSCP (1ull << 32) #define MLX5_FLOW_ACTION_SET_IPV6_DSCP (1ull << 33) +#define MLX5_FLOW_ACTION_AGE (1ull << 34) +#define MLX5_FLOW_ACTION_DEFAULT_MISS (1ull << 35) #define MLX5_FLOW_FATE_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \ - MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP) + MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP | \ + MLX5_FLOW_ACTION_DEFAULT_MISS) #define MLX5_FLOW_FATE_ESWITCH_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \ @@ -332,6 +336,23 @@ enum mlx5_feature_name { #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \ sizeof(struct rte_flow_item_ipv4)) +/* Software header modify action numbers of a flow. */ +#define MLX5_ACT_NUM_MDF_IPV4 1 +#define MLX5_ACT_NUM_MDF_IPV6 4 +#define MLX5_ACT_NUM_MDF_MAC 2 +#define MLX5_ACT_NUM_MDF_VID 1 +#define MLX5_ACT_NUM_MDF_PORT 2 +#define MLX5_ACT_NUM_MDF_TTL 1 +#define MLX5_ACT_NUM_DEC_TTL MLX5_ACT_NUM_MDF_TTL +#define MLX5_ACT_NUM_MDF_TCPSEQ 1 +#define MLX5_ACT_NUM_MDF_TCPACK 1 +#define MLX5_ACT_NUM_SET_REG 1 +#define MLX5_ACT_NUM_SET_TAG 1 +#define MLX5_ACT_NUM_CPY_MREG MLX5_ACT_NUM_SET_TAG +#define MLX5_ACT_NUM_SET_MARK MLX5_ACT_NUM_SET_TAG +#define MLX5_ACT_NUM_SET_META MLX5_ACT_NUM_SET_TAG +#define MLX5_ACT_NUM_SET_DSCP 1 + enum mlx5_flow_drv_type { MLX5_FLOW_TYPE_MIN, MLX5_FLOW_TYPE_DV, @@ -346,6 +367,7 @@ enum mlx5_flow_fate_type { MLX5_FLOW_FATE_JUMP, MLX5_FLOW_FATE_PORT_ID, MLX5_FLOW_FATE_DROP, + MLX5_FLOW_FATE_DEFAULT_MISS, MLX5_FLOW_FATE_MAX, }; @@ -377,8 +399,8 @@ struct mlx5_flow_dv_encap_decap_resource { ILIST_ENTRY(uint32_t)next; /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ - void *verbs_action; - /**< Verbs encap/decap action object. */ + void *action; + /**< Encap/decap action object. */ uint8_t buf[MLX5_ENCAP_MAX_LEN]; size_t size; uint8_t reformat_type; @@ -391,29 +413,31 @@ struct mlx5_flow_dv_tag_resource { struct mlx5_hlist_entry entry; /**< hash list entry for tag resource, tag value as the key. */ void *action; - /**< Verbs tag action object. */ + /**< Tag action object. */ rte_atomic32_t refcnt; /**< Reference counter. */ uint32_t idx; /**< Index for the index memory pool. */ }; /* * Number of modification commands. - * If extensive metadata registers are supported, the maximal actions amount is - * 16 and 8 otherwise on root table. The validation could also be done in the - * lower driver layer. - * On non-root table, there is no limitation, but 32 is enough right now. + * The maximal actions amount in FW is some constant, and it is 16 in the + * latest releases. In some old releases, it will be limited to 8. + * Since there is no interface to query the capacity, the maximal value should + * be used to allow PMD to create the flow. The validation will be done in the + * lower driver layer or FW. A failure will be returned if exceeds the maximal + * supported actions number on the root table. + * On non-root tables, there is no limitation, but 32 is enough right now. */ #define MLX5_MAX_MODIFY_NUM 32 #define MLX5_ROOT_TBL_MODIFY_NUM 16 -#define MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG 8 /* Modify resource structure */ struct mlx5_flow_dv_modify_hdr_resource { LIST_ENTRY(mlx5_flow_dv_modify_hdr_resource) next; /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ - struct ibv_flow_action *verbs_action; - /**< Verbs modify header action object. */ + void *action; + /**< Modify header action object. */ uint8_t ft_type; /**< Flow table type, Rx or Tx. */ uint32_t actions_num; /**< Number of modification actions. */ uint64_t flags; /**< Flags for RDMA API. */ @@ -434,7 +458,7 @@ struct mlx5_flow_dv_port_id_action_resource { /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ void *action; - /**< Verbs tag action object. */ + /**< Action object. */ uint32_t port_id; /**< Port ID value. */ }; @@ -443,7 +467,7 @@ struct mlx5_flow_dv_push_vlan_action_resource { ILIST_ENTRY(uint32_t)next; /* Pointer to next element. */ rte_atomic32_t refcnt; /**< Reference counter. */ - void *action; /**< Direct verbs action object. */ + void *action; /**< Action object. */ uint8_t ft_type; /**< Flow table type, Rx, Tx or FDB. */ rte_be32_t vlan_tag; /**< VLAN tag value. */ }; @@ -514,7 +538,7 @@ struct mlx5_flow_handle { /**< Index to next device flow handle. */ uint64_t layers; /**< Bit-fields of present layers, see MLX5_FLOW_LAYER_*. */ - void *ib_flow; /**< Verbs flow pointer. */ + void *drv_flow; /**< pointer to driver flow object. */ uint32_t split_flow_id:28; /**< Sub flow unique match flow id. */ uint32_t mark:1; /**< Metadate rxq mark flag. */ uint32_t fate_action:3; /**< Fate action type. */ @@ -525,6 +549,8 @@ struct mlx5_flow_handle { /**< Index to port ID action resource. */ uint32_t rix_fate; /**< Generic value indicates the fate action. */ + uint32_t rix_default_fate; + /**< Indicates default miss fate action. */ }; #ifdef HAVE_IBV_FLOW_DV_SUPPORT struct mlx5_flow_handle_dv dvh; @@ -633,7 +659,8 @@ struct mlx5_flow_verbs_workspace { /** Device flow structure. */ struct mlx5_flow { struct rte_flow *flow; /**< Pointer to the main flow. */ - uint64_t hash_fields; /**< Verbs hash Rx queue hash fields. */ + uint32_t flow_idx; /**< The memory pool index to the main flow. */ + uint64_t hash_fields; /**< Hash Rx queue hash fields. */ uint64_t act_flags; /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */ bool external; /**< true if the flow is created external to PMD. */ @@ -709,12 +736,41 @@ struct mlx5_flow_meter { uint32_t idx; /* Index to meter object. */ uint32_t meter_id; /**< Meter id. */ - struct rte_mtr_params params; - /**< Meter rule parameters. */ struct mlx5_flow_meter_profile *profile; /**< Meter profile parameters. */ - struct rte_flow_attr attr; - /**< Flow attributes. */ + + /** Policer actions (per meter output color). */ + enum rte_mtr_policer_action action[RTE_COLORS]; + + /** Set of stats counters to be enabled. + * @see enum rte_mtr_stats_type + */ + uint64_t stats_mask; + + /**< Rule applies to ingress traffic. */ + uint32_t ingress:1; + + /**< Rule applies to egress traffic. */ + uint32_t egress:1; + /** + * Instead of simply matching the properties of traffic as it would + * appear on a given DPDK port ID, enabling this attribute transfers + * a flow rule to the lowest possible level of any device endpoints + * found in the pattern. + * + * When supported, this effectively enables an application to + * re-route traffic not necessarily intended for it (e.g. coming + * from or addressed to different physical ports, VFs or + * applications) at the device level. + * + * It complements the behavior of some pattern items such as + * RTE_FLOW_ITEM_TYPE_PHY_PORT and is meaningless without them. + * + * When transferring flow rules, ingress and egress attributes keep + * their original meaning, as if processing traffic emitted or + * received by the application. + */ + uint32_t transfer:1; struct mlx5_meter_domains_infos *mfts; /**< Flow table created for this meter. */ struct mlx5_flow_policer_stats policer_stats; @@ -783,6 +839,7 @@ typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, const struct rte_flow_item items[], const struct rte_flow_action actions[], bool external, + int hairpin, struct rte_flow_error *error); typedef struct mlx5_flow *(*mlx5_flow_prepare_t) (struct rte_eth_dev *dev, const struct rte_flow_attr *attr, @@ -826,6 +883,11 @@ typedef int (*mlx5_flow_counter_query_t)(struct rte_eth_dev *dev, uint32_t cnt, bool clear, uint64_t *pkts, uint64_t *bytes); +typedef int (*mlx5_flow_get_aged_flows_t) + (struct rte_eth_dev *dev, + void **context, + uint32_t nb_contexts, + struct rte_flow_error *error); struct mlx5_flow_driver_ops { mlx5_flow_validate_t validate; mlx5_flow_prepare_t prepare; @@ -841,14 +903,9 @@ struct mlx5_flow_driver_ops { mlx5_flow_counter_alloc_t counter_alloc; mlx5_flow_counter_free_t counter_free; mlx5_flow_counter_query_t counter_query; + mlx5_flow_get_aged_flows_t get_aged_flows; }; - -#define MLX5_CNT_CONTAINER(sh, batch, thread) (&(sh)->cmng.ccont \ - [(((sh)->cmng.mhi[batch] >> (thread)) & 0x1) * 2 + (batch)]) -#define MLX5_CNT_CONTAINER_UNUSED(sh, batch, thread) (&(sh)->cmng.ccont \ - [(~((sh)->cmng.mhi[batch] >> (thread)) & 0x1) * 2 + (batch)]) - /* mlx5_flow.c */ struct mlx5_flow_id_pool *mlx5_flow_id_pool_alloc(uint32_t max_id); @@ -895,6 +952,9 @@ int mlx5_flow_validate_action_rss(const struct rte_flow_action *action, const struct rte_flow_attr *attr, uint64_t item_flags, struct rte_flow_error *error); +int mlx5_flow_validate_action_default_miss(uint64_t action_flags, + const struct rte_flow_attr *attr, + struct rte_flow_error *error); int mlx5_flow_validate_attributes(struct rte_eth_dev *dev, const struct rte_flow_attr *attributes, struct rte_flow_error *error);