X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Focteontx%2Focteontx_ethdev.h;h=3a02824e39482d93397a712cfa4eaf21a1ae5f0f;hb=295c053f90f1c2e6bd74fc838be316545f1bc8eb;hp=186a044f7b03dc5b5c3a4cef629afb73b9174878;hpb=8b42b07eef49915468cfc9b9684cb274efa42fdd;p=dpdk.git diff --git a/drivers/net/octeontx/octeontx_ethdev.h b/drivers/net/octeontx/octeontx_ethdev.h index 186a044f7b..3a02824e39 100644 --- a/drivers/net/octeontx/octeontx_ethdev.h +++ b/drivers/net/octeontx/octeontx_ethdev.h @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include #include @@ -44,6 +44,7 @@ /* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */ #define OCCTX_L2_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \ OCCTX_MAX_VTAG_ACT_SIZE) +#define OCCTX_L2_MAX_LEN (RTE_ETHER_MTU + OCCTX_L2_OVERHEAD) /* Since HW FRS includes NPC VTAG insertion space, user has reduced FRS */ #define OCCTX_MAX_FRS \ @@ -53,13 +54,23 @@ #define OCCTX_MAX_MTU (OCCTX_MAX_FRS - OCCTX_L2_OVERHEAD) -#define OCTEONTX_RX_OFFLOADS (DEV_RX_OFFLOAD_CHECKSUM | \ - DEV_RX_OFFLOAD_SCATTER | \ - DEV_RX_OFFLOAD_JUMBO_FRAME | \ +#define OCTEONTX_RX_OFFLOADS ( \ + DEV_RX_OFFLOAD_CHECKSUM | \ + DEV_RX_OFFLOAD_SCTP_CKSUM | \ + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \ + DEV_RX_OFFLOAD_SCATTER | \ + DEV_RX_OFFLOAD_SCATTER | \ DEV_RX_OFFLOAD_VLAN_FILTER) -#define OCTEONTX_TX_OFFLOADS (DEV_TX_OFFLOAD_MT_LOCKFREE | \ - DEV_TX_OFFLOAD_MBUF_FAST_FREE | \ +#define OCTEONTX_TX_OFFLOADS ( \ + DEV_TX_OFFLOAD_MBUF_FAST_FREE | \ + DEV_TX_OFFLOAD_MT_LOCKFREE | \ + DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \ + DEV_TX_OFFLOAD_OUTER_UDP_CKSUM | \ + DEV_TX_OFFLOAD_IPV4_CKSUM | \ + DEV_TX_OFFLOAD_TCP_CKSUM | \ + DEV_TX_OFFLOAD_UDP_CKSUM | \ + DEV_TX_OFFLOAD_SCTP_CKSUM | \ DEV_TX_OFFLOAD_MULTI_SEGS) static inline struct octeontx_nic * @@ -83,6 +94,16 @@ struct octeontx_vlan_info { uint8_t filter_on; }; +struct octeontx_fc_info { + enum rte_eth_fc_mode mode; /**< Link flow control mode */ + enum rte_eth_fc_mode def_mode; + uint16_t high_water; + uint16_t low_water; + uint16_t def_highmark; + uint16_t def_lowmark; + uint32_t rx_fifosz; +}; + /* Octeontx ethdev nic */ struct octeontx_nic { struct rte_eth_dev *dev; @@ -122,6 +143,7 @@ struct octeontx_nic { uint16_t tx_offload_flags; struct octeontx_vlan_info vlan_info; int print_flag; + struct octeontx_fc_info fc; } __rte_cache_aligned; struct octeontx_txq { @@ -154,4 +176,12 @@ int octeontx_dev_vlan_filter_set(struct rte_eth_dev *dev, int octeontx_dev_set_link_up(struct rte_eth_dev *eth_dev); int octeontx_dev_set_link_down(struct rte_eth_dev *eth_dev); +/* Flow control */ +int octeontx_dev_flow_ctrl_init(struct rte_eth_dev *dev); +int octeontx_dev_flow_ctrl_fini(struct rte_eth_dev *dev); +int octeontx_dev_flow_ctrl_get(struct rte_eth_dev *dev, + struct rte_eth_fc_conf *fc_conf); +int octeontx_dev_flow_ctrl_set(struct rte_eth_dev *dev, + struct rte_eth_fc_conf *fc_conf); + #endif /* __OCTEONTX_ETHDEV_H__ */