X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fsfc%2Fbase%2Fef10_tlv_layout.h;h=33b6af095062914cd4849591f3b2773234ee29d1;hb=05fa170a2b0760295cb0af687cb1c56c1e6d06ea;hp=56cffaee39af7fe020ac72e5d72405232947610d;hpb=b8f96929b5a6fc89a22c4c16fe7aeffabd1e386d;p=dpdk.git diff --git a/drivers/net/sfc/base/ef10_tlv_layout.h b/drivers/net/sfc/base/ef10_tlv_layout.h index 56cffaee39..33b6af0950 100644 --- a/drivers/net/sfc/base/ef10_tlv_layout.h +++ b/drivers/net/sfc/base/ef10_tlv_layout.h @@ -41,6 +41,7 @@ * 2: firmware internal use * 3: license partition * 4: tsa configuration + * 5: bundle update * * - TTT is a type, which is just a unique value. The same type value * might appear in both locations, indicating a relationship between @@ -86,6 +87,30 @@ #define TLV_TAG_INVALID (0xFFFFFFFF) +/* TLV start. + * + * Marks the start of a TLV layout within a partition that may/may-not be + * a TLV partition. i.e. if a portion of data (at any offset) within a + * partition is expected to be in TLV format, then the first tag in this + * layout is expected to be TLV_TAG_START. + * + * This tag is not used in TLV layouts where the entire partition is TLV. + * Please continue using TLV_TAG_PARTITION_HEADER to indicate the start + * of TLV layout in such cases. + */ + +#define TLV_TAG_START (0xEF10BA5E) + +struct tlv_start { + uint32_t tag; + uint32_t length; + /* Length of the TLV structure following this tag - includes length of all tags + * within the TLV layout starting with this TLV_TAG_START. + * Includes TLV_TAG_END. Does not include TLV_TAG_START + */ + uint32_t tlv_layout_len; +}; + /* TLV partition header. * * In a TLV partition, this must be the first item in the sequence, at offset @@ -511,6 +536,16 @@ struct tlv_pcie_tx_amp_config { uint8_t lane_amp[16]; }; +/* Enum to select an OEM and enable additional functionality related to this OEM + * (e.g. vendor extensions to VPD, NC-SI etc.) */ +#define TLV_TAG_OEM (0x00230000) +struct tlv_oem { + uint32_t tag; + uint32_t length; + uint8_t oem; +}; +#define TLV_OEM_NONE 0 +#define TLV_OEM_DELL 1 /* Global PCIe configuration, second revision. This represents the visible PFs * by a bitmap rather than having the number of the highest visible one. As such @@ -1008,4 +1043,21 @@ struct tlv_l3xudp_ports { #define TLV_TAG_L3XUDP_PORTS_MAX_NUM_PORTS 16 }; +/* Wake on LAN setting + * + * Enables the Wake On Lan (WoL) functionality on the given port. This will be + * a persistent setting for manageability firmware. Drivers have direct access + * to WoL using MCDI. + */ +#define TLV_TAG_WAKE_ON_LAN(port) (0x102b0000 + (port)) +struct tlv_wake_on_lan { + uint32_t tag; + uint32_t length; + uint8_t mode; + uint8_t bytes[]; +#define TLV_WAKE_ON_LAN_MODE_DISABLED 0 +#define TLV_WAKE_ON_LAN_MODE_MAGIC_PACKET 1 +#define TLV_WAKE_ON_LAN_MAX_NUM_BYTES 255 +}; + #endif /* CI_MGMT_TLV_LAYOUT_H */