X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=examples%2Flink_status_interrupt%2Fmain.c;h=6adbd7936e38bca98bc80738bba3848066cab8f0;hb=ea0c20ea95fd5d71a10757e6598ac66233ea1495;hp=1a8755155d8bae349f84e7ee53b8ca9eb6adf5f8;hpb=3031749c2df04a63cdcef186dcce3781e61436e8;p=dpdk.git diff --git a/examples/link_status_interrupt/main.c b/examples/link_status_interrupt/main.c index 1a8755155d..6adbd7936e 100644 --- a/examples/link_status_interrupt/main.c +++ b/examples/link_status_interrupt/main.c @@ -51,7 +51,6 @@ #include #include #include -#include #include #include #include @@ -71,32 +70,11 @@ #include #include -#include "main.h" - #define RTE_LOGTYPE_LSI RTE_LOGTYPE_USER1 -#define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM) +#define MBUF_DATA_SIZE (2048 + RTE_PKTMBUF_HEADROOM) #define NB_MBUF 8192 -/* - * RX and TX Prefetch, Host, and Write-back threshold values should be - * carefully set for optimal performance. Consult the network - * controller's datasheet and supporting DPDK documentation for guidance - * on how these parameters should be set. - */ -#define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */ -#define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */ -#define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */ - -/* - * These default values are optimized for use with the Intel(R) 82599 10 GbE - * Controller and the DPDK ixgbe PMD. Consider using other values for other - * network controllers and/or network drivers. - */ -#define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */ -#define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */ -#define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */ - #define MAX_PKT_BURST 32 #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */ @@ -153,24 +131,6 @@ static const struct rte_eth_conf port_conf = { }, }; -static const struct rte_eth_rxconf rx_conf = { - .rx_thresh = { - .pthresh = RX_PTHRESH, - .hthresh = RX_HTHRESH, - .wthresh = RX_WTHRESH, - }, -}; - -static const struct rte_eth_txconf tx_conf = { - .tx_thresh = { - .pthresh = TX_PTHRESH, - .hthresh = TX_HTHRESH, - .wthresh = TX_WTHRESH, - }, - .tx_free_thresh = 0, /* Use PMD default values */ - .tx_rs_thresh = 0, /* Use PMD default values */ -}; - struct rte_mempool * lsi_pktmbuf_pool = NULL; /* Per-port statistics struct */ @@ -630,7 +590,7 @@ check_all_ports_link_status(uint8_t port_num, uint32_t port_mask) } int -MAIN(int argc, char **argv) +main(int argc, char **argv) { struct lcore_queue_conf *qconf; struct rte_eth_dev_info dev_info; @@ -654,18 +614,11 @@ MAIN(int argc, char **argv) /* create the mbuf pool */ lsi_pktmbuf_pool = - rte_mempool_create("mbuf_pool", NB_MBUF, - MBUF_SIZE, 32, - sizeof(struct rte_pktmbuf_pool_private), - rte_pktmbuf_pool_init, NULL, - rte_pktmbuf_init, NULL, - rte_socket_id(), 0); + rte_pktmbuf_pool_create("mbuf_pool", NB_MBUF, 32, 0, + MBUF_DATA_SIZE, rte_socket_id()); if (lsi_pktmbuf_pool == NULL) rte_panic("Cannot init mbuf pool\n"); - if (rte_eal_pci_probe() < 0) - rte_panic("Cannot probe PCI\n"); - nb_ports = rte_eth_dev_count(); if (nb_ports == 0) rte_panic("No Ethernet port - bye\n"); @@ -754,7 +707,8 @@ MAIN(int argc, char **argv) /* init one RX queue */ fflush(stdout); ret = rte_eth_rx_queue_setup(portid, 0, nb_rxd, - rte_eth_dev_socket_id(portid), &rx_conf, + rte_eth_dev_socket_id(portid), + NULL, lsi_pktmbuf_pool); if (ret < 0) rte_exit(EXIT_FAILURE, "rte_eth_rx_queue_setup: err=%d, port=%u\n", @@ -763,7 +717,8 @@ MAIN(int argc, char **argv) /* init one TX queue logical core on each port */ fflush(stdout); ret = rte_eth_tx_queue_setup(portid, 0, nb_txd, - rte_eth_dev_socket_id(portid), &tx_conf); + rte_eth_dev_socket_id(portid), + NULL); if (ret < 0) rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d,port=%u\n", ret, (unsigned) portid);