X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=lib%2Flibrte_acl%2Frte_acl.c;h=fd5bd5e4ee9a2b09f4693d4c2fff897b5c6ea415;hb=500e70b90c05c267d53963c757c3b1f66908b2fa;hp=129a41f9b92b735874021043b505a2193faaf86c;hpb=dc276b5780c29a86c537774b6f7b91379ee0690d;p=dpdk.git

diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c
index 129a41f9b9..fd5bd5e4ee 100644
--- a/lib/librte_acl/rte_acl.c
+++ b/lib/librte_acl/rte_acl.c
@@ -1,78 +1,206 @@
-/*-
- *   BSD LICENSE
- *
- *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
- *   All rights reserved.
- *
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- *
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in
- *       the documentation and/or other materials provided with the
- *       distribution.
- *     * Neither the name of Intel Corporation nor the names of its
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <rte_string_fns.h>
 #include <rte_acl.h>
 #include "acl.h"
 
-#define	BIT_SIZEOF(x)	(sizeof(x) * CHAR_BIT)
+TAILQ_HEAD(rte_acl_list, rte_tailq_entry);
 
-TAILQ_HEAD(rte_acl_list, rte_acl_ctx);
+static struct rte_tailq_elem rte_acl_tailq = {
+	.name = "RTE_ACL",
+};
+EAL_REGISTER_TAILQ(rte_acl_tailq)
+
+#ifndef RTE_ARCH_X86
+#ifndef CC_AVX2_SUPPORT
+/*
+ * If the compiler doesn't support AVX2 instructions,
+ * then the dummy one would be used instead for AVX2 classify method.
+ */
+int
+rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
+	__rte_unused const uint8_t **data,
+	__rte_unused uint32_t *results,
+	__rte_unused uint32_t num,
+	__rte_unused uint32_t categories)
+{
+	return -ENOTSUP;
+}
+#endif
+
+int
+rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
+	__rte_unused const uint8_t **data,
+	__rte_unused uint32_t *results,
+	__rte_unused uint32_t num,
+	__rte_unused uint32_t categories)
+{
+	return -ENOTSUP;
+}
+#endif
+
+#ifndef RTE_ARCH_ARM
+#ifndef RTE_ARCH_ARM64
+int
+rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
+	__rte_unused const uint8_t **data,
+	__rte_unused uint32_t *results,
+	__rte_unused uint32_t num,
+	__rte_unused uint32_t categories)
+{
+	return -ENOTSUP;
+}
+#endif
+#endif
+
+#ifndef RTE_ARCH_PPC_64
+int
+rte_acl_classify_altivec(__rte_unused const struct rte_acl_ctx *ctx,
+	__rte_unused const uint8_t **data,
+	__rte_unused uint32_t *results,
+	__rte_unused uint32_t num,
+	__rte_unused uint32_t categories)
+{
+	return -ENOTSUP;
+}
+#endif
+
+static const rte_acl_classify_t classify_fns[] = {
+	[RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
+	[RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
+	[RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
+	[RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
+	[RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
+	[RTE_ACL_CLASSIFY_ALTIVEC] = rte_acl_classify_altivec,
+};
+
+/* by default, use always available scalar code path. */
+static enum rte_acl_classify_alg rte_acl_default_classify =
+	RTE_ACL_CLASSIFY_SCALAR;
+
+static void
+rte_acl_set_default_classify(enum rte_acl_classify_alg alg)
+{
+	rte_acl_default_classify = alg;
+}
+
+extern int
+rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx, enum rte_acl_classify_alg alg)
+{
+	if (ctx == NULL || (uint32_t)alg >= RTE_DIM(classify_fns))
+		return -EINVAL;
+
+	ctx->alg = alg;
+	return 0;
+}
+
+/*
+ * Select highest available classify method as default one.
+ * Note that CLASSIFY_AVX2 should be set as a default only
+ * if both conditions are met:
+ * at build time compiler supports AVX2 and target cpu supports AVX2.
+ */
+RTE_INIT(rte_acl_init)
+{
+	enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
+
+#if defined(RTE_ARCH_ARM64)
+	alg =  RTE_ACL_CLASSIFY_NEON;
+#elif defined(RTE_ARCH_ARM)
+	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
+		alg =  RTE_ACL_CLASSIFY_NEON;
+#elif defined(RTE_ARCH_PPC_64)
+	alg = RTE_ACL_CLASSIFY_ALTIVEC;
+#else
+#ifdef CC_AVX2_SUPPORT
+	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
+		alg = RTE_ACL_CLASSIFY_AVX2;
+	else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
+#else
+	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
+#endif
+		alg = RTE_ACL_CLASSIFY_SSE;
+
+#endif
+	rte_acl_set_default_classify(alg);
+}
+
+int
+rte_acl_classify_alg(const struct rte_acl_ctx *ctx, const uint8_t **data,
+	uint32_t *results, uint32_t num, uint32_t categories,
+	enum rte_acl_classify_alg alg)
+{
+	if (categories != 1 &&
+			((RTE_ACL_RESULTS_MULTIPLIER - 1) & categories) != 0)
+		return -EINVAL;
+
+	return classify_fns[alg](ctx, data, results, num, categories);
+}
+
+int
+rte_acl_classify(const struct rte_acl_ctx *ctx, const uint8_t **data,
+	uint32_t *results, uint32_t num, uint32_t categories)
+{
+	return rte_acl_classify_alg(ctx, data, results, num, categories,
+		ctx->alg);
+}
 
 struct rte_acl_ctx *
 rte_acl_find_existing(const char *name)
 {
-	struct rte_acl_ctx *ctx;
+	struct rte_acl_ctx *ctx = NULL;
 	struct rte_acl_list *acl_list;
+	struct rte_tailq_entry *te;
 
-	/* check that we have an initialised tail queue */
-	acl_list = RTE_TAILQ_LOOKUP_BY_IDX(RTE_TAILQ_ACL, rte_acl_list);
-	if (acl_list == NULL) {
-		rte_errno = E_RTE_NO_TAILQ;
-		return NULL;
-	}
+	acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
 
 	rte_rwlock_read_lock(RTE_EAL_TAILQ_RWLOCK);
-	TAILQ_FOREACH(ctx, acl_list, next) {
+	TAILQ_FOREACH(te, acl_list, next) {
+		ctx = (struct rte_acl_ctx *) te->data;
 		if (strncmp(name, ctx->name, sizeof(ctx->name)) == 0)
 			break;
 	}
 	rte_rwlock_read_unlock(RTE_EAL_TAILQ_RWLOCK);
 
-	if (ctx == NULL)
+	if (te == NULL) {
 		rte_errno = ENOENT;
+		return NULL;
+	}
 	return ctx;
 }
 
 void
 rte_acl_free(struct rte_acl_ctx *ctx)
 {
+	struct rte_acl_list *acl_list;
+	struct rte_tailq_entry *te;
+
 	if (ctx == NULL)
 		return;
 
-	RTE_EAL_TAILQ_REMOVE(RTE_TAILQ_ACL, rte_acl_list, ctx);
+	acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
+
+	rte_rwlock_write_lock(RTE_EAL_TAILQ_RWLOCK);
+
+	/* find our tailq entry */
+	TAILQ_FOREACH(te, acl_list, next) {
+		if (te->data == (void *) ctx)
+			break;
+	}
+	if (te == NULL) {
+		rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
+		return;
+	}
+
+	TAILQ_REMOVE(acl_list, te, next);
+
+	rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
 
 	rte_free(ctx->mem);
 	rte_free(ctx);
+	rte_free(te);
 }
 
 struct rte_acl_ctx *
@@ -81,14 +209,10 @@ rte_acl_create(const struct rte_acl_param *param)
 	size_t sz;
 	struct rte_acl_ctx *ctx;
 	struct rte_acl_list *acl_list;
+	struct rte_tailq_entry *te;
 	char name[sizeof(ctx->name)];
 
-	/* check that we have an initialised tail queue */
-	acl_list = RTE_TAILQ_LOOKUP_BY_IDX(RTE_TAILQ_ACL, rte_acl_list);
-	if (acl_list == NULL) {
-		rte_errno = E_RTE_NO_TAILQ;
-		return NULL;
-	}
+	acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
 
 	/* check that input parameters are valid. */
 	if (param == NULL || param->name == NULL) {
@@ -96,7 +220,7 @@ rte_acl_create(const struct rte_acl_param *param)
 		return NULL;
 	}
 
-	rte_snprintf(name, sizeof(name), "ACL_%s", param->name);
+	snprintf(name, sizeof(name), "ACL_%s", param->name);
 
 	/* calculate amount of memory required for pattern set. */
 	sz = sizeof(*ctx) + param->max_rule_num * param->rule_size;
@@ -105,30 +229,45 @@ rte_acl_create(const struct rte_acl_param *param)
 	rte_rwlock_write_lock(RTE_EAL_TAILQ_RWLOCK);
 
 	/* if we already have one with that name */
-	TAILQ_FOREACH(ctx, acl_list, next) {
+	TAILQ_FOREACH(te, acl_list, next) {
+		ctx = (struct rte_acl_ctx *) te->data;
 		if (strncmp(param->name, ctx->name, sizeof(ctx->name)) == 0)
 			break;
 	}
 
 	/* if ACL with such name doesn't exist, then create a new one. */
-	if (ctx == NULL && (ctx = rte_zmalloc_socket(name, sz, CACHE_LINE_SIZE,
-			param->socket_id)) != NULL) {
+	if (te == NULL) {
+		ctx = NULL;
+		te = rte_zmalloc("ACL_TAILQ_ENTRY", sizeof(*te), 0);
+
+		if (te == NULL) {
+			RTE_LOG(ERR, ACL, "Cannot allocate tailq entry!\n");
+			goto exit;
+		}
+
+		ctx = rte_zmalloc_socket(name, sz, RTE_CACHE_LINE_SIZE, param->socket_id);
 
+		if (ctx == NULL) {
+			RTE_LOG(ERR, ACL,
+				"allocation of %zu bytes on socket %d for %s failed\n",
+				sz, param->socket_id, name);
+			rte_free(te);
+			goto exit;
+		}
 		/* init new allocated context. */
 		ctx->rules = ctx + 1;
 		ctx->max_rules = param->max_rule_num;
 		ctx->rule_sz = param->rule_size;
 		ctx->socket_id = param->socket_id;
-		rte_snprintf(ctx->name, sizeof(ctx->name), "%s", param->name);
+		ctx->alg = rte_acl_default_classify;
+		strlcpy(ctx->name, param->name, sizeof(ctx->name));
 
-		TAILQ_INSERT_TAIL(acl_list, ctx, next);
+		te->data = (void *) ctx;
 
-	} else if (ctx == NULL) {
-		RTE_LOG(ERR, ACL,
-			"allocation of %zu bytes on socket %d for %s failed\n",
-			sz, param->socket_id, name);
+		TAILQ_INSERT_TAIL(acl_list, te, next);
 	}
 
+exit:
 	rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
 	return ctx;
 }
@@ -152,10 +291,10 @@ acl_add_rules(struct rte_acl_ctx *ctx, const void *rules, uint32_t num)
 static int
 acl_check_rule(const struct rte_acl_rule_data *rd)
 {
-	if ((rd->category_mask & LEN2MASK(RTE_ACL_MAX_CATEGORIES)) == 0 ||
+	if ((RTE_LEN2MASK(RTE_ACL_MAX_CATEGORIES, typeof(rd->category_mask)) &
+			rd->category_mask) == 0 ||
 			rd->priority > RTE_ACL_MAX_PRIORITY ||
-			rd->priority < RTE_ACL_MIN_PRIORITY ||
-			rd->userdata == RTE_ACL_INVALID_USERDATA)
+			rd->priority < RTE_ACL_MIN_PRIORITY)
 		return -EINVAL;
 	return 0;
 }
@@ -217,6 +356,8 @@ rte_acl_dump(const struct rte_acl_ctx *ctx)
 	if (!ctx)
 		return;
 	printf("acl context <%s>@%p\n", ctx->name, ctx);
+	printf("  socket_id=%"PRId32"\n", ctx->socket_id);
+	printf("  alg=%"PRId32"\n", ctx->alg);
 	printf("  max_rules=%"PRIu32"\n", ctx->max_rules);
 	printf("  rule_size=%"PRIu32"\n", ctx->rule_sz);
 	printf("  num_rules=%"PRIu32"\n", ctx->num_rules);
@@ -232,184 +373,14 @@ rte_acl_list_dump(void)
 {
 	struct rte_acl_ctx *ctx;
 	struct rte_acl_list *acl_list;
+	struct rte_tailq_entry *te;
 
-	/* check that we have an initialised tail queue */
-	acl_list = RTE_TAILQ_LOOKUP_BY_IDX(RTE_TAILQ_ACL, rte_acl_list);
-	if (acl_list == NULL) {
-		rte_errno = E_RTE_NO_TAILQ;
-		return;
-	}
+	acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
 
 	rte_rwlock_read_lock(RTE_EAL_TAILQ_RWLOCK);
-	TAILQ_FOREACH(ctx, acl_list, next) {
+	TAILQ_FOREACH(te, acl_list, next) {
+		ctx = (struct rte_acl_ctx *) te->data;
 		rte_acl_dump(ctx);
 	}
 	rte_rwlock_read_unlock(RTE_EAL_TAILQ_RWLOCK);
 }
-
-/*
- * Support for legacy ipv4vlan rules.
- */
-
-RTE_ACL_RULE_DEF(acl_ipv4vlan_rule, RTE_ACL_IPV4VLAN_NUM_FIELDS);
-
-static int
-acl_ipv4vlan_check_rule(const struct rte_acl_ipv4vlan_rule *rule)
-{
-	if (rule->src_port_low > rule->src_port_high ||
-			rule->dst_port_low > rule->dst_port_high ||
-			rule->src_mask_len > BIT_SIZEOF(rule->src_addr) ||
-			rule->dst_mask_len > BIT_SIZEOF(rule->dst_addr))
-		return -EINVAL;
-
-	return acl_check_rule(&rule->data);
-}
-
-static void
-acl_ipv4vlan_convert_rule(const struct rte_acl_ipv4vlan_rule *ri,
-	struct acl_ipv4vlan_rule *ro)
-{
-	ro->data = ri->data;
-
-	ro->field[RTE_ACL_IPV4VLAN_PROTO_FIELD].value.u8 = ri->proto;
-	ro->field[RTE_ACL_IPV4VLAN_VLAN1_FIELD].value.u16 = ri->vlan;
-	ro->field[RTE_ACL_IPV4VLAN_VLAN2_FIELD].value.u16 = ri->domain;
-	ro->field[RTE_ACL_IPV4VLAN_SRC_FIELD].value.u32 = ri->src_addr;
-	ro->field[RTE_ACL_IPV4VLAN_DST_FIELD].value.u32 = ri->dst_addr;
-	ro->field[RTE_ACL_IPV4VLAN_SRCP_FIELD].value.u16 = ri->src_port_low;
-	ro->field[RTE_ACL_IPV4VLAN_DSTP_FIELD].value.u16 = ri->dst_port_low;
-
-	ro->field[RTE_ACL_IPV4VLAN_PROTO_FIELD].mask_range.u8 = ri->proto_mask;
-	ro->field[RTE_ACL_IPV4VLAN_VLAN1_FIELD].mask_range.u16 = ri->vlan_mask;
-	ro->field[RTE_ACL_IPV4VLAN_VLAN2_FIELD].mask_range.u16 =
-		ri->domain_mask;
-	ro->field[RTE_ACL_IPV4VLAN_SRC_FIELD].mask_range.u32 =
-		ri->src_mask_len;
-	ro->field[RTE_ACL_IPV4VLAN_DST_FIELD].mask_range.u32 = ri->dst_mask_len;
-	ro->field[RTE_ACL_IPV4VLAN_SRCP_FIELD].mask_range.u16 =
-		ri->src_port_high;
-	ro->field[RTE_ACL_IPV4VLAN_DSTP_FIELD].mask_range.u16 =
-		ri->dst_port_high;
-}
-
-int
-rte_acl_ipv4vlan_add_rules(struct rte_acl_ctx *ctx,
-	const struct rte_acl_ipv4vlan_rule *rules,
-	uint32_t num)
-{
-	int32_t rc;
-	uint32_t i;
-	struct acl_ipv4vlan_rule rv;
-
-	if (ctx == NULL || rules == NULL || ctx->rule_sz != sizeof(rv))
-		return -EINVAL;
-
-	/* check input rules. */
-	for (i = 0; i != num; i++) {
-		rc = acl_ipv4vlan_check_rule(rules + i);
-		if (rc != 0) {
-			RTE_LOG(ERR, ACL, "%s(%s): rule #%u is invalid\n",
-				__func__, ctx->name, i + 1);
-			return rc;
-		}
-	}
-
-	if (num + ctx->num_rules > ctx->max_rules)
-		return -ENOMEM;
-
-	/* perform conversion to the internal format and add to the context. */
-	for (i = 0, rc = 0; i != num && rc == 0; i++) {
-		acl_ipv4vlan_convert_rule(rules + i, &rv);
-		rc = acl_add_rules(ctx, &rv, 1);
-	}
-
-	return rc;
-}
-
-static void
-acl_ipv4vlan_config(struct rte_acl_config *cfg,
-	const uint32_t layout[RTE_ACL_IPV4VLAN_NUM],
-	uint32_t num_categories)
-{
-	static const struct rte_acl_field_def
-		ipv4_defs[RTE_ACL_IPV4VLAN_NUM_FIELDS] = {
-		{
-			.type = RTE_ACL_FIELD_TYPE_BITMASK,
-			.size = sizeof(uint8_t),
-			.field_index = RTE_ACL_IPV4VLAN_PROTO_FIELD,
-			.input_index = RTE_ACL_IPV4VLAN_PROTO,
-		},
-		{
-			.type = RTE_ACL_FIELD_TYPE_BITMASK,
-			.size = sizeof(uint16_t),
-			.field_index = RTE_ACL_IPV4VLAN_VLAN1_FIELD,
-			.input_index = RTE_ACL_IPV4VLAN_VLAN,
-		},
-		{
-			.type = RTE_ACL_FIELD_TYPE_BITMASK,
-			.size = sizeof(uint16_t),
-			.field_index = RTE_ACL_IPV4VLAN_VLAN2_FIELD,
-			.input_index = RTE_ACL_IPV4VLAN_VLAN,
-		},
-		{
-			.type = RTE_ACL_FIELD_TYPE_MASK,
-			.size = sizeof(uint32_t),
-			.field_index = RTE_ACL_IPV4VLAN_SRC_FIELD,
-			.input_index = RTE_ACL_IPV4VLAN_SRC,
-		},
-		{
-			.type = RTE_ACL_FIELD_TYPE_MASK,
-			.size = sizeof(uint32_t),
-			.field_index = RTE_ACL_IPV4VLAN_DST_FIELD,
-			.input_index = RTE_ACL_IPV4VLAN_DST,
-		},
-		{
-			.type = RTE_ACL_FIELD_TYPE_RANGE,
-			.size = sizeof(uint16_t),
-			.field_index = RTE_ACL_IPV4VLAN_SRCP_FIELD,
-			.input_index = RTE_ACL_IPV4VLAN_PORTS,
-		},
-		{
-			.type = RTE_ACL_FIELD_TYPE_RANGE,
-			.size = sizeof(uint16_t),
-			.field_index = RTE_ACL_IPV4VLAN_DSTP_FIELD,
-			.input_index = RTE_ACL_IPV4VLAN_PORTS,
-		},
-	};
-
-	memcpy(&cfg->defs, ipv4_defs, sizeof(ipv4_defs));
-	cfg->num_fields = RTE_DIM(ipv4_defs);
-
-	cfg->defs[RTE_ACL_IPV4VLAN_PROTO_FIELD].offset =
-		layout[RTE_ACL_IPV4VLAN_PROTO];
-	cfg->defs[RTE_ACL_IPV4VLAN_VLAN1_FIELD].offset =
-		layout[RTE_ACL_IPV4VLAN_VLAN];
-	cfg->defs[RTE_ACL_IPV4VLAN_VLAN2_FIELD].offset =
-		layout[RTE_ACL_IPV4VLAN_VLAN] +
-		cfg->defs[RTE_ACL_IPV4VLAN_VLAN1_FIELD].size;
-	cfg->defs[RTE_ACL_IPV4VLAN_SRC_FIELD].offset =
-		layout[RTE_ACL_IPV4VLAN_SRC];
-	cfg->defs[RTE_ACL_IPV4VLAN_DST_FIELD].offset =
-		layout[RTE_ACL_IPV4VLAN_DST];
-	cfg->defs[RTE_ACL_IPV4VLAN_SRCP_FIELD].offset =
-		layout[RTE_ACL_IPV4VLAN_PORTS];
-	cfg->defs[RTE_ACL_IPV4VLAN_DSTP_FIELD].offset =
-		layout[RTE_ACL_IPV4VLAN_PORTS] +
-		cfg->defs[RTE_ACL_IPV4VLAN_SRCP_FIELD].size;
-
-	cfg->num_categories = num_categories;
-}
-
-int
-rte_acl_ipv4vlan_build(struct rte_acl_ctx *ctx,
-	const uint32_t layout[RTE_ACL_IPV4VLAN_NUM],
-	uint32_t num_categories)
-{
-	struct rte_acl_config cfg;
-
-	if (ctx == NULL || layout == NULL)
-		return -EINVAL;
-
-	acl_ipv4vlan_config(&cfg, layout, num_categories);
-	return rte_acl_build(ctx, &cfg);
-}