X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=app%2Ftest-bbdev%2Ftest_bbdev_perf.c;h=45c0d62acabc416e61d36113e919c1781f5ee394;hb=9e17ffb84b970ca8b19f0c1846720a6d66322225;hp=c45cdd2600b47ac4d9c2c21b3e7cac14d0537df9;hpb=f162c47533ed4a5150a5f4d2d0c026e7fb258e44;p=dpdk.git

diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c
index c45cdd2600..45c0d62aca 100644
--- a/app/test-bbdev/test_bbdev_perf.c
+++ b/app/test-bbdev/test_bbdev_perf.c
@@ -39,6 +39,19 @@
 #define FLR_4G_TIMEOUT 610
 #endif
 
+#ifdef RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC
+#include <rte_pmd_fpga_5gnr_fec.h>
+#define FPGA_5GNR_PF_DRIVER_NAME ("intel_fpga_5gnr_fec_pf")
+#define FPGA_5GNR_VF_DRIVER_NAME ("intel_fpga_5gnr_fec_vf")
+#define VF_UL_5G_QUEUE_VALUE 4
+#define VF_DL_5G_QUEUE_VALUE 4
+#define UL_5G_BANDWIDTH 3
+#define DL_5G_BANDWIDTH 3
+#define UL_5G_LOAD_BALANCE 128
+#define DL_5G_LOAD_BALANCE 128
+#define FLR_5G_TIMEOUT 610
+#endif
+
 #define OPS_CACHE_SIZE 256U
 #define OPS_POOL_SIZE_MIN 511U /* 0.5K per queue */
 
@@ -595,6 +608,50 @@ add_bbdev_dev(uint8_t dev_id, struct rte_bbdev_info *info,
 				"Failed to configure 4G FPGA PF for bbdev %s",
 				info->dev_name);
 	}
+#endif
+#ifdef RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC
+	if ((get_init_device() == true) &&
+		(!strcmp(info->drv.driver_name, FPGA_5GNR_PF_DRIVER_NAME))) {
+		struct fpga_5gnr_fec_conf conf;
+		unsigned int i;
+
+		printf("Configure FPGA 5GNR FEC Driver %s with default values\n",
+				info->drv.driver_name);
+
+		/* clear default configuration before initialization */
+		memset(&conf, 0, sizeof(struct fpga_5gnr_fec_conf));
+
+		/* Set PF mode :
+		 * true if PF is used for data plane
+		 * false for VFs
+		 */
+		conf.pf_mode_en = true;
+
+		for (i = 0; i < FPGA_5GNR_FEC_NUM_VFS; ++i) {
+			/* Number of UL queues per VF (fpga supports 8 VFs) */
+			conf.vf_ul_queues_number[i] = VF_UL_5G_QUEUE_VALUE;
+			/* Number of DL queues per VF (fpga supports 8 VFs) */
+			conf.vf_dl_queues_number[i] = VF_DL_5G_QUEUE_VALUE;
+		}
+
+		/* UL bandwidth. Needed for schedule algorithm */
+		conf.ul_bandwidth = UL_5G_BANDWIDTH;
+		/* DL bandwidth */
+		conf.dl_bandwidth = DL_5G_BANDWIDTH;
+
+		/* UL & DL load Balance Factor to 64 */
+		conf.ul_load_balance = UL_5G_LOAD_BALANCE;
+		conf.dl_load_balance = DL_5G_LOAD_BALANCE;
+
+		/**< FLR timeout value */
+		conf.flr_time_out = FLR_5G_TIMEOUT;
+
+		/* setup FPGA PF with configuration information */
+		ret = fpga_5gnr_fec_configure(info->dev_name, &conf);
+		TEST_ASSERT_SUCCESS(ret,
+				"Failed to configure 5G FPGA PF for bbdev %s",
+				info->dev_name);
+	}
 #endif
 	nb_queues = RTE_MIN(rte_lcore_count(), info->drv.max_num_queues);
 	nb_queues = RTE_MIN(nb_queues, (unsigned int) MAX_QUEUES);
@@ -4643,7 +4700,7 @@ static int
 offload_latency_empty_q_test_dec(uint16_t dev_id, uint16_t queue_id,
 		const uint16_t num_to_process, uint16_t burst_sz,
 		uint64_t *deq_total_time, uint64_t *deq_min_time,
-		uint64_t *deq_max_time)
+		uint64_t *deq_max_time, const enum rte_bbdev_op_type op_type)
 {
 	int i, deq_total;
 	struct rte_bbdev_dec_op *ops[MAX_BURST];
@@ -4657,7 +4714,12 @@ offload_latency_empty_q_test_dec(uint16_t dev_id, uint16_t queue_id,
 
 		if (unlikely(num_to_process - deq_total < burst_sz))
 			burst_sz = num_to_process - deq_total;
-		rte_bbdev_dequeue_dec_ops(dev_id, queue_id, ops, burst_sz);
+		if (op_type == RTE_BBDEV_OP_LDPC_DEC)
+			rte_bbdev_dequeue_ldpc_dec_ops(dev_id, queue_id, ops,
+					burst_sz);
+		else
+			rte_bbdev_dequeue_dec_ops(dev_id, queue_id, ops,
+					burst_sz);
 
 		deq_last_time = rte_rdtsc_precise() - deq_start_time;
 		*deq_max_time = RTE_MAX(*deq_max_time, deq_last_time);
@@ -4672,7 +4734,7 @@ static int
 offload_latency_empty_q_test_enc(uint16_t dev_id, uint16_t queue_id,
 		const uint16_t num_to_process, uint16_t burst_sz,
 		uint64_t *deq_total_time, uint64_t *deq_min_time,
-		uint64_t *deq_max_time)
+		uint64_t *deq_max_time, const enum rte_bbdev_op_type op_type)
 {
 	int i, deq_total;
 	struct rte_bbdev_enc_op *ops[MAX_BURST];
@@ -4685,7 +4747,12 @@ offload_latency_empty_q_test_enc(uint16_t dev_id, uint16_t queue_id,
 
 		if (unlikely(num_to_process - deq_total < burst_sz))
 			burst_sz = num_to_process - deq_total;
-		rte_bbdev_dequeue_enc_ops(dev_id, queue_id, ops, burst_sz);
+		if (op_type == RTE_BBDEV_OP_LDPC_ENC)
+			rte_bbdev_dequeue_ldpc_enc_ops(dev_id, queue_id, ops,
+					burst_sz);
+		else
+			rte_bbdev_dequeue_enc_ops(dev_id, queue_id, ops,
+					burst_sz);
 
 		deq_last_time = rte_rdtsc_precise() - deq_start_time;
 		*deq_max_time = RTE_MAX(*deq_max_time, deq_last_time);
@@ -4695,6 +4762,7 @@ offload_latency_empty_q_test_enc(uint16_t dev_id, uint16_t queue_id,
 
 	return i;
 }
+
 #endif
 
 static int
@@ -4732,14 +4800,15 @@ offload_latency_empty_q_test(struct active_device *ad,
 	printf("== test: offload latency empty dequeue\ndev: %s, burst size: %u, num ops: %u, op type: %s\n",
 			info.dev_name, burst_sz, num_to_process, op_type_str);
 
-	if (op_type == RTE_BBDEV_OP_TURBO_DEC)
+	if (op_type == RTE_BBDEV_OP_TURBO_DEC ||
+			op_type == RTE_BBDEV_OP_LDPC_DEC)
 		iter = offload_latency_empty_q_test_dec(ad->dev_id, queue_id,
 				num_to_process, burst_sz, &deq_total_time,
-				&deq_min_time, &deq_max_time);
+				&deq_min_time, &deq_max_time, op_type);
 	else
 		iter = offload_latency_empty_q_test_enc(ad->dev_id, queue_id,
 				num_to_process, burst_sz, &deq_total_time,
-				&deq_min_time, &deq_max_time);
+				&deq_min_time, &deq_max_time, op_type);
 
 	if (iter <= 0)
 		return TEST_FAILED;