X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=app%2Ftest-compress-perf%2Fcomp_perf_options.h;h=0b777521c5ebcb89725b2598b2a6e6cf420668e4;hb=c17af95a19e30c8d89eb96ceca99f60474ca2ac4;hp=7516ea0ec2867e340ea904fc45808ce398011c2e;hpb=e0b6287c035d9bc5f5ee1be84b521bfcd8cd383b;p=dpdk.git

diff --git a/app/test-compress-perf/comp_perf_options.h b/app/test-compress-perf/comp_perf_options.h
index 7516ea0ec2..0b777521c5 100644
--- a/app/test-compress-perf/comp_perf_options.h
+++ b/app/test-compress-perf/comp_perf_options.h
@@ -2,9 +2,32 @@
  * Copyright(c) 2018 Intel Corporation
  */
 
-#define MAX_DRIVER_NAME		64
-#define MAX_INPUT_FILE_NAME	64
+#ifndef _COMP_PERF_OPS_
+#define _COMP_PERF_OPS_
+
 #define MAX_LIST		32
+#define MIN_COMPRESSED_BUF_SIZE 8
+#define EXPANSE_RATIO 1.1
+#define MAX_MBUF_DATA_SIZE (UINT16_MAX - RTE_PKTMBUF_HEADROOM)
+#define MAX_SEG_SIZE ((int)(MAX_MBUF_DATA_SIZE / EXPANSE_RATIO))
+
+extern const char *comp_perf_test_type_strs[];
+
+/* Cleanup state machine */
+enum cleanup_st {
+	ST_CLEAR = 0,
+	ST_TEST_DATA,
+	ST_COMPDEV,
+	ST_INPUT_DATA,
+	ST_MEMORY_ALLOC,
+	ST_DURING_TEST
+};
+
+enum cperf_test_type {
+	CPERF_TEST_TYPE_THROUGHPUT,
+	CPERF_TEST_TYPE_VERIFY,
+	CPERF_TEST_TYPE_PMDCC
+};
 
 enum comp_operation {
 	COMPRESS_ONLY,
@@ -21,31 +44,33 @@ struct range_list {
 };
 
 struct comp_test_data {
-	char driver_name[64];
-	char input_file[64];
-	struct rte_mbuf **comp_bufs;
-	struct rte_mbuf **decomp_bufs;
-	uint32_t total_bufs;
+	char driver_name[RTE_DEV_NAME_MAX_LEN];
+	char input_file[PATH_MAX];
+	enum cperf_test_type test;
+
 	uint8_t *input_data;
 	size_t input_data_sz;
-	uint8_t *compressed_data;
-	uint8_t *decompressed_data;
-	struct rte_mempool *comp_buf_pool;
-	struct rte_mempool *decomp_buf_pool;
-	struct rte_mempool *op_pool;
-	int8_t cdev_id;
+	uint16_t nb_qps;
 	uint16_t seg_sz;
+	uint16_t out_seg_sz;
 	uint16_t burst_sz;
 	uint32_t pool_sz;
 	uint32_t num_iter;
 	uint16_t max_sgl_segs;
+	uint32_t total_segs;
+
 	enum rte_comp_huffman huffman_enc;
 	enum comp_operation test_op;
 	int window_sz;
-	struct range_list level;
-	/* Store TSC duration for all levels (including level 0) */
-	uint64_t comp_tsc_duration[RTE_COMP_LEVEL_MAX + 1];
-	uint64_t decomp_tsc_duration[RTE_COMP_LEVEL_MAX + 1];
+	struct range_list level_lst;
+	uint8_t level;
+	int use_external_mbufs;
+
+	double ratio;
+	enum cleanup_st cleanup;
+	int perf_comp_force_stop;
+
+	uint32_t cyclecount_delay;
 };
 
 int
@@ -57,3 +82,5 @@ comp_perf_options_default(struct comp_test_data *test_data);
 
 int
 comp_perf_options_check(struct comp_test_data *test_data);
+
+#endif