X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=app%2Ftest-crypto-perf%2Fcperf_test_pmd_cyclecount.c;h=74371faa8d27eef651e31b282e28afaf0eecde55;hb=739a6674ab943a762cb5e9a7b82cc344ee5c1467;hp=9b41724af3eabc73a36c5ad8ed588ae002a77f8a;hpb=bf9d6702eca95f01105e93ab38fc36e9932314f8;p=dpdk.git diff --git a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c index 9b41724af3..74371faa8d 100644 --- a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c +++ b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c @@ -1,33 +1,5 @@ -/*- - * BSD LICENSE - * - * Copyright(c) 2017 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2017 Intel Corporation */ #include @@ -44,7 +16,7 @@ #define PRETTY_HDR_FMT "%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n" #define PRETTY_LINE_FMT "%12u%12u%12u%12u%12u%12u%12u%12.0f%12.0f%12.0f\n" #define CSV_HDR_FMT "%s,%s,%s,%s,%s,%s,%s,%s,%s,%s\n" -#define CSV_LINE_FMT "%10u;%10u;%u;%u;%u;%u;%u;%.f3;%.f3;%.f3\n" +#define CSV_LINE_FMT "%10u;%10u;%u;%u;%u;%u;%u;%.3f;%.3f;%.3f\n" struct cperf_pmd_cyclecount_ctx { uint8_t dev_id; @@ -108,6 +80,7 @@ cperf_pmd_cyclecount_test_free(struct cperf_pmd_cyclecount_ctx *ctx) void * cperf_pmd_cyclecount_test_constructor(struct rte_mempool *sess_mp, + struct rte_mempool *sess_priv_mp, uint8_t dev_id, uint16_t qp_id, const struct cperf_options *options, const struct cperf_test_vector *test_vector, @@ -134,8 +107,8 @@ cperf_pmd_cyclecount_test_constructor(struct rte_mempool *sess_mp, uint16_t iv_offset = sizeof(struct rte_crypto_op) + sizeof(struct rte_crypto_sym_op); - ctx->sess = op_fns->sess_create( - sess_mp, dev_id, options, test_vector, iv_offset); + ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options, + test_vector, iv_offset); if (ctx->sess == NULL) goto err; @@ -169,10 +142,11 @@ pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op, uint32_t iter_ops_needed = RTE_MIN(state->opts->nb_descriptors, iter_ops_left); uint32_t cur_iter_op; + uint32_t imix_idx = 0; for (cur_iter_op = 0; cur_iter_op < iter_ops_needed; cur_iter_op += test_burst_size) { - uint32_t burst_size = RTE_MIN(state->opts->total_ops - cur_op, + uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op, test_burst_size); struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op]; @@ -181,7 +155,7 @@ pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op, burst_size) != 0) { RTE_LOG(ERR, USER1, "Failed to allocate more crypto operations " - "from the the crypto operation pool.\n" + "from the crypto operation pool.\n" "Consider increasing the pool size " "with --pool-sz\n"); return -1; @@ -193,7 +167,8 @@ pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op, state->ctx->dst_buf_offset, burst_size, state->ctx->sess, state->opts, - state->ctx->test_vector, iv_offset); + state->ctx->test_vector, iv_offset, + &imix_idx); #ifdef CPERF_LINEARIZATION_ENABLE /* Check if source mbufs require coalescing */ @@ -218,6 +193,7 @@ pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state, uint32_t iter_ops_needed, uint16_t test_burst_size) { uint32_t cur_iter_op; + uint32_t imix_idx = 0; for (cur_iter_op = 0; cur_iter_op < iter_ops_needed; cur_iter_op += test_burst_size) { @@ -230,7 +206,7 @@ pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state, burst_size) != 0) { RTE_LOG(ERR, USER1, "Failed to allocate more crypto operations " - "from the the crypto operation pool.\n" + "from the crypto operation pool.\n" "Consider increasing the pool size " "with --pool-sz\n"); return -1; @@ -242,7 +218,8 @@ pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state, state->ctx->dst_buf_offset, burst_size, state->ctx->sess, state->opts, - state->ctx->test_vector, iv_offset); + state->ctx->test_vector, iv_offset, + &imix_idx); } return 0; } @@ -414,7 +391,7 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) state.lcore = rte_lcore_id(); state.linearize = 0; - static int only_once; + static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); static bool warmup = true; /* @@ -460,13 +437,12 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) } if (!opts->csv) { - if (!only_once) + if (rte_atomic16_test_and_set(&display_once)) printf(PRETTY_HDR_FMT, "lcore id", "Buf Size", "Burst Size", "Enqueued", "Dequeued", "Enq Retries", "Deq Retries", "Cycles/Op", "Cycles/Enq", "Cycles/Deq"); - only_once = 1; printf(PRETTY_LINE_FMT, state.ctx->lcore_id, opts->test_buffer_size, test_burst_size, @@ -477,13 +453,12 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) state.cycles_per_enq, state.cycles_per_deq); } else { - if (!only_once) + if (rte_atomic16_test_and_set(&display_once)) printf(CSV_HDR_FMT, "# lcore id", "Buf Size", "Burst Size", "Enqueued", "Dequeued", "Enq Retries", "Deq Retries", "Cycles/Op", "Cycles/Enq", "Cycles/Deq"); - only_once = 1; printf(CSV_LINE_FMT, state.ctx->lcore_id, opts->test_buffer_size, test_burst_size,