X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=app%2Ftest-eventdev%2Ftest_order_common.h;h=5ef840493826ee63c23916ea71b2ce3e4a9ed373;hb=c17af95a19e30c8d89eb96ceca99f60474ca2ac4;hp=88cb2acd9e36ccb95d509d4e8d3f0787735c8185;hpb=4d04346f1ec13b2afcf754fceaf7d613e85ac46a;p=dpdk.git diff --git a/app/test-eventdev/test_order_common.h b/app/test-eventdev/test_order_common.h index 88cb2acd9e..5ef8404938 100644 --- a/app/test-eventdev/test_order_common.h +++ b/app/test-eventdev/test_order_common.h @@ -1,33 +1,5 @@ -/* - * BSD LICENSE - * - * Copyright (C) Cavium 2017. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Cavium networks nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2017 Cavium, Inc */ #ifndef _TEST_ORDER_COMMON_ @@ -41,6 +13,7 @@ #include #include #include +#include #include "evt_common.h" #include "evt_options.h" @@ -48,6 +21,9 @@ #define BURST_SIZE 16 +typedef uint32_t flow_id_t; +typedef uint32_t seqn_t; + struct test_order; struct worker_data { @@ -77,6 +53,8 @@ struct test_order { uint32_t nb_flows; uint64_t nb_pkts; struct rte_mempool *pool; + int flow_id_dynfield_offset; + int seqn_dynfield_offset; struct prod_data prod; struct worker_data worker[EVT_MAX_PORTS]; uint32_t *producer_flow_seq; @@ -84,13 +62,36 @@ struct test_order { struct evt_options *opt; } __rte_cache_aligned; +static inline void +order_flow_id_copy_from_mbuf(struct test_order *t, struct rte_event *event) +{ + event->flow_id = *RTE_MBUF_DYNFIELD(event->mbuf, + t->flow_id_dynfield_offset, flow_id_t *); +} + +static inline void +order_flow_id_save(struct test_order *t, flow_id_t flow_id, + struct rte_mbuf *mbuf, struct rte_event *event) +{ + *RTE_MBUF_DYNFIELD(mbuf, + t->flow_id_dynfield_offset, flow_id_t *) = flow_id; + event->flow_id = flow_id; + event->mbuf = mbuf; +} + +static inline seqn_t * +order_mbuf_seqn(struct test_order *t, struct rte_mbuf *mbuf) +{ + return RTE_MBUF_DYNFIELD(mbuf, t->seqn_dynfield_offset, seqn_t *); +} + static inline int order_nb_event_ports(struct evt_options *opt) { return evt_nr_active_lcores(opt->wlcores) + 1 /* producer */; } -static inline __attribute__((always_inline)) void +static __rte_always_inline void order_process_stage_1(struct test_order *const t, struct rte_event *const ev, const uint32_t nb_flows, uint32_t *const expected_flow_seq, @@ -98,9 +99,10 @@ order_process_stage_1(struct test_order *const t, { const uint32_t flow = (uintptr_t)ev->mbuf % nb_flows; /* compare the seqn against expected value */ - if (ev->mbuf->seqn != expected_flow_seq[flow]) { + if (*order_mbuf_seqn(t, ev->mbuf) != expected_flow_seq[flow]) { evt_err("flow=%x seqn mismatch got=%x expected=%x", - flow, ev->mbuf->seqn, expected_flow_seq[flow]); + flow, *order_mbuf_seqn(t, ev->mbuf), + expected_flow_seq[flow]); t->err = true; rte_smp_wmb(); } @@ -115,7 +117,7 @@ order_process_stage_1(struct test_order *const t, rte_atomic64_sub(outstand_pkts, 1); } -static inline __attribute__((always_inline)) void +static __rte_always_inline void order_process_stage_invalid(struct test_order *const t, struct rte_event *const ev) {