X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=app%2Ftest-eventdev%2Ftest_pipeline_common.h;h=6e73c6ab26e09953ea3b5edae94684980b52a0a4;hb=5392ebc0e164a139ab9ff93d0c8c1a437a56c90a;hp=b6923f3befb261fb27f0427ab177a18f61766511;hpb=d4c003f5049e459f59b4c669a7b2b880b91b62b4;p=dpdk.git

diff --git a/app/test-eventdev/test_pipeline_common.h b/app/test-eventdev/test_pipeline_common.h
index b6923f3bef..6e73c6ab26 100644
--- a/app/test-eventdev/test_pipeline_common.h
+++ b/app/test-eventdev/test_pipeline_common.h
@@ -14,6 +14,7 @@
 #include <rte_ethdev.h>
 #include <rte_eventdev.h>
 #include <rte_event_eth_rx_adapter.h>
+#include <rte_event_eth_tx_adapter.h>
 #include <rte_lcore.h>
 #include <rte_malloc.h>
 #include <rte_mempool.h>
@@ -35,36 +36,114 @@ struct worker_data {
 	struct test_pipeline *t;
 } __rte_cache_aligned;
 
-struct tx_service_data {
-	uint8_t dev_id;
-	uint8_t queue_id;
-	uint8_t port_id;
-	uint32_t service_id;
-	uint64_t processed_pkts;
-	uint16_t nb_ethports;
-	struct rte_eth_dev_tx_buffer *tx_buf[RTE_MAX_ETHPORTS];
-	struct test_pipeline *t;
-} __rte_cache_aligned;
-
 struct test_pipeline {
 	/* Don't change the offset of "done". Signal handler use this memory
 	 * to terminate all lcores work.
 	 */
 	int done;
 	uint8_t nb_workers;
-	uint8_t mt_unsafe;
+	uint8_t internal_port;
+	uint8_t tx_evqueue_id[RTE_MAX_ETHPORTS];
 	enum evt_test_result result;
 	uint32_t nb_flows;
 	uint64_t outstand_pkts;
 	struct rte_mempool *pool;
 	struct worker_data worker[EVT_MAX_PORTS];
-	struct tx_service_data tx_service;
 	struct evt_options *opt;
 	uint8_t sched_type_list[EVT_MAX_STAGES] __rte_cache_aligned;
 } __rte_cache_aligned;
 
 #define BURST_SIZE 16
 
+#define PIPELINE_WORKER_SINGLE_STAGE_INIT \
+	struct worker_data *w  = arg;     \
+	struct test_pipeline *t = w->t;   \
+	const uint8_t dev = w->dev_id;    \
+	const uint8_t port = w->port_id;  \
+	struct rte_event ev __rte_cache_aligned
+
+#define PIPELINE_WORKER_SINGLE_STAGE_BURST_INIT \
+	int i;                                  \
+	struct worker_data *w  = arg;           \
+	struct test_pipeline *t = w->t;         \
+	const uint8_t dev = w->dev_id;          \
+	const uint8_t port = w->port_id;        \
+	struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned
+
+#define PIPELINE_WORKER_MULTI_STAGE_INIT                         \
+	struct worker_data *w  = arg;                            \
+	struct test_pipeline *t = w->t;                          \
+	uint8_t cq_id;                                           \
+	const uint8_t dev = w->dev_id;                           \
+	const uint8_t port = w->port_id;                         \
+	const uint8_t last_queue = t->opt->nb_stages - 1;        \
+	uint8_t *const sched_type_list = &t->sched_type_list[0]; \
+	const uint8_t nb_stages = t->opt->nb_stages + 1;	 \
+	struct rte_event ev __rte_cache_aligned
+
+#define PIPELINE_WORKER_MULTI_STAGE_BURST_INIT                   \
+	int i;                                                   \
+	struct worker_data *w  = arg;                            \
+	struct test_pipeline *t = w->t;                          \
+	uint8_t cq_id;                                           \
+	const uint8_t dev = w->dev_id;                           \
+	const uint8_t port = w->port_id;                         \
+	const uint8_t last_queue = t->opt->nb_stages - 1;        \
+	uint8_t *const sched_type_list = &t->sched_type_list[0]; \
+	const uint8_t nb_stages = t->opt->nb_stages + 1;	 \
+	struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned
+
+static __rte_always_inline void
+pipeline_fwd_event(struct rte_event *ev, uint8_t sched)
+{
+	ev->event_type = RTE_EVENT_TYPE_CPU;
+	ev->op = RTE_EVENT_OP_FORWARD;
+	ev->sched_type = sched;
+}
+
+static __rte_always_inline void
+pipeline_event_tx(const uint8_t dev, const uint8_t port,
+		struct rte_event * const ev)
+{
+	rte_event_eth_tx_adapter_txq_set(ev->mbuf, 0);
+	while (!rte_event_eth_tx_adapter_enqueue(dev, port, ev, 1, 0))
+		rte_pause();
+}
+
+static __rte_always_inline void
+pipeline_event_tx_burst(const uint8_t dev, const uint8_t port,
+		struct rte_event *ev, const uint16_t nb_rx)
+{
+	uint16_t enq;
+
+	enq = rte_event_eth_tx_adapter_enqueue(dev, port, ev, nb_rx, 0);
+	while (enq < nb_rx) {
+		enq += rte_event_eth_tx_adapter_enqueue(dev, port,
+				ev + enq, nb_rx - enq, 0);
+	}
+}
+
+static __rte_always_inline void
+pipeline_event_enqueue(const uint8_t dev, const uint8_t port,
+		struct rte_event *ev)
+{
+	while (rte_event_enqueue_burst(dev, port, ev, 1) != 1)
+		rte_pause();
+}
+
+static __rte_always_inline void
+pipeline_event_enqueue_burst(const uint8_t dev, const uint8_t port,
+		struct rte_event *ev, const uint16_t nb_rx)
+{
+	uint16_t enq;
+
+	enq = rte_event_enqueue_burst(dev, port, ev, nb_rx);
+	while (enq < nb_rx) {
+		enq += rte_event_enqueue_burst(dev, port,
+						ev + enq, nb_rx - enq);
+	}
+}
+
 static inline int
 pipeline_nb_event_ports(struct evt_options *opt)
 {
@@ -77,9 +156,8 @@ int pipeline_test_setup(struct evt_test *test, struct evt_options *opt);
 int pipeline_ethdev_setup(struct evt_test *test, struct evt_options *opt);
 int pipeline_event_rx_adapter_setup(struct evt_options *opt, uint8_t stride,
 		struct rte_event_port_conf prod_conf);
-int pipeline_event_tx_service_setup(struct evt_test *test,
-		struct evt_options *opt, uint8_t tx_queue_id,
-		uint8_t tx_port_id, const struct rte_event_port_conf p_conf);
+int pipeline_event_tx_adapter_setup(struct evt_options *opt,
+		struct rte_event_port_conf prod_conf);
 int pipeline_mempool_setup(struct evt_test *test, struct evt_options *opt);
 int pipeline_event_port_setup(struct evt_test *test, struct evt_options *opt,
 		uint8_t *queue_arr, uint8_t nb_queues,