X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Fcommon_base;h=38beaabb3d4a4c9d097827240659c2d9836a73c8;hb=839b20be0e9bbf5db119762c098ea865fafb9075;hp=acc5211bcc17b9dde06668fa6c162cface987661;hpb=a3bbf2e09756071a1234a3de3df9b046c249e475;p=dpdk.git diff --git a/config/common_base b/config/common_base index acc5211bcc..38beaabb3d 100644 --- a/config/common_base +++ b/config/common_base @@ -55,12 +55,18 @@ CONFIG_RTE_MAJOR_ABI= # CONFIG_RTE_CACHE_LINE_SIZE=64 +# +# Memory model +# +CONFIG_RTE_USE_C11_MEM_MODEL=n + # # Compile Environment Abstraction Layer # CONFIG_RTE_LIBRTE_EAL=y CONFIG_RTE_MAX_LCORE=128 CONFIG_RTE_MAX_NUMA_NODES=8 +CONFIG_RTE_MAX_HEAPS=32 CONFIG_RTE_MAX_MEMSEG_LISTS=64 # each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages # or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller @@ -138,6 +144,11 @@ CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE=n # CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n +# +# Common libraries, before Bus/PMDs +# +CONFIG_RTE_LIBRTE_COMMON_DPAAX=n + # # Compile the Intel FPGA bus # @@ -163,6 +174,11 @@ CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n +# +# Compile Aquantia Atlantic PMD driver +# +CONFIG_RTE_LIBRTE_ATLANTIC_PMD=y + # # Compile AMD PMD # @@ -217,6 +233,11 @@ CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y CONFIG_RTE_LIBRTE_DPAA2_PMD=n CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n +# +# Compile NXP ENETC PMD Driver +# +CONFIG_RTE_LIBRTE_ENETC_PMD=n + # # Compile burst-oriented Amazon ENA PMD driver # @@ -399,6 +420,11 @@ CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y # CONFIG_RTE_LIBRTE_MVPP2_PMD=n +# +# Compile Marvell MVNETA PMD driver +# +CONFIG_RTE_LIBRTE_MVNETA_PMD=n + # # Compile support for VMBus library # @@ -479,6 +505,12 @@ CONFIG_RTE_CRYPTO_MAX_DEVS=64 CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n +# +# Compile NXP CAAM JR crypto Driver +# +CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n +CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n + # # Compile NXP DPAA2 crypto sec driver for CAAM HW # @@ -490,6 +522,11 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4 +# +# Compile PMD for Cavium OCTEON TX crypto device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y + # # Compile PMD for QuickAssist based devices - see docs for details # @@ -559,7 +596,6 @@ CONFIG_RTE_LIBRTE_PMD_CCP=n # Compile PMD for Marvell Crypto device # CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n -CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO_DEBUG=n # # Compile generic security library @@ -667,7 +703,6 @@ CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y # Compile librte_ring # CONFIG_RTE_LIBRTE_RING=y -CONFIG_RTE_RING_USE_C11_MEM_MODEL=n # # Compile librte_mempool