X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Fcommon_base;h=914277856de96dce0c96c5db332309655f9bc668;hb=3e8edd0ef8485eff501449e5a4a4c1fca240d622;hp=0641c460b408b043217c1f858411f4dcbf839e97;hpb=9a8864c8b5da6b07db0b2a67b9a1897a341ca7da;p=dpdk.git diff --git a/config/common_base b/config/common_base index 0641c460b4..914277856d 100644 --- a/config/common_base +++ b/config/common_base @@ -49,6 +49,11 @@ CONFIG_RTE_FORCE_INTRINSICS=n # CONFIG_RTE_ARCH_STRICT_ALIGN=n +# +# Enable link time optimization +# +CONFIG_RTE_ENABLE_LTO=n + # # Compile to share library # @@ -102,7 +107,6 @@ CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO CONFIG_RTE_LOG_HISTORY=256 CONFIG_RTE_BACKTRACE=y CONFIG_RTE_LIBEAL_USE_HPET=n -CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n CONFIG_RTE_EAL_IGB_UIO=n CONFIG_RTE_EAL_VFIO=n @@ -120,6 +124,9 @@ CONFIG_RTE_USE_LIBBSD=n CONFIG_RTE_ENABLE_AVX=y CONFIG_RTE_ENABLE_AVX512=n +# Use ARM LSE ATOMIC instructions +CONFIG_RTE_ARM_FEATURE_ATOMICS=n + # Default driver path (or "" to disable) CONFIG_RTE_EAL_PMD_PATH="" @@ -217,12 +224,11 @@ CONFIG_RTE_LIBRTE_BNXT_PMD=y # Compile burst-oriented Chelsio Terminator (CXGBE) PMD # CONFIG_RTE_LIBRTE_CXGBE_PMD=y -CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n -CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n -CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n -CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n -CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n -CONFIG_RTE_LIBRTE_CXGBE_TPUT=y + +# +# Compile burst-oriented NXP PFE PMD driver +# +CONFIG_RTE_LIBRTE_PFE_PMD=n # NXP DPAA Bus CONFIG_RTE_LIBRTE_DPAA_BUS=n @@ -281,6 +287,11 @@ CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n # CONFIG_RTE_LIBRTE_HINIC_PMD=n +# +# Compile burst-oriented HNS3 PMD driver +# +CONFIG_RTE_LIBRTE_HNS3_PMD=n + # # Compile burst-oriented IXGBE PMD driver # @@ -328,7 +339,6 @@ CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=n # Compile burst-oriented IAVF PMD driver # CONFIG_RTE_LIBRTE_IAVF_PMD=y -CONFIG_RTE_LIBRTE_IAVF_INC_VECTOR=y CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX=n CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX_FREE=n CONFIG_RTE_LIBRTE_IAVF_DEBUG_RX=n @@ -537,8 +547,11 @@ CONFIG_RTE_PMD_PACKET_PREFETCH=y # EXPERIMENTAL: API may change without prior notice # CONFIG_RTE_LIBRTE_BBDEV=y +CONFIG_RTE_LIBRTE_BBDEV_DEBUG=n CONFIG_RTE_BBDEV_MAX_DEVS=128 CONFIG_RTE_BBDEV_OFFLOAD_COST=y +CONFIG_RTE_BBDEV_SDK_AVX2=n +CONFIG_RTE_BBDEV_SDK_AVX512=n # # Compile PMD for NULL bbdev device @@ -548,7 +561,12 @@ CONFIG_RTE_LIBRTE_PMD_BBDEV_NULL=y # # Compile PMD for turbo software bbdev device # -CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=n +CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=y + +# +# Compile PMD for Intel FPGA LTE FEC bbdev device +# +CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_LTE_FEC=y # # Compile generic crypto device library @@ -584,6 +602,11 @@ CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4 # CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y +# +# Compile PMD for Marvell OCTEON TX2 crypto device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO=y + # # Compile PMD for QuickAssist based devices - see docs for details # @@ -655,6 +678,11 @@ CONFIG_RTE_LIBRTE_PMD_CCP=n # CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n +# +# Compile PMD for NITROX crypto device +# +CONFIG_RTE_LIBRTE_PMD_NITROX=y + # # Compile generic security library # @@ -885,6 +913,17 @@ CONFIG_RTE_LIBRTE_TELEMETRY=n CONFIG_RTE_LIBRTE_RCU=y CONFIG_RTE_LIBRTE_RCU_DEBUG=n +# +# Compile librte_rib +# +CONFIG_RTE_LIBRTE_RIB=y + +# +# Compile librte_fib +# +CONFIG_RTE_LIBRTE_FIB=y +CONFIG_RTE_LIBRTE_FIB_DEBUG=n + # # Compile librte_lpm #