X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Fcommon_base;h=f557e6bbeed43c2f27486def746d9d0ff817211f;hb=a922c6a789ffa335c1aff5aa0340a479abf0c371;hp=fb48dd68dceaa2ad95e28b6b5f7ef35b78d969f0;hpb=c88b3f2558ed09738d29913169bb865531dcb067;p=dpdk.git diff --git a/config/common_base b/config/common_base index fb48dd68dc..f557e6bbee 100644 --- a/config/common_base +++ b/config/common_base @@ -1,34 +1,5 @@ -# BSD LICENSE -# -# Copyright(c) 2010-2017 Intel Corporation. All rights reserved. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# * Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# * Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# * Neither the name of Intel Corporation nor the names of its -# contributors may be used to endorse or promote products derived -# from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2010-2017 Intel Corporation # # define executive environment @@ -90,7 +61,20 @@ CONFIG_RTE_CACHE_LINE_SIZE=64 CONFIG_RTE_LIBRTE_EAL=y CONFIG_RTE_MAX_LCORE=128 CONFIG_RTE_MAX_NUMA_NODES=8 -CONFIG_RTE_MAX_MEMSEG=256 +CONFIG_RTE_MAX_MEMSEG_LISTS=64 +# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages +# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller +CONFIG_RTE_MAX_MEMSEG_PER_LIST=8192 +CONFIG_RTE_MAX_MEM_MB_PER_LIST=32768 +# a "type" is a combination of page size and NUMA node. total number of memseg +# lists per type will be limited to either RTE_MAX_MEMSEG_PER_TYPE pages (split +# over multiple lists of RTE_MAX_MEMSEG_PER_LIST pages), or +# RTE_MAX_MEM_MB_PER_TYPE megabytes of memory (split over multiple lists of +# RTE_MAX_MEM_MB_PER_LIST), whichever is smaller +CONFIG_RTE_MAX_MEMSEG_PER_TYPE=32768 +CONFIG_RTE_MAX_MEM_MB_PER_TYPE=131072 +# global maximum usable amount of VA, in megabytes +CONFIG_RTE_MAX_MEM_MB=524288 CONFIG_RTE_MAX_MEMZONE=2560 CONFIG_RTE_MAX_TAILQ=32 CONFIG_RTE_ENABLE_ASSERT=n @@ -105,6 +89,7 @@ CONFIG_RTE_EAL_VFIO=n CONFIG_RTE_MAX_VFIO_GROUPS=64 CONFIG_RTE_MALLOC_DEBUG=n CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n +CONFIG_RTE_USE_LIBBSD=n # # Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing. @@ -201,6 +186,7 @@ CONFIG_RTE_LIBRTE_CXGBE_TPUT=y CONFIG_RTE_LIBRTE_DPAA_BUS=n CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n CONFIG_RTE_LIBRTE_DPAA_PMD=n +CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n # # Compile NXP DPAA2 FSL-MC Bus @@ -217,11 +203,7 @@ CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y # Compile burst-oriented NXP DPAA2 PMD driver # CONFIG_RTE_LIBRTE_DPAA2_PMD=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n # # Compile burst-oriented Amazon ENA PMD driver @@ -298,6 +280,7 @@ CONFIG_RTE_LIBRTE_AVF_16BYTE_RX_DESC=n # CONFIG_RTE_LIBRTE_MLX4_PMD=n CONFIG_RTE_LIBRTE_MLX4_DEBUG=n +CONFIG_RTE_LIBRTE_MLX4_DLOPEN_DEPS=n CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8 # @@ -305,6 +288,7 @@ CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8 # CONFIG_RTE_LIBRTE_MLX5_PMD=n CONFIG_RTE_LIBRTE_MLX5_DEBUG=n +CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS=n CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE=8 # @@ -409,7 +393,7 @@ CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y # # Compile Marvell PMD driver # -CONFIG_RTE_LIBRTE_MRVL_PMD=n +CONFIG_RTE_LIBRTE_MVPP2_PMD=n # # Compile virtual device driver for NetVSC on Hyper-V/Azure @@ -482,9 +466,7 @@ CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n # Compile NXP DPAA2 crypto sec driver for CAAM HW # CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n +CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048 # # NXP DPAA caam - crypto driver @@ -493,6 +475,8 @@ CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n +CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4 +CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS=2048 # # Compile PMD for QuickAssist based devices @@ -611,6 +595,7 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n # CONFIG_RTE_LIBRTE_RAWDEV=y CONFIG_RTE_RAWDEV_MAX_DEVS=10 +CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV=y # # Compile librte_ring