X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Frte_config.h;h=567051b9cf886dea08a678f1d552c69d6caa62ac;hb=ff37ca5d3773b7c82ad9b3d7e212e8ae7d39fc1a;hp=0d61b84c17e3e0ac4da1757b12ccece16fc76d2a;hpb=40db28c1879cd34b696bbf45e34de376dbadcbf8;p=dpdk.git diff --git a/config/rte_config.h b/config/rte_config.h index 0d61b84c17..567051b9cf 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -20,6 +20,9 @@ /****** library defines ********/ +/* compat defines */ +#define RTE_BUILD_SHARED_LIB + /* EAL defines */ #define RTE_MAX_MEMSEG_LISTS 128 #define RTE_MAX_MEMSEG_PER_LIST 8192 @@ -32,6 +35,7 @@ #define RTE_LOG_DP_LEVEL RTE_LOG_INFO #define RTE_BACKTRACE 1 #define RTE_EAL_VFIO 1 +#define RTE_MAX_VFIO_CONTAINERS 64 /* bsd module defines */ #define RTE_CONTIGMEM_MAX_NUM_BUFS 64 @@ -56,10 +60,15 @@ #define RTE_CRYPTO_MAX_DEVS 64 #define RTE_CRYPTODEV_NAME_LEN 64 +/* compressdev defines */ +#define RTE_COMPRESS_MAX_DEVS 64 + /* eventdev defines */ #define RTE_EVENT_MAX_DEVS 16 #define RTE_EVENT_MAX_QUEUES_PER_DEV 64 #define RTE_EVENT_TIMER_ADAPTER_NUM_MAX 32 +#define RTE_EVENT_ETH_INTR_RING_SIZE 1024 +#define RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE 32 /* rawdev defines */ #define RTE_RAWDEV_MAX_DEVS 10 @@ -80,18 +89,13 @@ /****** driver defines ********/ -/* - * Number of sessions to create in the session memory pool - * on a single instance of crypto HW device. - */ /* QuickAssist device */ -#define RTE_QAT_PMD_MAX_NB_SESSIONS 2048 +/* Max. number of QuickAssist devices which can be attached */ +#define RTE_PMD_QAT_MAX_PCI_DEVICES 48 +#define RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS 16 -/* DPAA2_SEC */ -#define RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS 2048 - -/* DPAA_SEC */ -#define RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS 2048 +/* virtio crypto defines */ +#define RTE_MAX_VIRTIO_CRYPTO 32 /* DPAA SEC max cryptodev devices*/ #define RTE_LIBRTE_DPAA_MAX_CRYPTODEV 4 @@ -105,11 +109,12 @@ #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4 -/* interval up to 8160 us, aligned to 2 (or default value) */ -#define RTE_LIBRTE_I40E_ITR_INTERVAL -1 /* Ring net PMD settings */ #define RTE_PMD_RING_MAX_RX_RINGS 16 #define RTE_PMD_RING_MAX_TX_RINGS 16 +/* QEDE PMD defines */ +#define RTE_LIBRTE_QEDE_FW "" + #endif /* _RTE_CONFIG_H_ */