X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Frte_config.h;h=b1c0b3920a7b81190907aae009ed986208adb0f4;hb=ee27edbe0c10ec8337c4cc4d2935a751d0da605f;hp=b47cfabaecca817e9c2be490d28bd87f3011c0e8;hpb=5b9656b157d3fefb9076f2ba8c72490dacdb7242;p=dpdk.git diff --git a/config/rte_config.h b/config/rte_config.h index b47cfabaec..b1c0b3920a 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -1,34 +1,5 @@ -/* - * BSD LICENSE - * - * Copyright(c) 2017 Intel Corporation. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2017 Intel Corporation */ /** @@ -50,14 +21,23 @@ /****** library defines ********/ /* EAL defines */ -#define RTE_MAX_MEMSEG 512 +#define RTE_MAX_MEMSEG_LISTS 128 +#define RTE_MAX_MEMSEG_PER_LIST 8192 +#define RTE_MAX_MEM_MB_PER_LIST 32768 +#define RTE_MAX_MEMSEG_PER_TYPE 32768 +#define RTE_MAX_MEM_MB_PER_TYPE 65536 +#define RTE_MAX_MEM_MB 524288 #define RTE_MAX_MEMZONE 2560 #define RTE_MAX_TAILQ 32 -#define RTE_LOG_LEVEL RTE_LOG_INFO #define RTE_LOG_DP_LEVEL RTE_LOG_INFO #define RTE_BACKTRACE 1 #define RTE_EAL_VFIO 1 +/* bsd module defines */ +#define RTE_CONTIGMEM_MAX_NUM_BUFS 64 +#define RTE_CONTIGMEM_DEFAULT_NUM_BUFS 1 +#define RTE_CONTIGMEM_DEFAULT_BUF_SIZE (512*1024*1024) + /* mempool defines */ #define RTE_MEMPOOL_CACHE_MAX_SIZE 512 @@ -79,6 +59,10 @@ /* eventdev defines */ #define RTE_EVENT_MAX_DEVS 16 #define RTE_EVENT_MAX_QUEUES_PER_DEV 64 +#define RTE_EVENT_TIMER_ADAPTER_NUM_MAX 32 + +/* rawdev defines */ +#define RTE_RAWDEV_MAX_DEVS 10 /* ip_fragmentation defines */ #define RTE_LIBRTE_IP_FRAG_MAX_FRAG 4 @@ -94,4 +78,42 @@ #define RTE_SCHED_PORT_N_GRINDERS 8 #undef RTE_SCHED_VECTOR +/****** driver defines ********/ + +/* + * Number of sessions to create in the session memory pool + * on a single instance of crypto HW device. + */ +/* QuickAssist device */ +#define RTE_QAT_PMD_MAX_NB_SESSIONS 2048 + +/* virtio crypto defines */ +#define RTE_VIRTIO_CRYPTO_PMD_MAX_NB_SESSIONS 1024 +#define RTE_MAX_VIRTIO_CRYPTO 32 + +/* DPAA2_SEC */ +#define RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS 2048 + +/* DPAA_SEC */ +#define RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS 2048 + +/* DPAA SEC max cryptodev devices*/ +#define RTE_LIBRTE_DPAA_MAX_CRYPTODEV 4 + +/* fm10k defines */ +#define RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE 1 + +/* i40e defines */ +#define RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC 1 +#undef RTE_LIBRTE_I40E_16BYTE_RX_DESC +#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64 +#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4 +#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4 +/* interval up to 8160 us, aligned to 2 (or default value) */ +#define RTE_LIBRTE_I40E_ITR_INTERVAL -1 + +/* Ring net PMD settings */ +#define RTE_PMD_RING_MAX_RX_RINGS 16 +#define RTE_PMD_RING_MAX_TX_RINGS 16 + #endif /* _RTE_CONFIG_H_ */