X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Frte_config.h;h=d30786bc08e8baedcd6715ea9fb911c5a5b0f650;hb=6222035e1af43c1c1d588eb0cc5004d62591e1b4;hp=8a3432acaa7adf8d7472c4d2ee93e81296aa78e6;hpb=e1fc5b7690a8e913367c7c6f14c08a5ec750419e;p=dpdk.git

diff --git a/config/rte_config.h b/config/rte_config.h
index 8a3432acaa..d30786bc08 100644
--- a/config/rte_config.h
+++ b/config/rte_config.h
@@ -18,9 +18,21 @@
 
 #include <rte_build_config.h>
 
+/* legacy defines */
+#ifdef RTE_EXEC_ENV_LINUX
+#define RTE_EXEC_ENV_LINUXAPP 1
+#endif
+#ifdef RTE_EXEC_ENV_FREEBSD
+#define RTE_EXEC_ENV_BSDAPP 1
+#endif
+
+/* String that appears before the version number */
+#define RTE_VER_PREFIX "DPDK"
+
 /****** library defines ********/
 
 /* EAL defines */
+#define RTE_MAX_HEAPS 32
 #define RTE_MAX_MEMSEG_LISTS 128
 #define RTE_MAX_MEMSEG_PER_LIST 8192
 #define RTE_MAX_MEM_MB_PER_LIST 32768
@@ -31,7 +43,6 @@
 #define RTE_MAX_TAILQ 32
 #define RTE_LOG_DP_LEVEL RTE_LOG_INFO
 #define RTE_BACKTRACE 1
-#define RTE_EAL_VFIO 1
 #define RTE_MAX_VFIO_CONTAINERS 64
 
 /* bsd module defines */
@@ -48,7 +59,6 @@
 #define RTE_PKTMBUF_HEADROOM 128
 
 /* ether defines */
-#define RTE_MAX_ETHPORTS 32
 #define RTE_MAX_QUEUES_PER_PORT 1024
 #define RTE_ETHDEV_QUEUE_STAT_CNTRS 16
 #define RTE_ETHDEV_RXTX_CALLBACKS 1
@@ -64,10 +74,12 @@
 #define RTE_EVENT_MAX_DEVS 16
 #define RTE_EVENT_MAX_QUEUES_PER_DEV 64
 #define RTE_EVENT_TIMER_ADAPTER_NUM_MAX 32
+#define RTE_EVENT_ETH_INTR_RING_SIZE 1024
 #define RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE 32
+#define RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE 32
 
 /* rawdev defines */
-#define RTE_RAWDEV_MAX_DEVS 10
+#define RTE_RAWDEV_MAX_DEVS 64
 
 /* ip_fragmentation defines */
 #define RTE_LIBRTE_IP_FRAG_MAX_FRAG 4
@@ -83,11 +95,16 @@
 #define RTE_SCHED_PORT_N_GRINDERS 8
 #undef RTE_SCHED_VECTOR
 
+/* KNI defines */
+#define RTE_KNI_PREEMPT_DEFAULT 1
+
 /****** driver defines ********/
 
 /* QuickAssist device */
 /* Max. number of QuickAssist devices which can be attached */
 #define RTE_PMD_QAT_MAX_PCI_DEVICES 48
+#define RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS 16
+#define RTE_PMD_QAT_COMP_IM_BUFFER_SIZE 65536
 
 /* virtio crypto defines */
 #define RTE_MAX_VIRTIO_CRYPTO 32
@@ -104,11 +121,12 @@
 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64
 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4
 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4
-/* interval up to 8160 us, aligned to 2 (or default value) */
-#define RTE_LIBRTE_I40E_ITR_INTERVAL -1
 
 /* Ring net PMD settings */
 #define RTE_PMD_RING_MAX_RX_RINGS 16
 #define RTE_PMD_RING_MAX_TX_RINGS 16
 
+/* QEDE PMD defines */
+#define RTE_LIBRTE_QEDE_FW ""
+
 #endif /* _RTE_CONFIG_H_ */