X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Frte_config.h;h=f293d9e3afbb48c4255f552c743a16c9d382e6a9;hb=e4dff5503a80e60e1e1a4b115b258aeaf791b01c;hp=813c3a67d3bad78133159f0848f9329df1e43daa;hpb=a25a650be5f0c60ea69531741bd13521b183d502;p=dpdk.git diff --git a/config/rte_config.h b/config/rte_config.h index 813c3a67d3..f293d9e3af 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -1,34 +1,5 @@ -/* - * BSD LICENSE - * - * Copyright(c) 2017 Intel Corporation. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2017 Intel Corporation */ /** @@ -47,4 +18,94 @@ #include +/****** library defines ********/ + +/* EAL defines */ +#define RTE_MAX_MEMSEG_LISTS 128 +#define RTE_MAX_MEMSEG_PER_LIST 8192 +#define RTE_MAX_MEM_MB_PER_LIST 32768 +#define RTE_MAX_MEMSEG_PER_TYPE 32768 +#define RTE_MAX_MEM_MB_PER_TYPE 65536 +#define RTE_MAX_MEM_MB 524288 +#define RTE_MAX_MEMZONE 2560 +#define RTE_MAX_TAILQ 32 +#define RTE_LOG_DP_LEVEL RTE_LOG_INFO +#define RTE_BACKTRACE 1 +#define RTE_EAL_VFIO 1 + +/* bsd module defines */ +#define RTE_CONTIGMEM_MAX_NUM_BUFS 64 +#define RTE_CONTIGMEM_DEFAULT_NUM_BUFS 1 +#define RTE_CONTIGMEM_DEFAULT_BUF_SIZE (512*1024*1024) + +/* mempool defines */ +#define RTE_MEMPOOL_CACHE_MAX_SIZE 512 + +/* mbuf defines */ +#define RTE_MBUF_DEFAULT_MEMPOOL_OPS "ring_mp_mc" +#define RTE_MBUF_REFCNT_ATOMIC 1 +#define RTE_PKTMBUF_HEADROOM 128 + +/* ether defines */ +#define RTE_MAX_ETHPORTS 32 +#define RTE_MAX_QUEUES_PER_PORT 1024 +#define RTE_ETHDEV_QUEUE_STAT_CNTRS 16 +#define RTE_ETHDEV_RXTX_CALLBACKS 1 + +/* cryptodev defines */ +#define RTE_CRYPTO_MAX_DEVS 64 +#define RTE_CRYPTODEV_NAME_LEN 64 + +/* eventdev defines */ +#define RTE_EVENT_MAX_DEVS 16 +#define RTE_EVENT_MAX_QUEUES_PER_DEV 64 + +/* ip_fragmentation defines */ +#define RTE_LIBRTE_IP_FRAG_MAX_FRAG 4 +#undef RTE_LIBRTE_IP_FRAG_TBL_STAT + +/* rte_power defines */ +#define RTE_MAX_LCORE_FREQS 64 + +/* rte_sched defines */ +#undef RTE_SCHED_RED +#undef RTE_SCHED_COLLECT_STATS +#undef RTE_SCHED_SUBPORT_TC_OV +#define RTE_SCHED_PORT_N_GRINDERS 8 +#undef RTE_SCHED_VECTOR + +/****** driver defines ********/ + +/* + * Number of sessions to create in the session memory pool + * on a single instance of crypto HW device. + */ +/* QuickAssist device */ +#define RTE_QAT_PMD_MAX_NB_SESSIONS 2048 + +/* DPAA2_SEC */ +#define RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS 2048 + +/* DPAA_SEC */ +#define RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS 2048 + +/* DPAA SEC max cryptodev devices*/ +#define RTE_LIBRTE_DPAA_MAX_CRYPTODEV 4 + +/* fm10k defines */ +#define RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE 1 + +/* i40e defines */ +#define RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC 1 +#undef RTE_LIBRTE_I40E_16BYTE_RX_DESC +#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64 +#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4 +#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4 +/* interval up to 8160 us, aligned to 2 (or default value) */ +#define RTE_LIBRTE_I40E_ITR_INTERVAL -1 + +/* Ring net PMD settings */ +#define RTE_PMD_RING_MAX_RX_RINGS 16 +#define RTE_PMD_RING_MAX_TX_RINGS 16 + #endif /* _RTE_CONFIG_H_ */