X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=doc%2Fguides%2Feventdevs%2Focteontx2.rst;h=242d283965f9eabffc0bfd15cc049447caa13f58;hb=aa8bea0e3455;hp=bbc66558f8bf6c38d78910aa902abee9cdcbb1e5;hpb=f513827934bccb13daf37f21befafddd6838f9d2;p=dpdk.git diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst index bbc66558f8..242d283965 100644 --- a/doc/guides/eventdevs/octeontx2.rst +++ b/doc/guides/eventdevs/octeontx2.rst @@ -4,7 +4,7 @@ OCTEON TX2 SSO Eventdev Driver =============================== -The OCTEON TX2 SSO PMD (**librte_pmd_octeontx2_event**) provides poll mode +The OCTEON TX2 SSO PMD (**librte_event_octeontx2**) provides poll mode eventdev driver support for the inbuilt event device found in the **Marvell OCTEON TX2** SoC family. @@ -32,26 +32,21 @@ Features of the OCTEON TX2 SSO PMD are: time granularity of 2.5us. - Up to 256 TIM rings aka event timer adapters. - Up to 8 rings traversed in parallel. +- HW managed packets enqueued from ethdev to eventdev exposed through event eth + RX adapter. +- N:1 ethernet device Rx queue to Event queue mapping. +- Lockfree Tx from event eth Tx adapter using ``DEV_TX_OFFLOAD_MT_LOCKFREE`` + capability while maintaining receive packet order. +- Full Rx/Tx offload support defined through ethdev queue config. Prerequisites and Compilation procedure --------------------------------------- See :doc:`../platform/octeontx2` for setup information. -Pre-Installation Configuration ------------------------------- - -Compile time Config Options -~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -The following option can be modified in the ``config`` file. - -- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV`` (default ``y``) - - Toggle compilation of the ``librte_pmd_octeontx2_event`` driver. Runtime Config Options -~~~~~~~~~~~~~~~~~~~~~~ +---------------------- - ``Maximum number of in-flight events`` (default ``8192``) @@ -60,7 +55,7 @@ Runtime Config Options upper limit for in-flight events. For example:: - --dev "0002:0e:00.0,xae_cnt=16384" + -w 0002:0e:00.0,xae_cnt=16384 - ``Force legacy mode`` @@ -68,7 +63,7 @@ Runtime Config Options single workslot mode in SSO and disable the default dual workslot mode. For example:: - --dev "0002:0e:00.0,single_ws=1" + -w 0002:0e:00.0,single_ws=1 - ``Event Group QoS support`` @@ -83,7 +78,7 @@ Runtime Config Options default. For example:: - --dev "0002:0e:00.0,qos=[1-50-50-50]" + -w 0002:0e:00.0,qos=[1-50-50-50] - ``Selftest`` @@ -92,7 +87,7 @@ Runtime Config Options The tests are run once the vdev creation is successfully complete. For example:: - --dev "0002:0e:00.0,selftest=1" + -w 0002:0e:00.0,selftest=1 - ``TIM disable NPA`` @@ -101,7 +96,7 @@ Runtime Config Options parameter disables NPA and uses software mempool to manage chunks For example:: - --dev "0002:0e:00.0,tim_disable_npa=1" + -w 0002:0e:00.0,tim_disable_npa=1 - ``TIM modify chunk slots`` @@ -112,7 +107,7 @@ Runtime Config Options to SSO. The default value is 255 and the max value is 4095. For example:: - --dev "0002:0e:00.0,tim_chnk_slots=1023" + -w 0002:0e:00.0,tim_chnk_slots=1023 - ``TIM enable arm/cancel statistics`` @@ -120,10 +115,40 @@ Runtime Config Options event timer adapter. For example:: - --dev "0002:0e:00.0,tim_stats_ena=1" + -w 0002:0e:00.0,tim_stats_ena=1 + +- ``TIM limit max rings reserved`` + + The ``tim_rings_lmt`` devargs can be used to limit the max number of TIM + rings i.e. event timer adapter reserved on probe. Since, TIM rings are HW + resources we can avoid starving other applications by not grabbing all the + rings. + For example:: + + -w 0002:0e:00.0,tim_rings_lmt=5 + +- ``TIM ring control internal parameters`` + + When using multiple TIM rings the ``tim_ring_ctl`` devargs can be used to + control each TIM rings internal parameters uniquely. The following dict + format is expected [ring-chnk_slots-disable_npa-stats_ena]. 0 represents + default values. + For Example:: + + -w 0002:0e:00.0,tim_ring_ctl=[2-1023-1-0] + +- ``Lock NPA contexts in NDC`` + + Lock NPA aura and pool contexts in NDC cache. + The device args take hexadecimal bitmask where each bit represent the + corresponding aura/pool id. + + For example:: + + -w 0002:0e:00.0,npa_lock_mask=0xf Debugging Options -~~~~~~~~~~~~~~~~~ +----------------- .. _table_octeontx2_event_debug_options: