X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=doc%2Fguides%2Fprog_guide%2Findex.rst;h=c81d9c54f63acda38493a25fa9edb9b80b9e6ce5;hb=839b20be0e9b;hp=57d516a9465e29d04efa4e5692d59fc79468f4ef;hpb=fea1d908d39989a27890b29b5c0ec94c85c8257b;p=dpdk.git diff --git a/doc/guides/prog_guide/index.rst b/doc/guides/prog_guide/index.rst index 57d516a946..c81d9c54f6 100644 --- a/doc/guides/prog_guide/index.rst +++ b/doc/guides/prog_guide/index.rst @@ -1,41 +1,9 @@ -.. BSD LICENSE - Copyright(c) 2010-2014 Intel Corporation. All rights reserved. - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2010-2017 Intel Corporation. Programmer's Guide ================== -|today| - - -**Contents** - .. toctree:: :maxdepth: 3 :numbered: @@ -43,33 +11,54 @@ Programmer's Guide intro overview env_abstraction_layer - malloc_lib + service_cores ring_lib mempool_lib mbuf_lib poll_mode_drv - ivshmem_lib + rte_flow + switch_representation + traffic_metering_and_policing + traffic_management + bbdev + cryptodev_lib + compressdev + rte_security + rawdev link_bonding_poll_mode_drv_lib timer_lib hash_lib + efd_lib + member_lib lpm_lib lpm6_lib + flow_classify_lib packet_distrib_lib reorder_lib ip_fragment_reassembly_lib + generic_receive_offload_lib + generic_segmentation_offload_lib + pdump_lib multi_proc_support kernel_nic_interface - thread_safety_intel_dpdk_functions + thread_safety_dpdk_functions + eventdev + event_ethernet_rx_adapter + event_ethernet_tx_adapter + event_timer_adapter + event_crypto_adapter qos_framework power_man packet_classif_access_ctrl packet_framework vhost_lib + metrics_lib port_hotplug_framework + bpf_lib source_org dev_kit_build_system dev_kit_root_make_help - extend_intel_dpdk + extend_dpdk build_app ext_app_lib_make_help perf_opt_guidelines @@ -80,140 +69,199 @@ Programmer's Guide **Figures** -:ref:`Figure 1. Core Components Architecture ` +:numref:`figure_architecture-overview` :ref:`figure_architecture-overview` + +:numref:`figure_linuxapp_launch` :ref:`figure_linuxapp_launch` + +:numref:`figure_malloc_heap` :ref:`figure_malloc_heap` + +:numref:`figure_ring1` :ref:`figure_ring1` + +:numref:`figure_ring-enqueue1` :ref:`figure_ring-enqueue1` + +:numref:`figure_ring-enqueue2` :ref:`figure_ring-enqueue2` + +:numref:`figure_ring-enqueue3` :ref:`figure_ring-enqueue3` + +:numref:`figure_ring-dequeue1` :ref:`figure_ring-dequeue1` + +:numref:`figure_ring-dequeue2` :ref:`figure_ring-dequeue2` + +:numref:`figure_ring-dequeue3` :ref:`figure_ring-dequeue3` + +:numref:`figure_ring-mp-enqueue1` :ref:`figure_ring-mp-enqueue1` + +:numref:`figure_ring-mp-enqueue2` :ref:`figure_ring-mp-enqueue2` + +:numref:`figure_ring-mp-enqueue3` :ref:`figure_ring-mp-enqueue3` + +:numref:`figure_ring-mp-enqueue4` :ref:`figure_ring-mp-enqueue4` + +:numref:`figure_ring-mp-enqueue5` :ref:`figure_ring-mp-enqueue5` -:ref:`Figure 2. EAL Initialization in a Linux Application Environment ` +:numref:`figure_ring-modulo1` :ref:`figure_ring-modulo1` -:ref:`Figure 3. Example of a malloc heap and malloc elements within the malloc library ` +:numref:`figure_ring-modulo2` :ref:`figure_ring-modulo2` -:ref:`Figure 4. Ring Structure ` +:numref:`figure_memory-management` :ref:`figure_memory-management` -:ref:`Figure 5. Two Channels and Quad-ranked DIMM Example ` +:numref:`figure_memory-management2` :ref:`figure_memory-management2` -:ref:`Figure 6. Three Channels and Two Dual-ranked DIMM Example ` +:numref:`figure_mempool` :ref:`figure_mempool` -:ref:`Figure 7. A mempool in Memory with its Associated Ring ` +:numref:`figure_mbuf1` :ref:`figure_mbuf1` -:ref:`Figure 8. An mbuf with One Segment ` +:numref:`figure_mbuf2` :ref:`figure_mbuf2` -:ref:`Figure 9. An mbuf with Three Segments ` +:numref:`figure_multi_process_memory` :ref:`figure_multi_process_memory` -:ref:`Figure 16. Memory Sharing in the Intel® DPDK Multi-process Sample Application ` +:numref:`figure_kernel_nic_intf` :ref:`figure_kernel_nic_intf` -:ref:`Figure 17. Components of an Intel® DPDK KNI Application ` +:numref:`figure_pkt_flow_kni` :ref:`figure_pkt_flow_kni` -:ref:`Figure 18. Packet Flow via mbufs in the Intel DPDK® KNI ` -:ref:`Figure 19. vHost-net Architecture Overview ` +:numref:`figure_pkt_proc_pipeline_qos` :ref:`figure_pkt_proc_pipeline_qos` -:ref:`Figure 20. KNI Traffic Flow ` +:numref:`figure_hier_sched_blk` :ref:`figure_hier_sched_blk` -:ref:`Figure 21. Complex Packet Processing Pipeline with QoS Support ` +:numref:`figure_sched_hier_per_port` :ref:`figure_sched_hier_per_port` -:ref:`Figure 22. Hierarchical Scheduler Block Internal Diagram ` +:numref:`figure_data_struct_per_port` :ref:`figure_data_struct_per_port` -:ref:`Figure 23. Scheduling Hierarchy per Port ` +:numref:`figure_prefetch_pipeline` :ref:`figure_prefetch_pipeline` -:ref:`Figure 24. Internal Data Structures per Port ` +:numref:`figure_pipe_prefetch_sm` :ref:`figure_pipe_prefetch_sm` -:ref:`Figure 25. Prefetch Pipeline for the Hierarchical Scheduler Enqueue Operation ` +:numref:`figure_blk_diag_dropper` :ref:`figure_blk_diag_dropper` -:ref:`Figure 26. Pipe Prefetch State Machine for the Hierarchical Scheduler Dequeue Operation ` +:numref:`figure_flow_tru_droppper` :ref:`figure_flow_tru_droppper` -:ref:`Figure 27. High-level Block Diagram of the Intel® DPDK Dropper ` +:numref:`figure_ex_data_flow_tru_dropper` :ref:`figure_ex_data_flow_tru_dropper` -:ref:`Figure 28. Flow Through the Dropper ` +:numref:`figure_pkt_drop_probability` :ref:`figure_pkt_drop_probability` -:ref:`Figure 29. Example Data Flow Through Dropper ` +:numref:`figure_drop_probability_graph` :ref:`figure_drop_probability_graph` -:ref:`Figure 30. Packet Drop Probability for a Given RED Configuration ` +:numref:`figure_figure32` :ref:`figure_figure32` -:ref:`Figure 31. Initial Drop Probability (pb), Actual Drop probability (pa) Computed Using a Factor 1 (Blue Curve) and a Factor 2 (Red Curve) ` +:numref:`figure_figure33` :ref:`figure_figure33` -:ref:`Figure 32. Example of packet processing pipeline. The input ports 0 and 1 are connected with the output ports 0, 1 and 2 through tables 0 and 1. ` +:numref:`figure_figure34` :ref:`figure_figure34` -:ref:`Figure 33. Sequence of steps for hash table operations in packet processing context ` +:numref:`figure_figure35` :ref:`figure_figure35` -:ref:`Figure 34. Data structures for configurable key size hash tables ` +:numref:`figure_figure37` :ref:`figure_figure37` -:ref:`Figure 35. Bucket search pipeline for key lookup operation (configurable key size hash tables) ` +:numref:`figure_figure38` :ref:`figure_figure38` -:ref:`Figure 36. Pseudo-code for match, match_many and match_pos ` +:numref:`figure_figure39` :ref:`figure_figure39` -:ref:`Figure 37. Data structures for 8-byte key hash tables ` +:numref:`figure_efd1` :ref:`figure_efd1` -:ref:`Figure 38. Data structures for 16-byte key hash tables ` +:numref:`figure_efd2` :ref:`figure_efd2` -:ref:`Figure 39. Bucket search pipeline for key lookup operation (single key size hash tables) ` +:numref:`figure_efd3` :ref:`figure_efd3` + +:numref:`figure_efd4` :ref:`figure_efd4` + +:numref:`figure_efd5` :ref:`figure_efd5` + +:numref:`figure_efd6` :ref:`figure_efd6` + +:numref:`figure_efd7` :ref:`figure_efd7` + +:numref:`figure_efd8` :ref:`figure_efd8` + +:numref:`figure_efd9` :ref:`figure_efd9` + +:numref:`figure_efd10` :ref:`figure_efd10` + +:numref:`figure_efd11` :ref:`figure_efd11` + +:numref:`figure_membership1` :ref:`figure_membership1` + +:numref:`figure_membership2` :ref:`figure_membership2` + +:numref:`figure_membership3` :ref:`figure_membership3` + +:numref:`figure_membership4` :ref:`figure_membership4` + +:numref:`figure_membership5` :ref:`figure_membership5` + +:numref:`figure_membership6` :ref:`figure_membership6` + +:numref:`figure_membership7` :ref:`figure_membership7` **Tables** -:ref:`Table 1. Packet Processing Pipeline Implementing QoS ` +:numref:`table_qos_1` :ref:`table_qos_1` + +:numref:`table_qos_2` :ref:`table_qos_2` -:ref:`Table 2. Infrastructure Blocks Used by the Packet Processing Pipeline ` +:numref:`table_qos_3` :ref:`table_qos_3` -:ref:`Table 3. Port Scheduling Hierarchy ` +:numref:`table_qos_4` :ref:`table_qos_4` -:ref:`Table 4. Scheduler Internal Data Structures per Port ` +:numref:`table_qos_5` :ref:`table_qos_5` -:ref:`Table 5. Ethernet Frame Overhead Fields ` +:numref:`table_qos_6` :ref:`table_qos_6` -:ref:`Table 6. Token Bucket Generic Operations ` +:numref:`table_qos_7` :ref:`table_qos_7` -:ref:`Table 7. Token Bucket Generic Parameters ` +:numref:`table_qos_8` :ref:`table_qos_8` -:ref:`Table 8. Token Bucket Persistent Data Structure ` +:numref:`table_qos_9` :ref:`table_qos_9` -:ref:`Table 9. Token Bucket Operations ` +:numref:`table_qos_10` :ref:`table_qos_10` -:ref:`Table 10. Subport/Pipe Traffic Class Upper Limit Enforcement Persistent Data Structure ` +:numref:`table_qos_11` :ref:`table_qos_11` -:ref:`Table 11. Subport/Pipe Traffic Class Upper Limit Enforcement Operations ` +:numref:`table_qos_12` :ref:`table_qos_12` -:ref:`Table 12. Weighted Round Robin (WRR) ` +:numref:`table_qos_13` :ref:`table_qos_13` -:ref:`Table 13. Subport Traffic Class Oversubscription ` +:numref:`table_qos_14` :ref:`table_qos_14` -:ref:`Table 14. Watermark Propagation from Subport Level to Member Pipes at the Beginning of Each Traffic Class Upper Limit Enforcement Period ` +:numref:`table_qos_15` :ref:`table_qos_15` -:ref:`Table 15. Watermark Calculation ` +:numref:`table_qos_16` :ref:`table_qos_16` -:ref:`Table 16. RED Configuration Parameters ` +:numref:`table_qos_17` :ref:`table_qos_17` -:ref:`Table 17. Relative Performance of Alternative Approaches ` +:numref:`table_qos_18` :ref:`table_qos_18` -:ref:`Table 18. RED Configuration Corresponding to RED Configuration File ` +:numref:`table_qos_19` :ref:`table_qos_19` -:ref:`Table 19. Port types ` +:numref:`table_qos_20` :ref:`table_qos_20` -:ref:`Table 20. Port abstract interface ` +:numref:`table_qos_21` :ref:`table_qos_21` -:ref:`Table 21. Table types ` +:numref:`table_qos_22` :ref:`table_qos_22` -:ref:`Table 29. Table Abstract Interface ` +:numref:`table_qos_23` :ref:`table_qos_23` -:ref:`Table 22. Configuration parameters common for all hash table types ` +:numref:`table_qos_24` :ref:`table_qos_24` -:ref:`Table 23. Configuration parameters specific to extendable bucket hash table ` +:numref:`table_qos_25` :ref:`table_qos_25` -:ref:`Table 24. Configuration parameters specific to pre-computed key signature hash table ` +:numref:`table_qos_26` :ref:`table_qos_26` -:ref:`Table 25. The main large data structures (arrays) used for configurable key size hash tables ` +:numref:`table_qos_27` :ref:`table_qos_27` -:ref:`Table 26. Field description for bucket array entry (configurable key size hash tables) ` +:numref:`table_qos_28` :ref:`table_qos_28` -:ref:`Table 27. Description of the bucket search pipeline stages (configurable key size hash tables) ` +:numref:`table_qos_29` :ref:`table_qos_29` -:ref:`Table 28. Lookup tables for match, match_many, match_pos ` +:numref:`table_qos_30` :ref:`table_qos_30` -:ref:`Table 29. Collapsed lookup tables for match, match_many and match_pos ` +:numref:`table_qos_31` :ref:`table_qos_31` -:ref:`Table 30. The main large data structures (arrays) used for 8-byte and 16-byte key size hash tables ` +:numref:`table_qos_32` :ref:`table_qos_32` -:ref:`Table 31. Field description for bucket array entry (8-byte and 16-byte key hash tables) ` +:numref:`table_qos_33` :ref:`table_qos_33` -:ref:`Table 32. Description of the bucket search pipeline stages (8-byte and 16-byte key hash tables) ` +:numref:`table_qos_34` :ref:`table_qos_34` -:ref:`Table 33. Next hop actions (reserved) ` +:numref:`table_hash_lib_1` :ref:`table_hash_lib_1` -:ref:`Table 34. User action examples ` +:numref:`table_hash_lib_2` :ref:`table_hash_lib_2`